904 lines
33 KiB
C
904 lines
33 KiB
C
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/*
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* Copyright (c) 2015, Freescale Semiconductor, Inc.
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* Copyright 2016-2019 NXP
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* All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include "fsl_flexio_i2s.h"
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/* Component ID definition, used by tools. */
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#ifndef FSL_COMPONENT_ID
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#define FSL_COMPONENT_ID "platform.drivers.flexio_i2s"
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#endif
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/*******************************************************************************
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* Definitations
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******************************************************************************/
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/*!@brief _sai_transfer_state*/
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enum
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{
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kFLEXIO_I2S_Busy = 0x0U, /*!< FLEXIO_I2S is busy */
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kFLEXIO_I2S_Idle, /*!< Transfer is done. */
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};
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/*******************************************************************************
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* Prototypes
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******************************************************************************/
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/*!
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* @brief Receive a piece of data in non-blocking way.
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*
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* @param base FLEXIO I2S base pointer
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* @param bitWidth How many bits in a audio word, usually 8/16/24/32 bits.
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* @param buffer Pointer to the data to be read.
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* @param size Bytes to be read.
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*/
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static void FLEXIO_I2S_ReadNonBlocking(FLEXIO_I2S_Type *base, uint8_t bitWidth, uint8_t *rxData, size_t size);
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/*!
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* @brief sends a piece of data in non-blocking way.
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*
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* @param base FLEXIO I2S base pointer
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* @param bitWidth How many bits in a audio word, usually 8/16/24/32 bits.
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* @param buffer Pointer to the data to be written.
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* @param size Bytes to be written.
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*/
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static void FLEXIO_I2S_WriteNonBlocking(FLEXIO_I2S_Type *base, uint8_t bitWidth, uint8_t *txData, size_t size);
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/*******************************************************************************
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* Variables
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******************************************************************************/
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/*******************************************************************************
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* Code
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******************************************************************************/
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static uint32_t FLEXIO_I2S_GetInstance(FLEXIO_I2S_Type *base)
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{
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return FLEXIO_GetInstance(base->flexioBase);
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}
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static void FLEXIO_I2S_WriteNonBlocking(FLEXIO_I2S_Type *base, uint8_t bitWidth, uint8_t *txData, size_t size)
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{
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uint32_t i = 0;
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uint8_t j = 0;
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uint8_t bytesPerWord = bitWidth / 8U;
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uint32_t data = 0;
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uint32_t temp = 0;
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for (i = 0; i < size / bytesPerWord; i++)
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{
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for (j = 0; j < bytesPerWord; j++)
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{
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temp = (uint32_t)(*txData);
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data |= (temp << (8U * j));
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txData++;
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}
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base->flexioBase->SHIFTBUFBIS[base->txShifterIndex] = data << (32U - bitWidth);
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data = 0;
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}
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}
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static void FLEXIO_I2S_ReadNonBlocking(FLEXIO_I2S_Type *base, uint8_t bitWidth, uint8_t *rxData, size_t size)
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{
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uint32_t i = 0;
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uint8_t j = 0;
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uint8_t bytesPerWord = bitWidth / 8U;
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uint32_t data = 0;
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for (i = 0; i < size / bytesPerWord; i++)
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{
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data = (base->flexioBase->SHIFTBUFBIS[base->rxShifterIndex]);
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for (j = 0; j < bytesPerWord; j++)
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{
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*rxData = (uint8_t)((data >> (8U * j)) & 0xFFU);
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rxData++;
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}
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}
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}
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/*!
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* brief Initializes the FlexIO I2S.
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*
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* This API configures FlexIO pins and shifter to I2S and configures the FlexIO I2S with a configuration structure.
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* The configuration structure can be filled by the user, or be set with default values by
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* FLEXIO_I2S_GetDefaultConfig().
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*
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* note This API should be called at the beginning of the application to use
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* the FlexIO I2S driver. Otherwise, any access to the FlexIO I2S module can cause hard fault
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* because the clock is not enabled.
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*
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* param base FlexIO I2S base pointer
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* param config FlexIO I2S configure structure.
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*/
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void FLEXIO_I2S_Init(FLEXIO_I2S_Type *base, const flexio_i2s_config_t *config)
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{
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assert((base != NULL) && (config != NULL));
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flexio_shifter_config_t shifterConfig = {0};
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flexio_timer_config_t timerConfig = {0};
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#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
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/* Ungate flexio clock. */
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CLOCK_EnableClock(s_flexioClocks[FLEXIO_I2S_GetInstance(base)]);
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#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
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/* reset Flexio */
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FLEXIO_Reset(base->flexioBase);
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/* Set shifter for I2S Tx data */
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shifterConfig.timerSelect = base->bclkTimerIndex;
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shifterConfig.pinSelect = base->txPinIndex;
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shifterConfig.timerPolarity = config->txTimerPolarity;
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shifterConfig.pinConfig = kFLEXIO_PinConfigOutput;
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shifterConfig.pinPolarity = config->txPinPolarity;
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shifterConfig.shifterMode = kFLEXIO_ShifterModeTransmit;
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shifterConfig.inputSource = kFLEXIO_ShifterInputFromPin;
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shifterConfig.shifterStop = kFLEXIO_ShifterStopBitDisable;
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if (config->masterSlave == kFLEXIO_I2S_Master)
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{
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shifterConfig.shifterStart = kFLEXIO_ShifterStartBitDisabledLoadDataOnShift;
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}
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else
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{
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shifterConfig.shifterStart = kFLEXIO_ShifterStartBitDisabledLoadDataOnEnable;
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}
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FLEXIO_SetShifterConfig(base->flexioBase, base->txShifterIndex, &shifterConfig);
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/* Set shifter for I2S Rx Data */
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shifterConfig.timerSelect = base->bclkTimerIndex;
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shifterConfig.pinSelect = base->rxPinIndex;
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shifterConfig.timerPolarity = config->rxTimerPolarity;
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shifterConfig.pinConfig = kFLEXIO_PinConfigOutputDisabled;
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shifterConfig.pinPolarity = config->rxPinPolarity;
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shifterConfig.shifterMode = kFLEXIO_ShifterModeReceive;
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shifterConfig.inputSource = kFLEXIO_ShifterInputFromPin;
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shifterConfig.shifterStop = kFLEXIO_ShifterStopBitDisable;
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shifterConfig.shifterStart = kFLEXIO_ShifterStartBitDisabledLoadDataOnEnable;
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FLEXIO_SetShifterConfig(base->flexioBase, base->rxShifterIndex, &shifterConfig);
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/* Set Timer to I2S frame sync */
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if (config->masterSlave == kFLEXIO_I2S_Master)
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{
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timerConfig.triggerSelect = FLEXIO_TIMER_TRIGGER_SEL_PININPUT(base->txPinIndex);
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timerConfig.triggerPolarity = kFLEXIO_TimerTriggerPolarityActiveHigh;
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timerConfig.triggerSource = kFLEXIO_TimerTriggerSourceExternal;
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timerConfig.pinConfig = kFLEXIO_PinConfigOutput;
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timerConfig.pinSelect = base->fsPinIndex;
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timerConfig.pinPolarity = config->fsPinPolarity;
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timerConfig.timerMode = kFLEXIO_TimerModeSingle16Bit;
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timerConfig.timerOutput = kFLEXIO_TimerOutputOneNotAffectedByReset;
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timerConfig.timerDecrement = kFLEXIO_TimerDecSrcOnFlexIOClockShiftTimerOutput;
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timerConfig.timerReset = kFLEXIO_TimerResetNever;
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timerConfig.timerDisable = kFLEXIO_TimerDisableNever;
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timerConfig.timerEnable = kFLEXIO_TimerEnableOnPrevTimerEnable;
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timerConfig.timerStart = kFLEXIO_TimerStartBitDisabled;
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timerConfig.timerStop = kFLEXIO_TimerStopBitDisabled;
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}
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else
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{
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timerConfig.triggerSelect = FLEXIO_TIMER_TRIGGER_SEL_PININPUT(base->bclkPinIndex);
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timerConfig.triggerPolarity = kFLEXIO_TimerTriggerPolarityActiveHigh;
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timerConfig.triggerSource = kFLEXIO_TimerTriggerSourceInternal;
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timerConfig.pinConfig = kFLEXIO_PinConfigOutputDisabled;
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timerConfig.pinSelect = base->fsPinIndex;
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timerConfig.pinPolarity = config->fsPinPolarity;
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timerConfig.timerMode = kFLEXIO_TimerModeSingle16Bit;
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timerConfig.timerOutput = kFLEXIO_TimerOutputOneNotAffectedByReset;
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timerConfig.timerDecrement = kFLEXIO_TimerDecSrcOnTriggerInputShiftTriggerInput;
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timerConfig.timerReset = kFLEXIO_TimerResetNever;
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timerConfig.timerDisable = kFLEXIO_TimerDisableOnTimerCompare;
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timerConfig.timerEnable = kFLEXIO_TimerEnableOnPinRisingEdge;
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timerConfig.timerStart = kFLEXIO_TimerStartBitDisabled;
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timerConfig.timerStop = kFLEXIO_TimerStopBitDisabled;
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}
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FLEXIO_SetTimerConfig(base->flexioBase, base->fsTimerIndex, &timerConfig);
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/* Set Timer to I2S bit clock */
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if (config->masterSlave == kFLEXIO_I2S_Master)
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{
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timerConfig.triggerSelect = FLEXIO_TIMER_TRIGGER_SEL_SHIFTnSTAT(base->txShifterIndex);
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timerConfig.triggerPolarity = kFLEXIO_TimerTriggerPolarityActiveLow;
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timerConfig.triggerSource = kFLEXIO_TimerTriggerSourceInternal;
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timerConfig.pinSelect = base->bclkPinIndex;
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timerConfig.pinConfig = kFLEXIO_PinConfigOutput;
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timerConfig.pinPolarity = config->bclkPinPolarity;
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timerConfig.timerMode = kFLEXIO_TimerModeDual8BitBaudBit;
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timerConfig.timerOutput = kFLEXIO_TimerOutputOneNotAffectedByReset;
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timerConfig.timerDecrement = kFLEXIO_TimerDecSrcOnFlexIOClockShiftTimerOutput;
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timerConfig.timerReset = kFLEXIO_TimerResetNever;
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timerConfig.timerDisable = kFLEXIO_TimerDisableNever;
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timerConfig.timerEnable = kFLEXIO_TimerEnableOnTriggerHigh;
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timerConfig.timerStart = kFLEXIO_TimerStartBitEnabled;
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timerConfig.timerStop = kFLEXIO_TimerStopBitDisabled;
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}
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else
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{
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timerConfig.triggerSelect = FLEXIO_TIMER_TRIGGER_SEL_TIMn(base->fsTimerIndex);
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timerConfig.triggerPolarity = kFLEXIO_TimerTriggerPolarityActiveHigh;
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timerConfig.triggerSource = kFLEXIO_TimerTriggerSourceInternal;
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timerConfig.pinSelect = base->bclkPinIndex;
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timerConfig.pinConfig = kFLEXIO_PinConfigOutputDisabled;
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timerConfig.pinPolarity = config->bclkPinPolarity;
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timerConfig.timerMode = kFLEXIO_TimerModeSingle16Bit;
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timerConfig.timerOutput = kFLEXIO_TimerOutputOneNotAffectedByReset;
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timerConfig.timerDecrement = kFLEXIO_TimerDecSrcOnPinInputShiftPinInput;
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timerConfig.timerReset = kFLEXIO_TimerResetNever;
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timerConfig.timerDisable = kFLEXIO_TimerDisableOnTimerCompareTriggerLow;
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timerConfig.timerEnable = kFLEXIO_TimerEnableOnPinRisingEdgeTriggerHigh;
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timerConfig.timerStart = kFLEXIO_TimerStartBitDisabled;
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timerConfig.timerStop = kFLEXIO_TimerStopBitDisabled;
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}
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FLEXIO_SetTimerConfig(base->flexioBase, base->bclkTimerIndex, &timerConfig);
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/* If enable flexio I2S */
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if (config->enableI2S)
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{
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base->flexioBase->CTRL |= FLEXIO_CTRL_FLEXEN_MASK;
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}
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else
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{
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base->flexioBase->CTRL &= ~FLEXIO_CTRL_FLEXEN_MASK;
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}
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}
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/*!
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* brief Sets the FlexIO I2S configuration structure to default values.
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*
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* The purpose of this API is to get the configuration structure initialized for use in FLEXIO_I2S_Init().
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* Users may use the initialized structure unchanged in FLEXIO_I2S_Init() or modify
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* some fields of the structure before calling FLEXIO_I2S_Init().
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*
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* param config pointer to master configuration structure
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*/
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void FLEXIO_I2S_GetDefaultConfig(flexio_i2s_config_t *config)
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{
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/* Initializes the configure structure to zero. */
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(void)memset(config, 0, sizeof(*config));
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config->masterSlave = kFLEXIO_I2S_Master;
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config->enableI2S = true;
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config->txPinPolarity = kFLEXIO_PinActiveHigh;
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config->rxPinPolarity = kFLEXIO_PinActiveHigh;
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config->bclkPinPolarity = kFLEXIO_PinActiveHigh;
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config->fsPinPolarity = kFLEXIO_PinActiveLow;
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config->txTimerPolarity = kFLEXIO_ShifterTimerPolarityOnPositive;
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config->rxTimerPolarity = kFLEXIO_ShifterTimerPolarityOnNegitive;
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}
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/*!
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* brief De-initializes the FlexIO I2S.
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*
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* Calling this API resets the FlexIO I2S shifter and timer config. After calling this API,
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* call the FLEXO_I2S_Init to use the FlexIO I2S module.
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*
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* param base FlexIO I2S base pointer
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*/
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void FLEXIO_I2S_Deinit(FLEXIO_I2S_Type *base)
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{
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base->flexioBase->SHIFTCFG[base->txShifterIndex] = 0;
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base->flexioBase->SHIFTCTL[base->txShifterIndex] = 0;
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base->flexioBase->SHIFTCFG[base->rxShifterIndex] = 0;
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base->flexioBase->SHIFTCTL[base->rxShifterIndex] = 0;
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base->flexioBase->TIMCFG[base->fsTimerIndex] = 0;
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base->flexioBase->TIMCMP[base->fsTimerIndex] = 0;
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base->flexioBase->TIMCTL[base->fsTimerIndex] = 0;
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base->flexioBase->TIMCFG[base->bclkTimerIndex] = 0;
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base->flexioBase->TIMCMP[base->bclkTimerIndex] = 0;
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base->flexioBase->TIMCTL[base->bclkTimerIndex] = 0;
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}
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/*!
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* brief Enables the FlexIO I2S interrupt.
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*
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* This function enables the FlexIO UART interrupt.
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*
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* param base Pointer to FLEXIO_I2S_Type structure
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* param mask interrupt source
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*/
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void FLEXIO_I2S_EnableInterrupts(FLEXIO_I2S_Type *base, uint32_t mask)
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{
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if ((mask & (uint32_t)kFLEXIO_I2S_TxDataRegEmptyInterruptEnable) != 0UL)
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{
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FLEXIO_EnableShifterStatusInterrupts(base->flexioBase, 1UL << base->txShifterIndex);
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}
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if ((mask & (uint32_t)kFLEXIO_I2S_RxDataRegFullInterruptEnable) != 0UL)
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{
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FLEXIO_EnableShifterStatusInterrupts(base->flexioBase, 1UL << base->rxShifterIndex);
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}
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}
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/*!
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* brief Gets the FlexIO I2S status flags.
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||
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*
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* param base Pointer to FLEXIO_I2S_Type structure
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||
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* return Status flag, which are ORed by the enumerators in the _flexio_i2s_status_flags.
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||
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*/
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||
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uint32_t FLEXIO_I2S_GetStatusFlags(FLEXIO_I2S_Type *base)
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||
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{
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uint32_t status = 0;
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|
|
status = ((FLEXIO_GetShifterStatusFlags(base->flexioBase) & (1UL << base->txShifterIndex)) >> base->txShifterIndex);
|
||
|
|
status |=
|
||
|
|
(((FLEXIO_GetShifterStatusFlags(base->flexioBase) & (1UL << base->rxShifterIndex)) >> (base->rxShifterIndex))
|
||
|
|
<< 1U);
|
||
|
|
return status;
|
||
|
|
}
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* brief Disables the FlexIO I2S interrupt.
|
||
|
|
*
|
||
|
|
* This function enables the FlexIO UART interrupt.
|
||
|
|
*
|
||
|
|
* param base pointer to FLEXIO_I2S_Type structure
|
||
|
|
* param mask interrupt source
|
||
|
|
*/
|
||
|
|
void FLEXIO_I2S_DisableInterrupts(FLEXIO_I2S_Type *base, uint32_t mask)
|
||
|
|
{
|
||
|
|
if ((mask & (uint32_t)kFLEXIO_I2S_TxDataRegEmptyInterruptEnable) != 0UL)
|
||
|
|
{
|
||
|
|
FLEXIO_DisableShifterStatusInterrupts(base->flexioBase, 1UL << base->txShifterIndex);
|
||
|
|
}
|
||
|
|
if ((mask & (uint32_t)kFLEXIO_I2S_RxDataRegFullInterruptEnable) != 0UL)
|
||
|
|
{
|
||
|
|
FLEXIO_DisableShifterStatusInterrupts(base->flexioBase, 1UL << base->rxShifterIndex);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* brief Configures the FlexIO I2S audio format in master mode.
|
||
|
|
*
|
||
|
|
* Audio format can be changed in run-time of FlexIO I2S. This function configures the sample rate and audio data
|
||
|
|
* format to be transferred.
|
||
|
|
*
|
||
|
|
* param base Pointer to FLEXIO_I2S_Type structure
|
||
|
|
* param format Pointer to FlexIO I2S audio data format structure.
|
||
|
|
* param srcClock_Hz I2S master clock source frequency in Hz.
|
||
|
|
*/
|
||
|
|
void FLEXIO_I2S_MasterSetFormat(FLEXIO_I2S_Type *base, flexio_i2s_format_t *format, uint32_t srcClock_Hz)
|
||
|
|
{
|
||
|
|
uint32_t timDiv = srcClock_Hz / (format->sampleRate_Hz * format->bitWidth * 2U);
|
||
|
|
uint32_t bclkDiv = 0;
|
||
|
|
|
||
|
|
/* Shall keep bclk and fs div an integer */
|
||
|
|
if ((timDiv % 2UL) != 0UL)
|
||
|
|
{
|
||
|
|
timDiv += 1U;
|
||
|
|
}
|
||
|
|
/* Set Frame sync timer cmp */
|
||
|
|
base->flexioBase->TIMCMP[base->fsTimerIndex] = FLEXIO_TIMCMP_CMP(format->bitWidth * timDiv - 1U);
|
||
|
|
|
||
|
|
/* Set bit clock timer cmp */
|
||
|
|
bclkDiv = ((timDiv / 2U - 1U) | ((format->bitWidth * 2UL - 1UL) << 8U));
|
||
|
|
base->flexioBase->TIMCMP[base->bclkTimerIndex] = FLEXIO_TIMCMP_CMP(bclkDiv);
|
||
|
|
}
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* brief Configures the FlexIO I2S audio format in slave mode.
|
||
|
|
*
|
||
|
|
* Audio format can be changed in run-time of FlexIO I2S. This function configures the sample rate and audio data
|
||
|
|
* format to be transferred.
|
||
|
|
*
|
||
|
|
* param base Pointer to FLEXIO_I2S_Type structure
|
||
|
|
* param format Pointer to FlexIO I2S audio data format structure.
|
||
|
|
*/
|
||
|
|
void FLEXIO_I2S_SlaveSetFormat(FLEXIO_I2S_Type *base, flexio_i2s_format_t *format)
|
||
|
|
{
|
||
|
|
/* Set Frame sync timer cmp */
|
||
|
|
base->flexioBase->TIMCMP[base->fsTimerIndex] = FLEXIO_TIMCMP_CMP(format->bitWidth * 4UL - 3UL);
|
||
|
|
|
||
|
|
/* Set bit clock timer cmp */
|
||
|
|
base->flexioBase->TIMCMP[base->bclkTimerIndex] = FLEXIO_TIMCMP_CMP(format->bitWidth * 2UL - 1UL);
|
||
|
|
}
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* brief Sends data using a blocking method.
|
||
|
|
*
|
||
|
|
* note This function blocks via polling until data is ready to be sent.
|
||
|
|
*
|
||
|
|
* param base FlexIO I2S base pointer.
|
||
|
|
* param bitWidth How many bits in a audio word, usually 8/16/24/32 bits.
|
||
|
|
* param txData Pointer to the data to be written.
|
||
|
|
* param size Bytes to be written.
|
||
|
|
* retval kStatus_Success Successfully write data.
|
||
|
|
* retval kStatus_FLEXIO_I2C_Timeout Timeout polling status flags.
|
||
|
|
*/
|
||
|
|
status_t FLEXIO_I2S_WriteBlocking(FLEXIO_I2S_Type *base, uint8_t bitWidth, uint8_t *txData, size_t size)
|
||
|
|
{
|
||
|
|
uint32_t i = 0;
|
||
|
|
uint8_t bytesPerWord = bitWidth / 8U;
|
||
|
|
#if I2S_RETRY_TIMES
|
||
|
|
uint32_t waitTimes = I2S_RETRY_TIMES;
|
||
|
|
#endif
|
||
|
|
|
||
|
|
for (i = 0; i < size / bytesPerWord; i++)
|
||
|
|
{
|
||
|
|
/* Wait until it can write data */
|
||
|
|
#if I2S_RETRY_TIMES
|
||
|
|
waitTimes = I2S_RETRY_TIMES;
|
||
|
|
while (((FLEXIO_I2S_GetStatusFlags(base) & (uint32_t)kFLEXIO_I2S_TxDataRegEmptyFlag) == 0UL) &&
|
||
|
|
(--waitTimes != 0U))
|
||
|
|
{
|
||
|
|
}
|
||
|
|
if (waitTimes == 0U)
|
||
|
|
{
|
||
|
|
return kStatus_FLEXIO_I2S_Timeout;
|
||
|
|
}
|
||
|
|
#else
|
||
|
|
while ((FLEXIO_I2S_GetStatusFlags(base) & (uint32_t)kFLEXIO_I2S_TxDataRegEmptyFlag) == 0UL)
|
||
|
|
{
|
||
|
|
}
|
||
|
|
#endif
|
||
|
|
|
||
|
|
FLEXIO_I2S_WriteNonBlocking(base, bitWidth, txData, bytesPerWord);
|
||
|
|
txData = (uint8_t *)((uint32_t)txData + bytesPerWord);
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Wait until the last data is sent */
|
||
|
|
#if I2S_RETRY_TIMES
|
||
|
|
waitTimes = I2S_RETRY_TIMES;
|
||
|
|
while (((FLEXIO_I2S_GetStatusFlags(base) & (uint32_t)kFLEXIO_I2S_TxDataRegEmptyFlag) == 0UL) && (--waitTimes != 0U))
|
||
|
|
{
|
||
|
|
}
|
||
|
|
if (waitTimes == 0U)
|
||
|
|
{
|
||
|
|
return kStatus_FLEXIO_I2S_Timeout;
|
||
|
|
}
|
||
|
|
#else
|
||
|
|
while ((FLEXIO_I2S_GetStatusFlags(base) & (uint32_t)kFLEXIO_I2S_TxDataRegEmptyFlag) == 0UL)
|
||
|
|
{
|
||
|
|
}
|
||
|
|
#endif
|
||
|
|
|
||
|
|
return kStatus_Success;
|
||
|
|
}
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* brief Receives a piece of data using a blocking method.
|
||
|
|
*
|
||
|
|
* note This function blocks via polling until data is ready to be sent.
|
||
|
|
*
|
||
|
|
* param base FlexIO I2S base pointer
|
||
|
|
* param bitWidth How many bits in a audio word, usually 8/16/24/32 bits.
|
||
|
|
* param rxData Pointer to the data to be read.
|
||
|
|
* param size Bytes to be read.
|
||
|
|
* retval kStatus_Success Successfully read data.
|
||
|
|
* retval kStatus_FLEXIO_I2C_Timeout Timeout polling status flags.
|
||
|
|
*/
|
||
|
|
status_t FLEXIO_I2S_ReadBlocking(FLEXIO_I2S_Type *base, uint8_t bitWidth, uint8_t *rxData, size_t size)
|
||
|
|
{
|
||
|
|
uint32_t i = 0;
|
||
|
|
uint8_t bytesPerWord = bitWidth / 8U;
|
||
|
|
#if I2S_RETRY_TIMES
|
||
|
|
uint32_t waitTimes = I2S_RETRY_TIMES;
|
||
|
|
#endif
|
||
|
|
|
||
|
|
for (i = 0; i < size / bytesPerWord; i++)
|
||
|
|
{
|
||
|
|
/* Wait until data is received */
|
||
|
|
#if I2S_RETRY_TIMES
|
||
|
|
waitTimes = I2S_RETRY_TIMES;
|
||
|
|
while ((!((FLEXIO_GetShifterStatusFlags(base->flexioBase) & (1UL << base->rxShifterIndex)) != 0UL)) &&
|
||
|
|
(--waitTimes != 0U))
|
||
|
|
{
|
||
|
|
}
|
||
|
|
if (waitTimes == 0U)
|
||
|
|
{
|
||
|
|
return kStatus_FLEXIO_I2S_Timeout;
|
||
|
|
}
|
||
|
|
#else
|
||
|
|
while (!((FLEXIO_GetShifterStatusFlags(base->flexioBase) & (1UL << base->rxShifterIndex)) != 0UL))
|
||
|
|
{
|
||
|
|
}
|
||
|
|
#endif
|
||
|
|
|
||
|
|
FLEXIO_I2S_ReadNonBlocking(base, bitWidth, rxData, bytesPerWord);
|
||
|
|
rxData = (uint8_t *)((uint32_t)rxData + bytesPerWord);
|
||
|
|
}
|
||
|
|
return kStatus_Success;
|
||
|
|
}
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* brief Initializes the FlexIO I2S handle.
|
||
|
|
*
|
||
|
|
* This function initializes the FlexIO I2S handle which can be used for other
|
||
|
|
* FlexIO I2S transactional APIs. Call this API once to get the
|
||
|
|
* initialized handle.
|
||
|
|
*
|
||
|
|
* param base Pointer to FLEXIO_I2S_Type structure
|
||
|
|
* param handle Pointer to flexio_i2s_handle_t structure to store the transfer state.
|
||
|
|
* param callback FlexIO I2S callback function, which is called while finished a block.
|
||
|
|
* param userData User parameter for the FlexIO I2S callback.
|
||
|
|
*/
|
||
|
|
void FLEXIO_I2S_TransferTxCreateHandle(FLEXIO_I2S_Type *base,
|
||
|
|
flexio_i2s_handle_t *handle,
|
||
|
|
flexio_i2s_callback_t callback,
|
||
|
|
void *userData)
|
||
|
|
{
|
||
|
|
assert(handle != NULL);
|
||
|
|
|
||
|
|
IRQn_Type flexio_irqs[] = FLEXIO_IRQS;
|
||
|
|
|
||
|
|
/* Zero the handle. */
|
||
|
|
(void)memset(handle, 0, sizeof(*handle));
|
||
|
|
|
||
|
|
/* Store callback and user data. */
|
||
|
|
handle->callback = callback;
|
||
|
|
handle->userData = userData;
|
||
|
|
|
||
|
|
/* Save the context in global variables to support the double weak mechanism. */
|
||
|
|
(void)FLEXIO_RegisterHandleIRQ(base, handle, FLEXIO_I2S_TransferTxHandleIRQ);
|
||
|
|
|
||
|
|
/* Set the TX/RX state. */
|
||
|
|
handle->state = (uint32_t)kFLEXIO_I2S_Idle;
|
||
|
|
|
||
|
|
/* Enable interrupt in NVIC. */
|
||
|
|
(void)EnableIRQ(flexio_irqs[FLEXIO_I2S_GetInstance(base)]);
|
||
|
|
}
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* brief Initializes the FlexIO I2S receive handle.
|
||
|
|
*
|
||
|
|
* This function initializes the FlexIO I2S handle which can be used for other
|
||
|
|
* FlexIO I2S transactional APIs. Call this API once to get the
|
||
|
|
* initialized handle.
|
||
|
|
*
|
||
|
|
* param base Pointer to FLEXIO_I2S_Type structure.
|
||
|
|
* param handle Pointer to flexio_i2s_handle_t structure to store the transfer state.
|
||
|
|
* param callback FlexIO I2S callback function, which is called while finished a block.
|
||
|
|
* param userData User parameter for the FlexIO I2S callback.
|
||
|
|
*/
|
||
|
|
void FLEXIO_I2S_TransferRxCreateHandle(FLEXIO_I2S_Type *base,
|
||
|
|
flexio_i2s_handle_t *handle,
|
||
|
|
flexio_i2s_callback_t callback,
|
||
|
|
void *userData)
|
||
|
|
{
|
||
|
|
assert(handle != NULL);
|
||
|
|
|
||
|
|
IRQn_Type flexio_irqs[] = FLEXIO_IRQS;
|
||
|
|
|
||
|
|
/* Zero the handle. */
|
||
|
|
(void)memset(handle, 0, sizeof(*handle));
|
||
|
|
|
||
|
|
/* Store callback and user data. */
|
||
|
|
handle->callback = callback;
|
||
|
|
handle->userData = userData;
|
||
|
|
|
||
|
|
/* Save the context in global variables to support the double weak mechanism. */
|
||
|
|
(void)FLEXIO_RegisterHandleIRQ(base, handle, FLEXIO_I2S_TransferRxHandleIRQ);
|
||
|
|
|
||
|
|
/* Set the TX/RX state. */
|
||
|
|
handle->state = (uint32_t)kFLEXIO_I2S_Idle;
|
||
|
|
|
||
|
|
/* Enable interrupt in NVIC. */
|
||
|
|
(void)EnableIRQ(flexio_irqs[FLEXIO_I2S_GetInstance(base)]);
|
||
|
|
}
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* brief Configures the FlexIO I2S audio format.
|
||
|
|
*
|
||
|
|
* Audio format can be changed at run-time of FlexIO I2S. This function configures the sample rate and audio data
|
||
|
|
* format to be transferred.
|
||
|
|
*
|
||
|
|
* param base Pointer to FLEXIO_I2S_Type structure.
|
||
|
|
* param handle FlexIO I2S handle pointer.
|
||
|
|
* param format Pointer to audio data format structure.
|
||
|
|
* param srcClock_Hz FlexIO I2S bit clock source frequency in Hz. This parameter should be 0 while in slave mode.
|
||
|
|
*/
|
||
|
|
void FLEXIO_I2S_TransferSetFormat(FLEXIO_I2S_Type *base,
|
||
|
|
flexio_i2s_handle_t *handle,
|
||
|
|
flexio_i2s_format_t *format,
|
||
|
|
uint32_t srcClock_Hz)
|
||
|
|
{
|
||
|
|
assert((handle != NULL) && (format != NULL));
|
||
|
|
|
||
|
|
/* Set the bitWidth to handle */
|
||
|
|
handle->bitWidth = format->bitWidth;
|
||
|
|
|
||
|
|
/* Set sample rate */
|
||
|
|
if (srcClock_Hz != 0UL)
|
||
|
|
{
|
||
|
|
/* It is master */
|
||
|
|
FLEXIO_I2S_MasterSetFormat(base, format, srcClock_Hz);
|
||
|
|
}
|
||
|
|
else
|
||
|
|
{
|
||
|
|
FLEXIO_I2S_SlaveSetFormat(base, format);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* brief Performs an interrupt non-blocking send transfer on FlexIO I2S.
|
||
|
|
*
|
||
|
|
* note The API returns immediately after transfer initiates.
|
||
|
|
* Call FLEXIO_I2S_GetRemainingBytes to poll the transfer status and check whether
|
||
|
|
* the transfer is finished. If the return status is 0, the transfer is finished.
|
||
|
|
*
|
||
|
|
* param base Pointer to FLEXIO_I2S_Type structure.
|
||
|
|
* param handle Pointer to flexio_i2s_handle_t structure which stores the transfer state
|
||
|
|
* param xfer Pointer to flexio_i2s_transfer_t structure
|
||
|
|
* retval kStatus_Success Successfully start the data transmission.
|
||
|
|
* retval kStatus_FLEXIO_I2S_TxBusy Previous transmission still not finished, data not all written to TX register yet.
|
||
|
|
* retval kStatus_InvalidArgument The input parameter is invalid.
|
||
|
|
*/
|
||
|
|
status_t FLEXIO_I2S_TransferSendNonBlocking(FLEXIO_I2S_Type *base,
|
||
|
|
flexio_i2s_handle_t *handle,
|
||
|
|
flexio_i2s_transfer_t *xfer)
|
||
|
|
{
|
||
|
|
assert(handle != NULL);
|
||
|
|
|
||
|
|
/* Check if the queue is full */
|
||
|
|
if (handle->queue[handle->queueUser].data != NULL)
|
||
|
|
{
|
||
|
|
return kStatus_FLEXIO_I2S_QueueFull;
|
||
|
|
}
|
||
|
|
if ((xfer->dataSize == 0U) || (xfer->data == NULL))
|
||
|
|
{
|
||
|
|
return kStatus_InvalidArgument;
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Add into queue */
|
||
|
|
handle->queue[handle->queueUser].data = xfer->data;
|
||
|
|
handle->queue[handle->queueUser].dataSize = xfer->dataSize;
|
||
|
|
handle->transferSize[handle->queueUser] = xfer->dataSize;
|
||
|
|
handle->queueUser = (handle->queueUser + 1U) % FLEXIO_I2S_XFER_QUEUE_SIZE;
|
||
|
|
|
||
|
|
/* Set the state to busy */
|
||
|
|
handle->state = (uint32_t)kFLEXIO_I2S_Busy;
|
||
|
|
|
||
|
|
FLEXIO_I2S_EnableInterrupts(base, kFLEXIO_I2S_TxDataRegEmptyInterruptEnable);
|
||
|
|
|
||
|
|
/* Enable Tx transfer */
|
||
|
|
FLEXIO_I2S_Enable(base, true);
|
||
|
|
|
||
|
|
return kStatus_Success;
|
||
|
|
}
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* brief Performs an interrupt non-blocking receive transfer on FlexIO I2S.
|
||
|
|
*
|
||
|
|
* note The API returns immediately after transfer initiates.
|
||
|
|
* Call FLEXIO_I2S_GetRemainingBytes to poll the transfer status to check whether
|
||
|
|
* the transfer is finished. If the return status is 0, the transfer is finished.
|
||
|
|
*
|
||
|
|
* param base Pointer to FLEXIO_I2S_Type structure.
|
||
|
|
* param handle Pointer to flexio_i2s_handle_t structure which stores the transfer state
|
||
|
|
* param xfer Pointer to flexio_i2s_transfer_t structure
|
||
|
|
* retval kStatus_Success Successfully start the data receive.
|
||
|
|
* retval kStatus_FLEXIO_I2S_RxBusy Previous receive still not finished.
|
||
|
|
* retval kStatus_InvalidArgument The input parameter is invalid.
|
||
|
|
*/
|
||
|
|
status_t FLEXIO_I2S_TransferReceiveNonBlocking(FLEXIO_I2S_Type *base,
|
||
|
|
flexio_i2s_handle_t *handle,
|
||
|
|
flexio_i2s_transfer_t *xfer)
|
||
|
|
{
|
||
|
|
assert(handle != NULL);
|
||
|
|
|
||
|
|
/* Check if the queue is full */
|
||
|
|
if (handle->queue[handle->queueUser].data != NULL)
|
||
|
|
{
|
||
|
|
return kStatus_FLEXIO_I2S_QueueFull;
|
||
|
|
}
|
||
|
|
|
||
|
|
if ((xfer->dataSize == 0U) || (xfer->data == NULL))
|
||
|
|
{
|
||
|
|
return kStatus_InvalidArgument;
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Add into queue */
|
||
|
|
handle->queue[handle->queueUser].data = xfer->data;
|
||
|
|
handle->queue[handle->queueUser].dataSize = xfer->dataSize;
|
||
|
|
handle->transferSize[handle->queueUser] = xfer->dataSize;
|
||
|
|
handle->queueUser = (handle->queueUser + 1U) % FLEXIO_I2S_XFER_QUEUE_SIZE;
|
||
|
|
|
||
|
|
/* Set state to busy */
|
||
|
|
handle->state = (uint32_t)kFLEXIO_I2S_Busy;
|
||
|
|
|
||
|
|
/* Enable interrupt */
|
||
|
|
FLEXIO_I2S_EnableInterrupts(base, kFLEXIO_I2S_RxDataRegFullInterruptEnable);
|
||
|
|
|
||
|
|
/* Enable Rx transfer */
|
||
|
|
FLEXIO_I2S_Enable(base, true);
|
||
|
|
|
||
|
|
return kStatus_Success;
|
||
|
|
}
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* brief Aborts the current send.
|
||
|
|
*
|
||
|
|
* note This API can be called at any time when interrupt non-blocking transfer initiates
|
||
|
|
* to abort the transfer in a early time.
|
||
|
|
*
|
||
|
|
* param base Pointer to FLEXIO_I2S_Type structure.
|
||
|
|
* param handle Pointer to flexio_i2s_handle_t structure which stores the transfer state
|
||
|
|
*/
|
||
|
|
void FLEXIO_I2S_TransferAbortSend(FLEXIO_I2S_Type *base, flexio_i2s_handle_t *handle)
|
||
|
|
{
|
||
|
|
assert(handle != NULL);
|
||
|
|
|
||
|
|
/* Stop Tx transfer and disable interrupt */
|
||
|
|
FLEXIO_I2S_DisableInterrupts(base, kFLEXIO_I2S_TxDataRegEmptyInterruptEnable);
|
||
|
|
handle->state = (uint32_t)kFLEXIO_I2S_Idle;
|
||
|
|
|
||
|
|
/* Clear the queue */
|
||
|
|
(void)memset(handle->queue, 0, sizeof(flexio_i2s_transfer_t) * FLEXIO_I2S_XFER_QUEUE_SIZE);
|
||
|
|
handle->queueDriver = 0;
|
||
|
|
handle->queueUser = 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* brief Aborts the current receive.
|
||
|
|
*
|
||
|
|
* note This API can be called at any time when interrupt non-blocking transfer initiates
|
||
|
|
* to abort the transfer in a early time.
|
||
|
|
*
|
||
|
|
* param base Pointer to FLEXIO_I2S_Type structure.
|
||
|
|
* param handle Pointer to flexio_i2s_handle_t structure which stores the transfer state
|
||
|
|
*/
|
||
|
|
void FLEXIO_I2S_TransferAbortReceive(FLEXIO_I2S_Type *base, flexio_i2s_handle_t *handle)
|
||
|
|
{
|
||
|
|
assert(handle != NULL);
|
||
|
|
|
||
|
|
/* Stop rx transfer and disable interrupt */
|
||
|
|
FLEXIO_I2S_DisableInterrupts(base, kFLEXIO_I2S_RxDataRegFullInterruptEnable);
|
||
|
|
handle->state = (uint32_t)kFLEXIO_I2S_Idle;
|
||
|
|
|
||
|
|
/* Clear the queue */
|
||
|
|
(void)memset(handle->queue, 0, sizeof(flexio_i2s_transfer_t) * FLEXIO_I2S_XFER_QUEUE_SIZE);
|
||
|
|
handle->queueDriver = 0;
|
||
|
|
handle->queueUser = 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* brief Gets the remaining bytes to be sent.
|
||
|
|
*
|
||
|
|
* param base Pointer to FLEXIO_I2S_Type structure.
|
||
|
|
* param handle Pointer to flexio_i2s_handle_t structure which stores the transfer state
|
||
|
|
* param count Bytes sent.
|
||
|
|
* retval kStatus_Success Succeed get the transfer count.
|
||
|
|
* retval kStatus_NoTransferInProgress There is not a non-blocking transaction currently in progress.
|
||
|
|
*/
|
||
|
|
status_t FLEXIO_I2S_TransferGetSendCount(FLEXIO_I2S_Type *base, flexio_i2s_handle_t *handle, size_t *count)
|
||
|
|
{
|
||
|
|
assert(handle != NULL);
|
||
|
|
|
||
|
|
status_t status = kStatus_Success;
|
||
|
|
uint8_t queueDriver = handle->queueDriver;
|
||
|
|
|
||
|
|
if (handle->state != (uint32_t)kFLEXIO_I2S_Busy)
|
||
|
|
{
|
||
|
|
status = kStatus_NoTransferInProgress;
|
||
|
|
}
|
||
|
|
else
|
||
|
|
{
|
||
|
|
*count = (handle->transferSize[queueDriver] - handle->queue[queueDriver].dataSize);
|
||
|
|
}
|
||
|
|
|
||
|
|
return status;
|
||
|
|
}
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* brief Gets the remaining bytes to be received.
|
||
|
|
*
|
||
|
|
* param base Pointer to FLEXIO_I2S_Type structure.
|
||
|
|
* param handle Pointer to flexio_i2s_handle_t structure which stores the transfer state
|
||
|
|
* return count Bytes received.
|
||
|
|
* retval kStatus_Success Succeed get the transfer count.
|
||
|
|
* retval kStatus_NoTransferInProgress There is not a non-blocking transaction currently in progress.
|
||
|
|
*/
|
||
|
|
status_t FLEXIO_I2S_TransferGetReceiveCount(FLEXIO_I2S_Type *base, flexio_i2s_handle_t *handle, size_t *count)
|
||
|
|
{
|
||
|
|
assert(handle != NULL);
|
||
|
|
|
||
|
|
status_t status = kStatus_Success;
|
||
|
|
uint8_t queueDriver = handle->queueDriver;
|
||
|
|
|
||
|
|
if (handle->state != (uint32_t)kFLEXIO_I2S_Busy)
|
||
|
|
{
|
||
|
|
status = kStatus_NoTransferInProgress;
|
||
|
|
}
|
||
|
|
else
|
||
|
|
{
|
||
|
|
*count = (handle->transferSize[queueDriver] - handle->queue[queueDriver].dataSize);
|
||
|
|
}
|
||
|
|
|
||
|
|
return status;
|
||
|
|
}
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* brief Tx interrupt handler.
|
||
|
|
*
|
||
|
|
* param i2sBase Pointer to FLEXIO_I2S_Type structure.
|
||
|
|
* param i2sHandle Pointer to flexio_i2s_handle_t structure
|
||
|
|
*/
|
||
|
|
void FLEXIO_I2S_TransferTxHandleIRQ(void *i2sBase, void *i2sHandle)
|
||
|
|
{
|
||
|
|
assert(i2sHandle != NULL);
|
||
|
|
|
||
|
|
flexio_i2s_handle_t *handle = (flexio_i2s_handle_t *)i2sHandle;
|
||
|
|
FLEXIO_I2S_Type *base = (FLEXIO_I2S_Type *)i2sBase;
|
||
|
|
uint8_t *buffer = handle->queue[handle->queueDriver].data;
|
||
|
|
uint8_t dataSize = handle->bitWidth / 8U;
|
||
|
|
|
||
|
|
/* Handle error */
|
||
|
|
if ((FLEXIO_GetShifterErrorFlags(base->flexioBase) & (1UL << base->txShifterIndex)) != 0UL)
|
||
|
|
{
|
||
|
|
FLEXIO_ClearShifterErrorFlags(base->flexioBase, (1UL << base->txShifterIndex));
|
||
|
|
}
|
||
|
|
/* Handle transfer */
|
||
|
|
if (((FLEXIO_I2S_GetStatusFlags(base) & (uint32_t)kFLEXIO_I2S_TxDataRegEmptyFlag) != 0UL) &&
|
||
|
|
(handle->queue[handle->queueDriver].data != NULL))
|
||
|
|
{
|
||
|
|
FLEXIO_I2S_WriteNonBlocking(base, handle->bitWidth, buffer, dataSize);
|
||
|
|
|
||
|
|
/* Update internal counter */
|
||
|
|
handle->queue[handle->queueDriver].dataSize -= dataSize;
|
||
|
|
handle->queue[handle->queueDriver].data =
|
||
|
|
(uint8_t *)((uint32_t)handle->queue[handle->queueDriver].data + dataSize);
|
||
|
|
}
|
||
|
|
|
||
|
|
/* If finished a block, call the callback function */
|
||
|
|
if ((handle->queue[handle->queueDriver].dataSize == 0U) && (handle->queue[handle->queueDriver].data != NULL))
|
||
|
|
{
|
||
|
|
(void)memset(&handle->queue[handle->queueDriver], 0, sizeof(flexio_i2s_transfer_t));
|
||
|
|
handle->queueDriver = (handle->queueDriver + 1U) % FLEXIO_I2S_XFER_QUEUE_SIZE;
|
||
|
|
if (handle->callback != NULL)
|
||
|
|
{
|
||
|
|
(handle->callback)(base, handle, kStatus_Success, handle->userData);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
/* If all data finished, just stop the transfer */
|
||
|
|
if (handle->queue[handle->queueDriver].data == NULL)
|
||
|
|
{
|
||
|
|
FLEXIO_I2S_TransferAbortSend(base, handle);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* brief Rx interrupt handler.
|
||
|
|
*
|
||
|
|
* param i2sBase Pointer to FLEXIO_I2S_Type structure.
|
||
|
|
* param i2sHandle Pointer to flexio_i2s_handle_t structure.
|
||
|
|
*/
|
||
|
|
void FLEXIO_I2S_TransferRxHandleIRQ(void *i2sBase, void *i2sHandle)
|
||
|
|
{
|
||
|
|
assert(i2sHandle != NULL);
|
||
|
|
|
||
|
|
flexio_i2s_handle_t *handle = (flexio_i2s_handle_t *)i2sHandle;
|
||
|
|
FLEXIO_I2S_Type *base = (FLEXIO_I2S_Type *)i2sBase;
|
||
|
|
uint8_t *buffer = handle->queue[handle->queueDriver].data;
|
||
|
|
uint8_t dataSize = handle->bitWidth / 8U;
|
||
|
|
|
||
|
|
/* Handle transfer */
|
||
|
|
if (((FLEXIO_I2S_GetStatusFlags(base) & (uint32_t)kFLEXIO_I2S_RxDataRegFullFlag) != 0UL) &&
|
||
|
|
(handle->queue[handle->queueDriver].data != NULL))
|
||
|
|
{
|
||
|
|
FLEXIO_I2S_ReadNonBlocking(base, handle->bitWidth, buffer, dataSize);
|
||
|
|
|
||
|
|
/* Update internal state */
|
||
|
|
handle->queue[handle->queueDriver].dataSize -= dataSize;
|
||
|
|
handle->queue[handle->queueDriver].data =
|
||
|
|
(uint8_t *)((uint32_t)handle->queue[handle->queueDriver].data + dataSize);
|
||
|
|
}
|
||
|
|
|
||
|
|
/* If finished a block, call the callback function */
|
||
|
|
if ((handle->queue[handle->queueDriver].dataSize == 0U) && (handle->queue[handle->queueDriver].data != NULL))
|
||
|
|
{
|
||
|
|
(void)memset(&handle->queue[handle->queueDriver], 0, sizeof(flexio_i2s_transfer_t));
|
||
|
|
handle->queueDriver = (handle->queueDriver + 1U) % FLEXIO_I2S_XFER_QUEUE_SIZE;
|
||
|
|
if (handle->callback != NULL)
|
||
|
|
{
|
||
|
|
(handle->callback)(base, handle, kStatus_Success, handle->userData);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
/* If all data finished, just stop the transfer */
|
||
|
|
if (handle->queue[handle->queueDriver].data == NULL)
|
||
|
|
{
|
||
|
|
FLEXIO_I2S_TransferAbortReceive(base, handle);
|
||
|
|
}
|
||
|
|
}
|