349 lines
14 KiB
C
349 lines
14 KiB
C
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//*****************************************************************************
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//
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// am_hal_adc.h
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//! @file
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//!
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//! @brief Functions for interfacing with the Analog to Digital Converter
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//!
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//! @addtogroup adc2 Analog-to-Digital Converter (ADC)
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//! @ingroup apollo2hal
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//! @{
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//
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//*****************************************************************************
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//*****************************************************************************
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//
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// Copyright (c) 2017, Ambiq Micro
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// All rights reserved.
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions are met:
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//
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// 1. Redistributions of source code must retain the above copyright notice,
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// this list of conditions and the following disclaimer.
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//
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// 2. Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the distribution.
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//
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// 3. Neither the name of the copyright holder nor the names of its
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// contributors may be used to endorse or promote products derived from this
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// software without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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// POSSIBILITY OF SUCH DAMAGE.
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//
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// This is part of revision 1.2.9 of the AmbiqSuite Development Package.
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//
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//*****************************************************************************
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#ifndef AM_HAL_ADC_H
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#define AM_HAL_ADC_H
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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//*****************************************************************************
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//
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//! @name Clock Selection
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//! @brief These macros may be used to set the ADC module's clock source.
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//! @{
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//
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//*****************************************************************************
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#define AM_HAL_ADC_CLOCK_OFF AM_REG_ADC_CFG_CLKSEL_OFF
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#define AM_HAL_ADC_CLOCK_HFRC AM_REG_ADC_CFG_CLKSEL_HFRC
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#define AM_HAL_ADC_CLOCK_DIV2 AM_REG_ADC_CFG_CLKSEL_HFRC_DIV2
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//! @}
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//*****************************************************************************
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//
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//! @name Trigger Settings
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//! @brief ADC trigger setting macros.
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//!
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//! These macros alter the ADC's trigger source and trigger polarity. Note that
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//! the external trigger setting needs to be ORed with a POS or NEG option to
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//! define the desired trigger polarity.
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//! @{
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//
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//*****************************************************************************
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#define AM_HAL_ADC_TRIGGER_SOFT AM_REG_ADC_CFG_TRIGSEL_SWT
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#define AM_HAL_ADC_TRIGGER_VCOMP AM_REG_ADC_CFG_TRIGSEL_VCOMP
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#define AM_HAL_ADC_TRIGGER_EXT0 AM_REG_ADC_CFG_TRIGSEL_EXT0
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#define AM_HAL_ADC_TRIGGER_EXT1 AM_REG_ADC_CFG_TRIGSEL_EXT1
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#define AM_HAL_ADC_TRIGGER_EXT2 AM_REG_ADC_CFG_TRIGSEL_EXT2
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#define AM_HAL_ADC_TRIGGER_EXT3 AM_REG_ADC_CFG_TRIGSEL_EXT3
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#define AM_HAL_ADC_TRIGGER_FALL AM_REG_ADC_CFG_TRIGPOL_FALLING_EDGE
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#define AM_HAL_ADC_TRIGGER_RISE AM_REG_ADC_CFG_TRIGPOL_RISING_EDGE
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//! @}
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//*****************************************************************************
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//
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//! @name Reference Settings
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//! @brief ADC reference voltage setting macros.
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//!
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//! These macros control the ADC reference voltage source.
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//! @{
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//
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//*****************************************************************************
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#define AM_HAL_ADC_REF_EXT_2P0 AM_REG_ADC_CFG_REFSEL_EXT2P0
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#define AM_HAL_ADC_REF_EXT_1P5 AM_REG_ADC_CFG_REFSEL_EXT1P5
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#define AM_HAL_ADC_REF_INT_2P0 AM_REG_ADC_CFG_REFSEL_INT2P0
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#define AM_HAL_ADC_REF_INT_1P5 AM_REG_ADC_CFG_REFSEL_INT1P5
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//! @}
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//*****************************************************************************
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//
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//! @name Clock Mode
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//! @brief ADC clock mode settings
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//!
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//! These macros determine whether the ADC shuts down its clock between
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//! samples. Shutting down the clock will reduce power consumption, but
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//! increase latency. This setting is only valid for LPMODE 0. For other modes,
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//! it will be ignored.
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//!
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//! @{
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//
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//*****************************************************************************
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#define AM_HAL_ADC_CK_LOW_POWER AM_REG_ADC_CFG_CKMODE_LPCKMODE
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#define AM_HAL_ADC_CK_LOW_LATENCY AM_REG_ADC_CFG_CKMODE_LLCKMODE
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//! @}
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//*****************************************************************************
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//
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//! @name Low Power Mode
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//! @brief ADC power conservation settings.
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//!
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//! These macros select the power state to enter between active scans. Each low
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//! power mode has its own set of timing constraints. Please see the datasheet
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//! for additional timing information on each power mode.
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//! @{
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//
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//*****************************************************************************
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#define AM_HAL_ADC_LPMODE_0 AM_REG_ADC_CFG_LPMODE_MODE0
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#define AM_HAL_ADC_LPMODE_1 AM_REG_ADC_CFG_LPMODE_MODE1
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//! @}
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//*****************************************************************************
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//
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//! @name Repeat Mode
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//! @brief Enable repeating scan mode.
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//!
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//! Use this macro to enable repeating scans using timer 3.
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//!
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//! @{
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//
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//*****************************************************************************
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#define AM_HAL_ADC_REPEAT AM_REG_ADC_CFG_RPTEN(1)
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#define AM_HAL_ADC_NO_REPEAT AM_REG_ADC_CFG_RPTEN(0)
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//! @}
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//*****************************************************************************
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//
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//! @name Slot configuration
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//! @brief Slot configuration macros
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//!
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//! These macros may be used to configure an individual ADC slot.
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//! @{
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//
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//*****************************************************************************
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// Set number of samples to average.
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#define AM_HAL_ADC_SLOT_AVG_1 AM_REG_ADC_SL0CFG_ADSEL0(0)
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#define AM_HAL_ADC_SLOT_AVG_2 AM_REG_ADC_SL0CFG_ADSEL0(1)
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#define AM_HAL_ADC_SLOT_AVG_4 AM_REG_ADC_SL0CFG_ADSEL0(2)
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#define AM_HAL_ADC_SLOT_AVG_8 AM_REG_ADC_SL0CFG_ADSEL0(3)
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#define AM_HAL_ADC_SLOT_AVG_16 AM_REG_ADC_SL0CFG_ADSEL0(4)
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#define AM_HAL_ADC_SLOT_AVG_32 AM_REG_ADC_SL0CFG_ADSEL0(5)
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#define AM_HAL_ADC_SLOT_AVG_64 AM_REG_ADC_SL0CFG_ADSEL0(6)
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#define AM_HAL_ADC_SLOT_AVG_128 AM_REG_ADC_SL0CFG_ADSEL0(7)
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// Set slot precision mode.
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#define AM_HAL_ADC_SLOT_14BIT AM_REG_ADC_SL0CFG_PRMODE0_P14B
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#define AM_HAL_ADC_SLOT_12BIT AM_REG_ADC_SL0CFG_PRMODE0_P14B
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#define AM_HAL_ADC_SLOT_10BIT AM_REG_ADC_SL0CFG_PRMODE0_P14B
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#define AM_HAL_ADC_SLOT_8BIT AM_REG_ADC_SL0CFG_PRMODE0_P14B
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// Select a channel by number.
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#define AM_HAL_ADC_SLOT_CHANNEL(n) AM_REG_ADC_SL0CFG_CHSEL0(n)
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// Single-ended channels
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#define AM_HAL_ADC_SLOT_CHSEL_SE0 AM_REG_ADC_SL0CFG_CHSEL0_SE0
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#define AM_HAL_ADC_SLOT_CHSEL_SE1 AM_REG_ADC_SL0CFG_CHSEL0_SE1
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#define AM_HAL_ADC_SLOT_CHSEL_SE2 AM_REG_ADC_SL0CFG_CHSEL0_SE2
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#define AM_HAL_ADC_SLOT_CHSEL_SE3 AM_REG_ADC_SL0CFG_CHSEL0_SE3
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#define AM_HAL_ADC_SLOT_CHSEL_SE4 AM_REG_ADC_SL0CFG_CHSEL0_SE4
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#define AM_HAL_ADC_SLOT_CHSEL_SE5 AM_REG_ADC_SL0CFG_CHSEL0_SE5
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#define AM_HAL_ADC_SLOT_CHSEL_SE6 AM_REG_ADC_SL0CFG_CHSEL0_SE6
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#define AM_HAL_ADC_SLOT_CHSEL_SE7 AM_REG_ADC_SL0CFG_CHSEL0_SE7
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#define AM_HAL_ADC_SLOT_CHSEL_SE8 AM_REG_ADC_SL0CFG_CHSEL0_SE8
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#define AM_HAL_ADC_SLOT_CHSEL_SE9 AM_REG_ADC_SL0CFG_CHSEL0_SE9
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// Differential channels.
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#define AM_HAL_ADC_SLOT_CHSEL_DF0 AM_REG_ADC_SL0CFG_CHSEL0_DF0
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#define AM_HAL_ADC_SLOT_CHSEL_DF1 AM_REG_ADC_SL0CFG_CHSEL0_DF1
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// Miscellaneous other signals.
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#define AM_HAL_ADC_SLOT_CHSEL_TEMP AM_REG_ADC_SL0CFG_CHSEL0_TEMP
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#define AM_HAL_ADC_SLOT_CHSEL_VSS AM_REG_ADC_SL0CFG_CHSEL0_VSS
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#define AM_HAL_ADC_SLOT_CHSEL_VBATT AM_REG_ADC_SL0CFG_CHSEL0_BATT
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// Window enable.
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#define AM_HAL_ADC_SLOT_WINDOW_EN AM_REG_ADC_SL0CFG_WCEN0(1)
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// Enable the slot.
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#define AM_HAL_ADC_SLOT_ENABLE AM_REG_ADC_SL0CFG_SLEN0(1)
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//! @}
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//*****************************************************************************
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//
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//! @name Interrupt Status Bits
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//! @brief Interrupt Status Bits for enable/disble use
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//!
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//! These macros may be used to enable an individual ADC interrupt cause.
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//! @{
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//
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//*****************************************************************************
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#define AM_HAL_ADC_INT_WCINC AM_REG_ADC_INTEN_WCINC(1)
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#define AM_HAL_ADC_INT_WCEXC AM_REG_ADC_INTEN_WCEXC(1)
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#define AM_HAL_ADC_INT_FIFOOVR2 AM_REG_ADC_INTEN_FIFOOVR2(1)
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#define AM_HAL_ADC_INT_FIFOOVR1 AM_REG_ADC_INTEN_FIFOOVR1(1)
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#define AM_HAL_ADC_INT_SCNCMP AM_REG_ADC_INTEN_SCNCMP(1)
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#define AM_HAL_ADC_INT_CNVCMP AM_REG_ADC_INTEN_CNVCMP(1)
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//! @}
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//*****************************************************************************
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//
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//! @name Temperature Trim Value Locations
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//! @brief Temperature calibration cofficients are stored in readable space.
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//!
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//! These macros are used to access the temperature trim values in readable
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//! space.
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//! @{
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//
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//*****************************************************************************
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#define AM_HAL_ADC_CALIB_TEMP_ADDR (0x50023010)
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#define AM_HAL_ADC_CALIB_AMBIENT_ADDR (0x50023014)
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#define AM_HAL_ADC_CALIB_ADC_OFFSET_ADDR (0x50023018)
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//
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// Default coefficients (used when trims not provided):
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// TEMP_DEFAULT = Temperature in deg K (e.g. 299.5 - 273.15 = 26.35)
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// AMBIENT_DEFAULT = Voltage measurement at default temperature.
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// OFFSET_DEFAULT = Default ADC offset at 1v.
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//
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#define AM_HAL_ADC_CALIB_TEMP_DEFAULT (299.5F)
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#define AM_HAL_ADC_CALIB_AMBIENT_DEFAULT (1.02809F)
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#define AM_HAL_ADC_CALIB_ADC_OFFSET_DEFAULT (-0.004281F)
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//! @}
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//*****************************************************************************
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//
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//! @brief Configuration structure for the ADC.
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//
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//*****************************************************************************
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typedef struct
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{
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//! Select the ADC Clock source using one of the clock source macros.
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uint32_t ui32Clock;
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//! Select the ADC trigger source using a trigger source macro.
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uint32_t ui32TriggerConfig;
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//! Use a macro to select the ADC reference voltage.
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uint32_t ui32Reference;
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//! Use a macro to decide whether to disable clocks between samples.
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uint32_t ui32ClockMode;
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//! Use a macro to select the ADC power mode.
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uint32_t ui32PowerMode;
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//! Select whether the ADC will re-trigger based on a signal from timer 3.
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uint32_t ui32Repeat;
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}
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am_hal_adc_config_t;
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//*****************************************************************************
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//
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//! @brief ADC Fifo Read macros
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//!
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//! These are helper macros for interpreting FIFO data. Each ADC FIFO entry
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//! contains information about the slot number and the FIFO depth alongside the
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//! current sample. These macros perform the correct masking and shifting to
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//! read those values.
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//!
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//! The SAMPLE and FULL_SAMPLE options refer to the fractional part of averaged
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//! samples. If you are not using hardware averaging or don't need the
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//! fractional part of the ADC sample, you should just use
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//! AM_HAL_ADC_FIFO_SAMPLE.
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//!
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//! If you do need the fractional part, use AM_HAL_ADC_FIFO_FULL_SAMPLE. This
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//! macro will keep six bits of precision past the decimal point. Depending on
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//! the number of averaged samples, anywhere between 1 and 6 of these bits will
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//! be valid. Please consult the datasheet to find out how many bits of data
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//! are valid for your chosen averaging settings.
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//!
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//! @{
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//
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//*****************************************************************************
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#define AM_HAL_ADC_FIFO_SAMPLE(value) \
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((((value) & AM_REG_ADC_FIFO_DATA_M) >> AM_REG_ADC_FIFO_DATA_S) >> 6)
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#define AM_HAL_ADC_FIFO_FULL_SAMPLE(value) \
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(((value) & AM_REG_ADC_FIFO_DATA_M) >> AM_REG_ADC_FIFO_DATA_S )
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#define AM_HAL_ADC_FIFO_SLOT(value) \
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(((value) & AM_REG_ADC_FIFO_SLOTNUM_M) >> AM_REG_ADC_FIFO_SLOTNUM_S)
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#define AM_HAL_ADC_FIFO_COUNT(value) \
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(((value) & AM_REG_ADC_FIFO_COUNT_M) >> AM_REG_ADC_FIFO_COUNT_S)
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//! @}
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//*****************************************************************************
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//
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// External function definitions
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//
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//*****************************************************************************
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extern void am_hal_adc_config(am_hal_adc_config_t *psConfig);
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extern void am_hal_adc_window_set(uint32_t ui32Upper, uint32_t ui32Lower);
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extern void am_hal_adc_slot_config(uint32_t ui32SlotNumber,
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uint32_t ui32SlotConfig);
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extern uint32_t am_hal_adc_fifo_peek(void);
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extern uint32_t am_hal_adc_fifo_pop(void);
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extern void am_hal_adc_trigger(void);
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extern void am_hal_adc_enable(void);
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extern void am_hal_adc_disable(void);
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extern void am_hal_adc_int_enable(uint32_t ui32Interrupt);
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extern uint32_t am_hal_adc_int_enable_get(void);
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extern void am_hal_adc_int_disable(uint32_t ui32Interrupt);
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extern void am_hal_adc_int_clear(uint32_t ui32Interrupt);
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extern void am_hal_adc_int_set(uint32_t ui32Interrupt);
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extern uint32_t am_hal_adc_int_status_get(bool bEnabledOnly);
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extern float am_hal_adc_volts_to_celsius(float fVoltage);
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extern void am_hal_adc_temp_trims_get(float * pfTemp, float * pfVoltage, float * pfOffsetV);
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|
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#ifdef __cplusplus
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||
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|
}
|
||
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|
#endif
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|
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#endif // AM_HAL_ADC_H
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||
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|
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||
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//*****************************************************************************
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||
|
|
//
|
||
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|
// End Doxygen group.
|
||
|
|
//! @}
|
||
|
|
//
|
||
|
|
//*****************************************************************************
|