345 lines
9.3 KiB
C
345 lines
9.3 KiB
C
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/*
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* Copyright (c) 2016, Freescale Semiconductor, Inc.
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* Copyright 2016-2020 NXP
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* All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef _FSL_GPIO_H_
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#define _FSL_GPIO_H_
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#include "fsl_common.h"
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/*!
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* @addtogroup gpio_driver
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* @{
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*/
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/*******************************************************************************
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* Definitions
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******************************************************************************/
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/*! @name Driver version */
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/*@{*/
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/*! @brief GPIO driver version. */
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#define FSL_GPIO_DRIVER_VERSION (MAKE_VERSION(2, 0, 5))
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/*@}*/
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/*! @brief GPIO direction definition. */
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typedef enum _gpio_pin_direction
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{
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kGPIO_DigitalInput = 0U, /*!< Set current pin as digital input.*/
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kGPIO_DigitalOutput = 1U, /*!< Set current pin as digital output.*/
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} gpio_pin_direction_t;
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/*! @brief GPIO interrupt mode definition. */
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typedef enum _gpio_interrupt_mode
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{
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kGPIO_NoIntmode = 0U, /*!< Set current pin general IO functionality.*/
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kGPIO_IntLowLevel = 1U, /*!< Set current pin interrupt is low-level sensitive.*/
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kGPIO_IntHighLevel = 2U, /*!< Set current pin interrupt is high-level sensitive.*/
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kGPIO_IntRisingEdge = 3U, /*!< Set current pin interrupt is rising-edge sensitive.*/
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kGPIO_IntFallingEdge = 4U, /*!< Set current pin interrupt is falling-edge sensitive.*/
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kGPIO_IntRisingOrFallingEdge = 5U, /*!< Enable the edge select bit to override the ICR register's configuration.*/
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} gpio_interrupt_mode_t;
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/*! @brief GPIO Init structure definition. */
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typedef struct _gpio_pin_config
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{
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gpio_pin_direction_t direction; /*!< Specifies the pin direction. */
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uint8_t outputLogic; /*!< Set a default output logic, which has no use in input */
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gpio_interrupt_mode_t
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interruptMode; /*!< Specifies the pin interrupt mode, a value of @ref gpio_interrupt_mode_t. */
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} gpio_pin_config_t;
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/*******************************************************************************
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* API
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******************************************************************************/
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#if defined(__cplusplus)
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extern "C" {
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#endif
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/*!
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* @name GPIO Initialization and Configuration functions
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* @{
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*/
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/*!
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* @brief Initializes the GPIO peripheral according to the specified
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* parameters in the initConfig.
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*
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* @param base GPIO base pointer.
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* @param pin Specifies the pin number
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* @param Config pointer to a @ref gpio_pin_config_t structure that
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* contains the configuration information.
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*/
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void GPIO_PinInit(GPIO_Type *base, uint32_t pin, const gpio_pin_config_t *Config);
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/*@}*/
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/*!
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* @name GPIO Reads and Write Functions
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* @{
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*/
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/*!
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* @brief Sets the output level of the individual GPIO pin to logic 1 or 0.
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*
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* @param base GPIO base pointer.
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* @param pin GPIO port pin number.
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* @param output GPIOpin output logic level.
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* - 0: corresponding pin output low-logic level.
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* - 1: corresponding pin output high-logic level.
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*/
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void GPIO_PinWrite(GPIO_Type *base, uint32_t pin, uint8_t output);
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/*!
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* @brief Sets the output level of the individual GPIO pin to logic 1 or 0.
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* @deprecated Do not use this function. It has been superceded by @ref GPIO_PinWrite.
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*/
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static inline void GPIO_WritePinOutput(GPIO_Type *base, uint32_t pin, uint8_t output)
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{
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GPIO_PinWrite(base, pin, output);
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}
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/*!
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* @brief Sets the output level of the multiple GPIO pins to the logic 1.
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*
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* @param base GPIO peripheral base pointer (GPIO1, GPIO2, GPIO3, and so on.)
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* @param mask GPIO pin number macro
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*/
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static inline void GPIO_PortSet(GPIO_Type *base, uint32_t mask)
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{
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#if (defined(FSL_FEATURE_IGPIO_HAS_DR_SET) && (FSL_FEATURE_IGPIO_HAS_DR_SET == 1))
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base->DR_SET = mask;
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#else
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base->DR |= mask;
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#endif /* FSL_FEATURE_IGPIO_HAS_DR_SET */
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}
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/*!
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* @brief Sets the output level of the multiple GPIO pins to the logic 1.
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* @deprecated Do not use this function. It has been superceded by @ref GPIO_PortSet.
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*/
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static inline void GPIO_SetPinsOutput(GPIO_Type *base, uint32_t mask)
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{
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GPIO_PortSet(base, mask);
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}
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/*!
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* @brief Sets the output level of the multiple GPIO pins to the logic 0.
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*
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* @param base GPIO peripheral base pointer (GPIO1, GPIO2, GPIO3, and so on.)
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* @param mask GPIO pin number macro
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*/
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static inline void GPIO_PortClear(GPIO_Type *base, uint32_t mask)
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{
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#if (defined(FSL_FEATURE_IGPIO_HAS_DR_CLEAR) && (FSL_FEATURE_IGPIO_HAS_DR_CLEAR == 1))
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base->DR_CLEAR = mask;
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#else
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base->DR &= ~mask;
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#endif /* FSL_FEATURE_IGPIO_HAS_DR_CLEAR */
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}
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/*!
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* @brief Sets the output level of the multiple GPIO pins to the logic 0.
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* @deprecated Do not use this function. It has been superceded by @ref GPIO_PortClear.
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*/
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static inline void GPIO_ClearPinsOutput(GPIO_Type *base, uint32_t mask)
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{
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GPIO_PortClear(base, mask);
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}
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/*!
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* @brief Reverses the current output logic of the multiple GPIO pins.
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*
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* @param base GPIO peripheral base pointer (GPIO1, GPIO2, GPIO3, and so on.)
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* @param mask GPIO pin number macro
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*/
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static inline void GPIO_PortToggle(GPIO_Type *base, uint32_t mask)
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{
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#if (defined(FSL_FEATURE_IGPIO_HAS_DR_TOGGLE) && (FSL_FEATURE_IGPIO_HAS_DR_TOGGLE == 1))
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base->DR_TOGGLE = mask;
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#else
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base->DR ^= mask;
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#endif /* FSL_FEATURE_IGPIO_HAS_DR_TOGGLE */
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}
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/*!
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* @brief Reads the current input value of the GPIO port.
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*
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* @param base GPIO base pointer.
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* @param pin GPIO port pin number.
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* @retval GPIO port input value.
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*/
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static inline uint32_t GPIO_PinRead(GPIO_Type *base, uint32_t pin)
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{
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assert(pin < 32U);
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return (((base->DR) >> pin) & 0x1U);
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}
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/*!
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* @brief Reads the current input value of the GPIO port.
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* @deprecated Do not use this function. It has been superceded by @ref GPIO_PinRead.
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*/
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static inline uint32_t GPIO_ReadPinInput(GPIO_Type *base, uint32_t pin)
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{
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return GPIO_PinRead(base, pin);
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}
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/*@}*/
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/*!
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* @name GPIO Reads Pad Status Functions
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* @{
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*/
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/*!
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* @brief Reads the current GPIO pin pad status.
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*
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* @param base GPIO base pointer.
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* @param pin GPIO port pin number.
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* @retval GPIO pin pad status value.
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*/
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static inline uint8_t GPIO_PinReadPadStatus(GPIO_Type *base, uint32_t pin)
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{
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assert(pin < 32U);
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return (uint8_t)(((base->PSR) >> pin) & 0x1U);
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}
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/*!
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* @brief Reads the current GPIO pin pad status.
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* @deprecated Do not use this function. It has been superceded by @ref GPIO_PinReadPadStatus.
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*/
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static inline uint8_t GPIO_ReadPadStatus(GPIO_Type *base, uint32_t pin)
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{
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return GPIO_PinReadPadStatus(base, pin);
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}
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/*@}*/
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/*!
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* @name Interrupts and flags management functions
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* @{
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*/
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/*!
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* @brief Sets the current pin interrupt mode.
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*
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* @param base GPIO base pointer.
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* @param pin GPIO port pin number.
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* @param pinInterruptMode pointer to a @ref gpio_interrupt_mode_t structure
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* that contains the interrupt mode information.
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*/
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void GPIO_PinSetInterruptConfig(GPIO_Type *base, uint32_t pin, gpio_interrupt_mode_t pinInterruptMode);
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/*!
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* @brief Sets the current pin interrupt mode.
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* @deprecated Do not use this function. It has been superceded by @ref GPIO_PinSetInterruptConfig.
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*/
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static inline void GPIO_SetPinInterruptConfig(GPIO_Type *base, uint32_t pin, gpio_interrupt_mode_t pinInterruptMode)
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{
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GPIO_PinSetInterruptConfig(base, pin, pinInterruptMode);
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}
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/*!
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* @brief Enables the specific pin interrupt.
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*
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* @param base GPIO base pointer.
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* @param mask GPIO pin number macro.
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*/
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static inline void GPIO_PortEnableInterrupts(GPIO_Type *base, uint32_t mask)
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{
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base->IMR |= mask;
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}
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/*!
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* @brief Enables the specific pin interrupt.
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*
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* @param base GPIO base pointer.
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* @param mask GPIO pin number macro.
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*/
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static inline void GPIO_EnableInterrupts(GPIO_Type *base, uint32_t mask)
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{
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GPIO_PortEnableInterrupts(base, mask);
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}
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/*!
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* @brief Disables the specific pin interrupt.
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*
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* @param base GPIO base pointer.
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* @param mask GPIO pin number macro.
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*/
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static inline void GPIO_PortDisableInterrupts(GPIO_Type *base, uint32_t mask)
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{
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base->IMR &= ~mask;
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}
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/*!
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* @brief Disables the specific pin interrupt.
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* @deprecated Do not use this function. It has been superceded by @ref GPIO_PortDisableInterrupts.
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*/
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static inline void GPIO_DisableInterrupts(GPIO_Type *base, uint32_t mask)
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{
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GPIO_PortDisableInterrupts(base, mask);
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}
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/*!
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* @brief Reads individual pin interrupt status.
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*
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* @param base GPIO base pointer.
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* @retval current pin interrupt status flag.
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*/
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static inline uint32_t GPIO_PortGetInterruptFlags(GPIO_Type *base)
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{
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return base->ISR;
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}
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/*!
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* @brief Reads individual pin interrupt status.
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*
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* @param base GPIO base pointer.
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* @retval current pin interrupt status flag.
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*/
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static inline uint32_t GPIO_GetPinsInterruptFlags(GPIO_Type *base)
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{
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return GPIO_PortGetInterruptFlags(base);
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}
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/*!
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* @brief Clears pin interrupt flag. Status flags are cleared by
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* writing a 1 to the corresponding bit position.
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*
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* @param base GPIO base pointer.
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* @param mask GPIO pin number macro.
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*/
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static inline void GPIO_PortClearInterruptFlags(GPIO_Type *base, uint32_t mask)
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{
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base->ISR = mask;
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}
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/*!
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* @brief Clears pin interrupt flag. Status flags are cleared by
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* writing a 1 to the corresponding bit position.
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*
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* @param base GPIO base pointer.
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* @param mask GPIO pin number macro.
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*/
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static inline void GPIO_ClearPinsInterruptFlags(GPIO_Type *base, uint32_t mask)
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{
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GPIO_PortClearInterruptFlags(base, mask);
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}
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/*@}*/
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#if defined(__cplusplus)
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}
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#endif
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/*!
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* @}
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*/
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#endif /* _FSL_GPIO_H_*/
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