2024-03-01 10:29:21 +08:00
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/*
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* Copyright (c) 2006-2022, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2022-11-16 GuEe-GUI first version
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*/
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#include <rtatomic.h>
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2024-04-09 21:36:16 +08:00
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#include <drivers/serial_dm.h>
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2024-03-01 10:29:21 +08:00
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int serial_dev_set_name(struct rt_serial_device *sdev)
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{
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int id = -1;
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static int uid_min = -1;
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static volatile rt_atomic_t uid = 0;
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RT_ASSERT(sdev != RT_NULL);
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#ifdef RT_USING_OFW
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if (sdev->parent.ofw_node)
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{
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id = rt_ofw_get_alias_id(sdev->parent.ofw_node, "serial");
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if (id < 0)
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{
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id = rt_ofw_get_alias_id(sdev->parent.ofw_node, "uart");
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}
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if (uid_min < 0)
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{
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uid_min = rt_ofw_get_alias_last_id("serial");
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if (uid_min < 0)
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{
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uid_min = rt_ofw_get_alias_last_id("uart");
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}
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uid_min = uid_min < 0 ? 0 : (uid_min + 1);
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rt_hw_atomic_store(&uid, uid_min);
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}
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}
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#endif
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if (id < 0)
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{
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id = (int)rt_hw_atomic_add(&uid, 1);
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}
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return rt_dm_dev_set_name(&sdev->parent, "uart%u", id);
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}
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void *serial_base_from_args(char *str)
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{
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rt_ubase_t base = 0;
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while (*str && !(*str == 'x' || *str == 'X'))
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{
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++str;
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}
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++str;
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/* The str may get from bootargs that we need check it */
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while (*str)
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{
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if ((*str >= 'a' && *str <= 'f') || (*str >= 'A' && *str <= 'F'))
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{
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base = (base << 4) | (((*str | ' ') - 'a') + 10);
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}
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else if (*str >= '0' && *str <= '9')
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{
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base = (base << 4) | (*str - '0');
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}
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else break;
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++str;
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}
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return (void *)base;
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}
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2024-04-09 21:36:16 +08:00
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struct serial_configure serial_cfg_from_args(char *_str)
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2024-03-01 10:29:21 +08:00
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{
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2024-04-09 21:36:16 +08:00
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char *str = _str;
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2024-03-01 10:29:21 +08:00
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struct serial_configure cfg = RT_SERIAL_CONFIG_DEFAULT;
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/* Format baudrate/parity/bits/flow (BBBBPNF), Default is 115200n8 */
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if (str && *str)
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{
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rt_uint32_t baudrate = 0;
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/* BBBB is the speed */
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while (*str && (*str >= '0' && *str <= '9'))
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{
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baudrate *= 10;
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baudrate += *str - '0';
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++str;
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}
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if (baudrate)
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{
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cfg.baud_rate = baudrate;
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}
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/* P is parity (n/o/e) */
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switch (*str)
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{
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case 'n':
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cfg.parity = PARITY_NONE;
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break;
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case 'o':
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cfg.parity = PARITY_ODD;
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break;
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case 'e':
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cfg.parity = PARITY_EVEN;
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break;
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default:
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--str;
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break;
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}
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++str;
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/* N is number of bits */
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if (*str && (*str >= '0' && *str <= '9'))
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{
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cfg.data_bits = *str - '0';
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++str;
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}
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/* F is flow ontrol ('r' for RTS) */
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if (*str)
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{
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cfg.flowcontrol = (*str == 'r' ? RT_SERIAL_FLOWCONTROL_CTSRTS : RT_SERIAL_FLOWCONTROL_NONE);
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++str;
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}
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#ifdef RT_USING_OFW
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if (*str == '\0')
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{
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const char earlycon_magic[] = { 'O', 'F', 'W', '\0' };
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if (!rt_strcmp(++str, earlycon_magic))
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{
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/* Is OFW earlycon, we should ACK it */
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rt_memset(str, 0, RT_ARRAY_SIZE(earlycon_magic));
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}
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}
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#endif
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}
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return cfg;
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}
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