138 lines
3.7 KiB
C
138 lines
3.7 KiB
C
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#ifndef SUNXI_HAL_TWI_H
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#define SUNXI_HAL_TWI_H
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#include "hal_sem.h"
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#include "hal_clk.h"
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#include "sunxi_hal_common.h"
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#include "hal_gpio.h"
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#include "sunxi_hal_regulator.h"
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#include <twi/platform_twi.h>
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#include <twi/common_twi.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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//for debug
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#define CONFIG_DRIVERS_TWI_DEBUG
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#ifndef CONFIG_DRIVERS_TWI_DEBUG
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#define TWI_INFO(fmt, arg...) hal_log_info(fmt, ##arg)
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#else
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#define TWI_INFO(fmt, arg...) do {}while(0)
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#endif
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#define TWI_ERR(fmt, arg...) hal_log_err(fmt, ##arg)
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typedef enum
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{
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TWI_XFER_IDLE = 0x1,
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TWI_XFER_START = 0x2,
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TWI_XFER_RUNNING = 0x4,
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} twi_xfer_status_t;
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/** @brief This enum defines the HAL interface return value. */
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typedef enum
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{
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TWI_STATUS_ERROR = -4, /**< An error occurred and the transaction has failed. */
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//TWI_STATUS_ERROR_TIMEOUT = -4, /**< The TWI bus xfer timeout, an error occurred. */
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TWI_STATUS_ERROR_BUSY = -3, /**< The TWI bus is busy, an error occurred. */
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TWI_STATUS_INVALID_PORT_NUMBER = -2, /**< A wrong port number is given. */
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TWI_STATUS_INVALID_PARAMETER = -1, /**< A wrong parameter is given. */
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TWI_STATUS_OK = 0 /**< No error occurred during the function call. */
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} twi_status_t;
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typedef enum
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{
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TWI_MASTER_0, /**< TWI master 0. */
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TWI_MASTER_1, /**< TWI master 1. */
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TWI_MASTER_2, /**< TWI master 0. */
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TWI_MASTER_3, /**< TWI master 1. */
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S_TWI_MASTER_0, /**< S_TWI master 0. */
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TWI_MASTER_MAX /**< max TWI master number, \<invalid\> */
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} twi_port_t;
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/** @brief This enum defines the TWI transaction speed. */
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typedef enum
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{
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TWI_FREQUENCY_100K = 100000, /**< 100kbps. */
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TWI_FREQUENCY_200K = 200000, /**< 200kbps. */
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TWI_FREQUENCY_400K = 400000, /**< 400kbps. */
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} twi_frequency_t;
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/** @brief This enum defines the TWI transaction speed. */
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typedef enum
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{
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ENGINE_XFER = 0,
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TWI_DRV_XFER = 1,
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} twi_mode_t;
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typedef struct twi_msg
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{
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uint16_t addr; /* slave address */
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uint16_t flags;
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#define TWI_M_RD 0x0001 /* read data, from slave to master
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* TWI_M_RD is guaranteed to be 0x0001!
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* */
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#define TWI_M_TEN 0x0010 /* this is a ten bit chip address */
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uint16_t len; /* msg length */
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uint8_t *buf; /* pointer to msg data */
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} twi_msg_t;
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typedef struct sunxi_twi
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{
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uint8_t port;
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uint8_t result;
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uint8_t already_init;
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uint8_t twi_drv_used;
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uint8_t pkt_interval;
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uint16_t slave_addr;
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uint16_t flags;
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uint32_t timeout;
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uint32_t msgs_num;
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uint32_t msgs_idx;
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uint32_t msgs_ptr;
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unsigned long base_addr;
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uint32_t irqnum;
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struct regulator_dev regulator;
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hal_clk_t pclk;
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hal_clk_t mclk;
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twi_frequency_t freq;
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uint32_t pinmux;
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uint32_t pin[TWI_PIN_NUM];
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twi_xfer_status_t status;
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hal_sem_t hal_sem;
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twi_msg_t *msgs;
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struct sunxi_dma_chan *dma_chan;
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hal_sem_t dma_complete;
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} hal_twi_t;
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typedef enum
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{
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I2C_SLAVE = 0,
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I2C_SLAVE_FORCE = 1,
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I2C_TENBIT = 2,
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I2C_RDWR = 3
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} hal_twi_transfer_cmd_t;
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//initialize twi port
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twi_status_t hal_twi_init(twi_port_t port);
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//uninitialize twi port
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twi_status_t hal_twi_uninit(twi_port_t port);
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//twi write
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twi_status_t hal_twi_write(twi_port_t port, unsigned long pos, const void *buf, uint32_t size);
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//twi read
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twi_status_t hal_twi_read(twi_port_t port, unsigned long pos, void *buf, uint32_t size);
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//twi control
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twi_status_t hal_twi_control(twi_port_t port, hal_twi_transfer_cmd_t cmd, void *args);
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#ifdef __cplusplus
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}
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#endif
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#endif
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