2017-08-08 11:56:50 +08:00
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/*
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2021-03-17 02:26:35 +08:00
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* Copyright (c) 2006-2021, RT-Thread Development Team
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2017-08-08 11:56:50 +08:00
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*
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2018-10-22 11:02:14 +08:00
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* SPDX-License-Identifier: Apache-2.0
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2017-08-08 11:56:50 +08:00
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*
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* Change Logs:
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* Date Author Notes
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* 2013-05-19 Bernard The first version for LPC40xx
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* 2017-08-02 XiaoYang porting to LPC54608 bsp
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*/
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#ifndef __DRV_SDRAM_H__
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#define __DRV_SDRAM_H__
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#include <board.h>
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#define IOCON_PIO_DIGITAL_EN 0x0100u /*!< Enables digital function */
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#define IOCON_PIO_FUNC1 0x01u /*!< Selects pin function 1 */
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#define IOCON_PIO_FUNC6 0x06u /*!< Selects pin function 6 */
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#define IOCON_PIO_INPFILT_OFF 0x0200u /*!< Input filter disabled */
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#define IOCON_PIO_INV_DI 0x00u /*!< Input function is not inverted */
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#define IOCON_PIO_MODE_INACT 0x00u /*!< No addition pin function */
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#define IOCON_PIO_OPENDRAIN_DI 0x00u /*!< Open drain is disabled */
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#define IOCON_PIO_SLEW_FAST 0x0400u /*!< Fast mode, slew rate control is disabled */
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#define PIN2_IDX 2u /*!< Pin number for pin 2 in a port 0 */
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#define PIN3_IDX 3u /*!< Pin number for pin 3 in a port 0 */
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#define PIN4_IDX 4u /*!< Pin number for pin 4 in a port 0 */
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#define PIN5_IDX 5u /*!< Pin number for pin 5 in a port 0 */
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#define PIN6_IDX 6u /*!< Pin number for pin 6 in a port 0 */
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#define PIN7_IDX 7u /*!< Pin number for pin 7 in a port 0 */
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#define PIN8_IDX 8u /*!< Pin number for pin 8 in a port 0 */
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#define PIN9_IDX 9u /*!< Pin number for pin 9 in a port 0 */
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#define PIN10_IDX 10u /*!< Pin number for pin 10 in a port 1 */
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#define PIN11_IDX 11u /*!< Pin number for pin 11 in a port 1 */
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#define PIN12_IDX 12u /*!< Pin number for pin 12 in a port 1 */
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#define PIN13_IDX 13u /*!< Pin number for pin 13 in a port 1 */
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#define PIN14_IDX 14u /*!< Pin number for pin 14 in a port 1 */
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#define PIN15_IDX 15u /*!< Pin number for pin 15 in a port 0 */
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#define PIN16_IDX 16u /*!< Pin number for pin 16 in a port 1 */
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#define PIN18_IDX 18u /*!< Pin number for pin 18 in a port 0 */
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#define PIN19_IDX 19u /*!< Pin number for pin 19 in a port 0 */
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#define PIN20_IDX 20u /*!< Pin number for pin 20 in a port 0 */
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#define PIN21_IDX 21u /*!< Pin number for pin 21 in a port 0 */
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#define PIN23_IDX 23u /*!< Pin number for pin 23 in a port 1 */
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#define PIN24_IDX 24u /*!< Pin number for pin 24 in a port 1 */
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#define PIN25_IDX 25u /*!< Pin number for pin 25 in a port 1 */
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#define PIN26_IDX 26u /*!< Pin number for pin 26 in a port 1 */
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#define PIN27_IDX 27u /*!< Pin number for pin 27 in a port 1 */
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#define PIN28_IDX 28u /*!< Pin number for pin 28 in a port 1 */
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#define PIN29_IDX 29u /*!< Pin number for pin 29 in a port 0 */
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#define PIN30_IDX 30u /*!< Pin number for pin 30 in a port 0 */
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#define PIN31_IDX 31u /*!< Pin number for pin 31 in a port 1 */
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#define PORT0_IDX 0u /*!< Port index */
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#define PORT1_IDX 1u /*!< Port index */
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#define PORT3_IDX 3u /*!< Port index */
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/* The SDRAM timing. */
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#define SDRAM_REFRESHPERIOD_NS (64 * 1000000 / 4096) /* 4096 rows/ 64ms */
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#define SDRAM_TRP_NS (18u)
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#define SDRAM_TRAS_NS (42u)
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#define SDRAM_TSREX_NS (67u)
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#define SDRAM_TAPR_NS (18u)
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#define SDRAM_TWRDELT_NS (6u)
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#define SDRAM_TRC_NS (60u)
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#define SDRAM_RFC_NS (60u)
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#define SDRAM_XSR_NS (67u)
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#define SDRAM_RRD_NS (12u)
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#define SDRAM_MRD_NCLK (2u)
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#define SDRAM_RAS_NCLK (2u)
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#define SDRAM_MODEREG_VALUE (0x23u)
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#define SDRAM_DEV_MEMORYMAP (0x09u) /* 128Mbits (8M*16, 4banks, 12 rows, 9 columns)*/
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void lpc_sdram_hw_init(void);
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#endif
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