202 lines
10 KiB
C
202 lines
10 KiB
C
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/***********************************************************************************************************************
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* Copyright [2020-2021] Renesas Electronics Corporation and/or its affiliates. All Rights Reserved.
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*
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* This software and documentation are supplied by Renesas Electronics America Inc. and may only be used with products
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* of Renesas Electronics Corp. and its affiliates ("Renesas"). No other uses are authorized. Renesas products are
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* sold pursuant to Renesas terms and conditions of sale. Purchasers are solely responsible for the selection and use
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* of Renesas products and Renesas assumes no liability. No license, express or implied, to any intellectual property
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* right is granted by Renesas. This software is protected under all applicable laws, including copyright laws. Renesas
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* reserves the right to change or discontinue this software and/or this documentation. THE SOFTWARE AND DOCUMENTATION
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* IS DELIVERED TO YOU "AS IS," AND RENESAS MAKES NO REPRESENTATIONS OR WARRANTIES, AND TO THE FULLEST EXTENT
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* PERMISSIBLE UNDER APPLICABLE LAW, DISCLAIMS ALL WARRANTIES, WHETHER EXPLICITLY OR IMPLICITLY, INCLUDING WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NONINFRINGEMENT, WITH RESPECT TO THE SOFTWARE OR
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* DOCUMENTATION. RENESAS SHALL HAVE NO LIABILITY ARISING OUT OF ANY SECURITY VULNERABILITY OR BREACH. TO THE MAXIMUM
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* EXTENT PERMITTED BY LAW, IN NO EVENT WILL RENESAS BE LIABLE TO YOU IN CONNECTION WITH THE SOFTWARE OR DOCUMENTATION
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* (OR ANY PERSON OR ENTITY CLAIMING RIGHTS DERIVED FROM YOU) FOR ANY LOSS, DAMAGES, OR CLAIMS WHATSOEVER, INCLUDING,
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* WITHOUT LIMITATION, ANY DIRECT, CONSEQUENTIAL, SPECIAL, INDIRECT, PUNITIVE, OR INCIDENTAL DAMAGES; ANY LOST PROFITS,
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* OTHER ECONOMIC DAMAGE, PROPERTY DAMAGE, OR PERSONAL INJURY; AND EVEN IF RENESAS HAS BEEN ADVISED OF THE POSSIBILITY
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* OF SUCH LOSS, DAMAGES, CLAIMS OR COSTS.
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**********************************************************************************************************************/
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#ifndef R_SPI_H
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#define R_SPI_H
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/*******************************************************************************************************************//**
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* @addtogroup SPI
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* @{
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**********************************************************************************************************************/
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/***********************************************************************************************************************
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* Includes
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**********************************************************************************************************************/
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#include "r_spi_api.h"
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/* Common macro for FSP header files. There is also a corresponding FSP_FOOTER macro at the end of this file. */
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FSP_HEADER
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/***********************************************************************************************************************
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* Macro definitions
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**********************************************************************************************************************/
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/*************************************************************************************************
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* Type defines for the SPI interface API
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*************************************************************************************************/
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/** 3-Wire or 4-Wire mode. */
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typedef enum e_spi_ssl_mode
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{
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SPI_SSL_MODE_SPI, ///< SPI operation (4-wire method)
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SPI_SSL_MODE_CLK_SYN ///< Clock Synchronous operation (3-wire method)
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} spi_ssl_mode_t;
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/** Transmit Only (Half Duplex), or Full Duplex. */
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typedef enum e_spi_communication
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{
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SPI_COMMUNICATION_FULL_DUPLEX, ///< Full-Duplex synchronous serial communication
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SPI_COMMUNICATION_TRANSMIT_ONLY ///< Transit only serial communication
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} spi_communication_t;
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/** Slave Select Polarity. */
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typedef enum e_spi_sslp
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{
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SPI_SSLP_LOW, ///< SSLP signal polarity active low
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SPI_SSLP_HIGH ///< SSLP signal polarity active high
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} spi_ssl_polarity_t;
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/** The Slave Select Line */
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typedef enum e_spi_ssl_select
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{
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SPI_SSL_SELECT_SSL0, ///< Select SSL0
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SPI_SSL_SELECT_SSL1, ///< Select SSL1
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SPI_SSL_SELECT_SSL2, ///< Select SSL2
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SPI_SSL_SELECT_SSL3 ///< Select SSL3
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} spi_ssl_select_t;
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/** MOSI Idle Behavior. */
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typedef enum e_spi_mosi_idle_value_fixing
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{
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SPI_MOSI_IDLE_VALUE_FIXING_DISABLE, ///< MOSI output value=value set in MOIFV bit
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SPI_MOSI_IDLE_VALUE_FIXING_LOW, ///< MOSIn level low during MOSI idling
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SPI_MOSI_IDLE_VALUE_FIXING_HIGH ///< MOSIn level high during MOSI idling
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} spi_mosi_idle_value_fixing_t;
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/** Parity Mode */
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typedef enum e_spi_parity_mode
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{
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SPI_PARITY_MODE_DISABLE, ///< Disable parity
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SPI_PARITY_MODE_ODD, ///< Select even parity
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SPI_PARITY_MODE_EVEN ///< Select odd parity
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} spi_parity_t;
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/** Byte Swapping Enable/Disable. */
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typedef enum
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{
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SPI_BYTE_SWAP_DISABLE = 0, ///< Disable Byte swapping for 16/32-Bit transfers
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SPI_BYTE_SWAP_ENABLE ///< Enable Byte swapping for 16/32-Bit transfers
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} spi_byte_swap_t;
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/** Delay count for SPI delay settings. */
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typedef enum e_spi_clock_delay_count
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{
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SPI_DELAY_COUNT_1, ///< Set RSPCK delay count to 1 RSPCK
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SPI_DELAY_COUNT_2, ///< Set RSPCK delay count to 2 RSPCK
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SPI_DELAY_COUNT_3, ///< Set RSPCK delay count to 3 RSPCK
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SPI_DELAY_COUNT_4, ///< Set RSPCK delay count to 4 RSPCK
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SPI_DELAY_COUNT_5, ///< Set RSPCK delay count to 5 RSPCK
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SPI_DELAY_COUNT_6, ///< Set RSPCK delay count to 6 RSPCK
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SPI_DELAY_COUNT_7, ///< Set RSPCK delay count to 7 RSPCK
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SPI_DELAY_COUNT_8 ///< Set RSPCK delay count to 8 RSPCK
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} spi_delay_count_t;
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/** SPI Clock Divider settings. */
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typedef struct
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{
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uint8_t spbr; ///< SPBR register setting
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uint8_t brdv : 2; ///< BRDV setting in SPCMD0
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} rspck_div_setting_t;
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/** Extended SPI interface configuration */
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typedef struct st_spi_extended_cfg
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{
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spi_ssl_mode_t spi_clksyn; ///< Select spi or clock syn mode operation
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spi_communication_t spi_comm; ///< Select full-duplex or transmit-only communication
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spi_ssl_polarity_t ssl_polarity; ///< Select SSLn signal polarity
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spi_ssl_select_t ssl_select; ///< Select which slave to use: 0-SSL0, 1-SSL1, 2-SSL2, 3-SSL3
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spi_mosi_idle_value_fixing_t mosi_idle; ///< Select MOSI idle fixed value and selection
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spi_parity_t parity; ///< Select parity and enable/disable parity
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spi_byte_swap_t byte_swap; ///< Select byte swap mode
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rspck_div_setting_t spck_div; ///< Register values for configuring the SPI Clock Divider.
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spi_delay_count_t spck_delay; ///< SPI Clock Delay Register Setting
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spi_delay_count_t ssl_negation_delay; ///< SPI Slave Select Negation Delay Register Setting
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spi_delay_count_t next_access_delay; ///< SPI Next-Access Delay Register Setting
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} spi_extended_cfg_t;
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/** Channel control block. DO NOT INITIALIZE. Initialization occurs when @ref spi_api_t::open is called. */
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typedef struct st_spi_instance_ctrl
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{
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uint32_t open; ///< Indicates whether the open() API has been successfully called.
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spi_cfg_t const * p_cfg; ///< Pointer to instance configuration
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R_SPI0_Type * p_regs; ///< Base register for this channel
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void const * p_tx_data; ///< Buffer to transmit
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void * p_rx_data; ///< Buffer to receive
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uint32_t tx_count; ///< Number of Data Frames to transfer (8-bit, 16-bit, 32-bit)
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uint32_t rx_count; ///< Number of Data Frames to transfer (8-bit, 16-bit, 32-bit)
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uint32_t count; ///< Number of Data Frames to transfer (8-bit, 16-bit, 32-bit)
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spi_bit_width_t bit_width; ///< Bits per Data frame (8-bit, 16-bit, 32-bit)
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/* Pointer to callback and optional working memory */
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void (* p_callback)(spi_callback_args_t *);
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spi_callback_args_t * p_callback_memory;
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/* Pointer to context to be passed into callback function */
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void const * p_context;
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} spi_instance_ctrl_t;
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/**********************************************************************************************************************
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* Exported global variables
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**********************************************************************************************************************/
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/** @cond INC_HEADER_DEFS_SEC */
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/** Filled in Interface API structure for this Instance. */
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extern const spi_api_t g_spi_on_spi;
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/** @endcond */
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/***********************************************************************************************************************
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* Public APIs
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**********************************************************************************************************************/
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fsp_err_t R_SPI_Open(spi_ctrl_t * p_api_ctrl, spi_cfg_t const * const p_cfg);
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fsp_err_t R_SPI_Read(spi_ctrl_t * const p_api_ctrl,
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void * p_dest,
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uint32_t const length,
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spi_bit_width_t const bit_width);
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fsp_err_t R_SPI_Write(spi_ctrl_t * const p_api_ctrl,
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void const * p_src,
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uint32_t const length,
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spi_bit_width_t const bit_width);
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fsp_err_t R_SPI_WriteRead(spi_ctrl_t * const p_api_ctrl,
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void const * p_src,
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void * p_dest,
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uint32_t const length,
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spi_bit_width_t const bit_width);
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fsp_err_t R_SPI_Close(spi_ctrl_t * const p_api_ctrl);
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fsp_err_t R_SPI_CalculateBitrate(uint32_t bitrate, rspck_div_setting_t * spck_div);
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fsp_err_t R_SPI_CallbackSet(spi_ctrl_t * const p_api_ctrl,
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void ( * p_callback)(spi_callback_args_t *),
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void const * const p_context,
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spi_callback_args_t * const p_callback_memory);
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/*******************************************************************************************************************//**
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* @} (end ingroup SPI)
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**********************************************************************************************************************/
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/** Common macro for FSP header files. There is also a corresponding FSP_HEADER macro at the top of this file. */
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FSP_FOOTER
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#endif
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