100 lines
3.3 KiB
C
100 lines
3.3 KiB
C
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/* ------------------------------------------
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* Copyright (c) 2016, Synopsys, Inc. All rights reserved.
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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* 1) Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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* 2) Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation and/or
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* other materials provided with the distribution.
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* 3) Neither the name of the Synopsys, Inc., nor the names of its contributors may
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* be used to endorse or promote products derived from this software without
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* specific prior written permission.
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* \version 2016.05
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* \date 2014-07-15
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* \author Wayne Ren(Wei.Ren@synopsys.com)
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--------------------------------------------- */
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/**
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* \file
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* \ingroup ARC_HAL_MISC_TIMER
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* \brief header file of ARC internal timer
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*/
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/**
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* \addtogroup ARC_HAL_MISC_TIMER
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* @{
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*/
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#ifndef _ARC_HAL_TIMER_H_
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#define _ARC_HAL_TIMER_H_
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#include "inc/arc/arc.h"
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#include "inc/embARC_toolchain.h"
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/**
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* \name arc internal timers names
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* @{
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*/
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#define TIMER_0 0 /*!< macro name for arc internal timer 0 */
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#define TIMER_1 1 /*!< macro name for arc internal timer 1 */
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#define TIMER_RTC 2 /*!< macro name for arc internal RTC */
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/** @} */
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/**
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* \name bit definition of RTC CTRL reg
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* @{
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*/
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#define TIMER_RTC_ENABLE 0x01 /*!< enable RTC */
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#define TIMER_RTC_CLEAR 0x02 /* clears the AUX_RTC_LOW and AUX_RTC_HIGH */
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#define TIMER_RTC_STATUS_A0 0x40000000 /*!< track bit of atomicity of reads of RTC */
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#define TIMER_RTC_STATUS_A1 0x80000000 /*!< track bit of atomicity of reads of RTC */
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/** @} */
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/**
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* \name bit definition of timer CTRL reg
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* @{
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*/
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#define TIMER_CTRL_IE (1 << 0) /*!< Interrupt when count reaches limit */
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#define TIMER_CTRL_NH (1 << 1) /*!< Count only when CPU NOT halted */
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#define TIMER_CTRL_W (1 << 2) /*!< watchdog enable */
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#define TIMER_CTRL_IP (1 << 3) /*!< interrupt pending */
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/** @} */
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#ifdef __cplusplus
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extern "C" {
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#endif
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extern int32_t arc_timer_present(const uint32_t no);
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extern int32_t arc_timer_start(const uint32_t no, const uint32_t mode, const uint32_t val);
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extern int32_t arc_timer_stop(const uint32_t no);
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extern int32_t arc_timer_current(const uint32_t no, void* val);
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extern int32_t arc_timer_int_clear(const uint32_t no);
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extern void arc_timer_init(void);
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#ifdef __cplusplus
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}
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#endif
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#endif /* _ARC_HAL_TIMER_H_ */
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/** }@*/
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