rt-thread/libcpu/arm/lpc214x/context_gcc.S

102 lines
3.0 KiB
ArmAsm
Raw Normal View History

.global rt_hw_interrupt_disable
.global rt_hw_interrupt_enable
.global rt_hw_context_switch
.global rt_hw_context_switch_to
.global rt_hw_context_switch_interrupt
.equ NOINT, 0xc0
/*
* rt_base_t rt_hw_interrupt_disable();
<EFBFBD>ر<EFBFBD><EFBFBD>жϣ<EFBFBD><EFBFBD>ر<EFBFBD>ǰ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>CPSR<EFBFBD>Ĵ<EFBFBD><EFBFBD><EFBFBD>ֵ
*/
rt_hw_interrupt_disable:
//EXPORT rt_hw_interrupt_disable
MRS r0, cpsr
ORR r1, r0, #NOINT
MSR cpsr_c, r1
BX lr
//ENDP
/*
* void rt_hw_interrupt_enable(rt_base_t level);
<EFBFBD>ָ<EFBFBD><EFBFBD>ж<EFBFBD>״̬
*/
rt_hw_interrupt_enable:
//EXPORT rt_hw_interrupt_enable
MSR cpsr_c, r0
BX lr
//ENDP
/*
* void rt_hw_context_switch(rt_uint32 from, rt_uint32 to);
* r0 --> from
* r1 --> to
<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>̵߳<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>л<EFBFBD>
*/
rt_hw_context_switch:
//EXPORT rt_hw_context_switch
STMFD sp!, {lr} /* push pc (lr should be pushed in place of PC) */
/* <20><>LR<4C>Ĵ<EFBFBD><C4B4><EFBFBD>ѹ<EFBFBD><D1B9>ջ<EFBFBD><D5BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>غ<EFBFBD><D8BA><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB>ִ<EFBFBD>д<EFBFBD><D0B4><EFBFBD> */
STMFD sp!, {r0-r12, lr} /* push lr & register file */
/* <20><>R0 <20>C R12<31>Լ<EFBFBD>LRѹ<52><D1B9>ջ */
MRS r4, cpsr /* <EFBFBD><EFBFBD>ȡCPSR<EFBFBD>Ĵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>R4<EFBFBD>Ĵ<EFBFBD><EFBFBD><EFBFBD> */
STMFD sp!, {r4} /* push cpsr */
/* <20><>R4<52>Ĵ<EFBFBD><C4B4><EFBFBD>ѹջ<D1B9><D5BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һָ<D2BB><D6B8>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD>CPSR<53>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD> */
MRS r4, spsr /* <EFBFBD><EFBFBD>ȡSPSR<EFBFBD>Ĵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>R4<EFBFBD>Ĵ<EFBFBD><EFBFBD><EFBFBD> */
STMFD sp!, {r4} /* push spsr */
/* <20><>R4<52>Ĵ<EFBFBD><C4B4><EFBFBD>ѹջ<D1B9><D5BB><EFBFBD><EFBFBD>SPSR<53>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD> */
STR sp, [r0] /* store sp in preempted tasks TCB */
/* <20><>ջָ<D5BB><D6B8><EFBFBD><EFBFBD><EFBFBD>µ<EFBFBD>TCB<43><42>sp<73><70><EFBFBD><EFBFBD><EFBFBD><EFBFBD>R0<52><30><EFBFBD><EFBFBD><EFBFBD>˺<EFBFBD><CBBA><EFBFBD> */
/* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBBBB><EFBFBD>̵߳<DFB3><CCB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ķ<EFBFBD><C4B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ջ<EFBFBD><D5BB> */
LDR sp, [r1] /* get new task stack pointer */
/* <20><><EFBFBD><EFBFBD><EFBFBD>л<EFBFBD><D0BB><EFBFBD><EFBFBD>̵߳<DFB3>TCB<43><42>sp */
/* <20><><EFBFBD>л<EFBFBD><D0BB><EFBFBD><EFBFBD>̵߳<DFB3>ջ<EFBFBD>лָ<D0BB><D6B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͱ<EFBFBD><CDB1><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD>պ<EFBFBD><D5BA>෴ */
LDMFD sp!, {r4} /* pop new task spsr */
/* <20><>ջ<EFBFBD><D5BB>R4<52>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>SPSR<53>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD> */
MSR spsr_cxsf, r4 /* <EFBFBD>ָ<EFBFBD>SPSR<EFBFBD>Ĵ<EFBFBD><EFBFBD><EFBFBD> */
LDMFD sp!, {r4} /* pop new task cpsr */
/* <20><>ջ<EFBFBD><D5BB>R4<52>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>CPSR<53>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD> */
MSR cpsr_cxsf, r4 /* <EFBFBD>ָ<EFBFBD>CPSR<EFBFBD>Ĵ<EFBFBD><EFBFBD><EFBFBD> */
LDMFD sp!, {r0-r12, lr, pc} /* pop new task r0-r12, lr & pc */
/* <20><>R0 <20>C R12<31><32>LR<4C><52>PC<50><43><EFBFBD>лָ<D0BB> */
//ENDP
rt_hw_context_switch_to:
//EXPORT rt_hw_context_switch_to
LDR sp, [r0] /* get new task stack pointer */
/* <20><><EFBFBD><EFBFBD><EFBFBD>л<EFBFBD><D0BB><EFBFBD><EFBFBD>̵߳<DFB3>SPָ<50><D6B8> */
LDMFD sp!, {r4} /* pop new task spsr */
/* <20><>ջR4<52>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>SPSR<53>Ĵ<EFBFBD><C4B4><EFBFBD>ֵ<EFBFBD><D6B5> */
MSR spsr_cxsf, r4 /* <EFBFBD>ָ<EFBFBD>SPSR<EFBFBD>Ĵ<EFBFBD><EFBFBD><EFBFBD> */
LDMFD sp!, {r4} /* pop new task cpsr */
/* <20><>ջR4<52>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>CPSR<53>Ĵ<EFBFBD><C4B4><EFBFBD>ֵ<EFBFBD><D6B5> */
MSR cpsr_cxsf, r4 /* <EFBFBD>ָ<EFBFBD>CPSR<EFBFBD>Ĵ<EFBFBD><EFBFBD><EFBFBD> */
LDMFD sp!, {r0-r12, lr, pc} /* pop new task r0-r12, lr & pc */
/* <20>ָ<EFBFBD>R0 <20>C R12<31><32>LR<4C><52>PC<50>Ĵ<EFBFBD><C4B4><EFBFBD> */
//ENDP
rt_hw_context_switch_interrupt:
//EXPORT rt_hw_context_switch_interrupt
LDR r2, =rt_thread_switch_interrput_flag
LDR r3, [r2] /* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD><EFBFBD><EFBFBD><EFBFBD>л<EFBFBD><EFBFBD><EFBFBD><EFBFBD>µ<EFBFBD>ַ */
CMP r3, #1 /* <EFBFBD><EFBFBD><EFBFBD><EFBFBD> 1 <EFBFBD><EFBFBD>*/
BEQ _reswitch /* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>1<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ת<EFBFBD><EFBFBD>_reswitch*/
MOV r3, #1 /* set rt_thread_switch_interrput_flag to 1*/
/* <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD>л<EFBFBD><D0BB><EFBFBD>־λ1 */
STR r3, [r2] /* */
LDR r2, =rt_interrupt_from_thread /* set rt_interrupt_from_thread*/
STR r0, [r2] /* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>л<EFBFBD><EFBFBD><EFBFBD><EFBFBD>߳<EFBFBD>ջָ<EFBFBD><EFBFBD>*/
_reswitch:
LDR r2, =rt_interrupt_to_thread /* set rt_interrupt_to_thread*/
STR r1, [r2] /* <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>л<EFBFBD><EFBFBD><EFBFBD><EFBFBD>߳<EFBFBD>ջָ<EFBFBD><EFBFBD>*/
BX lr
//ENDP
//END