2013-01-08 22:40:58 +08:00
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/***************************************************************************//**
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* @file
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* @brief Reset Management Unit (RMU) peripheral module peripheral API
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2021-03-27 15:16:57 +08:00
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*
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2013-01-08 22:40:58 +08:00
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* @author Energy Micro AS
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* @version 3.0.0
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*******************************************************************************
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* @section License
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* <b>(C) Copyright 2012 Energy Micro AS, http://www.energymicro.com</b>
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*******************************************************************************
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*
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* Permission is granted to anyone to use this software for any purpose,
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* including commercial applications, and to alter it and redistribute it
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* freely, subject to the following restrictions:
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*
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* 1. The origin of this software must not be misrepresented; you must not
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* claim that you wrote the original software.
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* 2. Altered source versions must be plainly marked as such, and must not be
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* misrepresented as being the original software.
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* 3. This notice may not be removed or altered from any source distribution.
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*
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* DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
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* obligation to support this Software. Energy Micro AS is providing the
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* Software "AS IS", with no express or implied warranties of any kind,
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* including, but not limited to, any implied warranties of merchantability
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* or fitness for any particular purpose or warranties against infringement
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* of any proprietary rights of a third party.
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*
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* Energy Micro AS will not be liable for any consequential, incidental, or
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* special damages, or any other relief, or for any claim by any third party,
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* arising from your use of this Software.
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*
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******************************************************************************/
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#include "em_rmu.h"
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#include "em_emu.h"
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#include "em_bitband.h"
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/***************************************************************************//**
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* @addtogroup EM_Library
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* @{
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******************************************************************************/
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/***************************************************************************//**
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* @addtogroup RMU
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* @brief Reset Management Unit (RMU) Peripheral API
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* @{
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******************************************************************************/
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/*******************************************************************************
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************************** GLOBAL FUNCTIONS *******************************
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******************************************************************************/
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/***************************************************************************//**
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* @brief
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* Disable/enable reset for various peripherals and signal sources
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*
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* @param[in] enable
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* @li false - Disable reset signal or flag
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* @li true - Enable reset signal or flag
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******************************************************************************/
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void RMU_ResetControl(RMU_Reset_TypeDef reset, bool enable)
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{
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BITBAND_Peripheral(&(RMU->CTRL), (uint32_t)reset, (uint32_t)enable);
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}
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/***************************************************************************//**
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* @brief
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* Clear the reset cause register.
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******************************************************************************/
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void RMU_ResetCauseClear(void)
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{
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uint32_t locked;
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RMU->CMD = RMU_CMD_RCCLR;
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/* Clear some reset causes not cleared with RMU CMD register */
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/* (If EMU registers locked, they must be unlocked first) */
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locked = EMU->LOCK & EMU_LOCK_LOCKKEY_LOCKED;
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if (locked)
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{
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EMU_Unlock();
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}
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BITBAND_Peripheral(&(EMU->AUXCTRL), 0, 1);
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BITBAND_Peripheral(&(EMU->AUXCTRL), 0, 0);
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if (locked)
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{
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EMU_Lock();
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}
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}
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/***************************************************************************//**
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* @brief
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* Get the cause of the last reset.
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*
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* @details
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* In order to be useful, the reset cause must be cleared by SW before a new
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* reset occurs, otherwise reset causes may accumulate. See
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* RMU_ResetCauseClear(). This function call will return the main cause for
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* reset, which can be a bit mask (several causes), and clear away "noise".
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*
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* @return
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* The reset cause, a bit mask of (typically, but not always, only one) of:
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* @li RMU_RSTCAUSE_PORST - Power on reset
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* @li RMU_RSTCAUSE_BODUNREGRST - Brown out detector, unregulated power
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* @li RMU_RSTCAUSE_BODREGRST - Brown out detector, regulated power
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* @li RMU_RSTCAUSE_EXTRST - External reset
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* @li RMU_RSTCAUSE_WDOGRST - Watchdog reset
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* @li RMU_RSTCAUSE_LOCKUPRST - Cortex-M3 lockup reset
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* @li RMU_RSTCAUSE_SYSREQRST - Cortex-M3 system request reset
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* @li RMU_RSTCAUSE_EM4RST - Set if the system has been in EM4
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* @li RMU_RSTCAUSE_EM4WURST - Set if the system woke up on a pin from EM4
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* @li RMU_RSTCAUSE_BODAVDD0 - Analog power domain 0 brown out detector reset
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* @li RMU_RSTCAUSE_BODAVDD1 - Analog power domain 1 brown out detector reset
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* @li RMU_RSTCAUSE_BUBODVDDDREG - Backup BOD on VDDD_REG triggered
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* @li RMU_RSTCAUSE_BUBODBUVIN - Backup BOD on BU_VIN triggered
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* @li RMU_RSTCAUSE_BUBODUNREG - Backup BOD on unregulated power triggered
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* @li RMU_RSTCAUSE_BUBODREG - Backup BOD on regulated powered has triggered
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* @li RMU_RSTCAUSE_BUMODERST - System has been in Backup mode
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******************************************************************************/
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uint32_t RMU_ResetCauseGet(void)
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{
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uint32_t ret = RMU->RSTCAUSE;
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/* Inspect and decode bits. The decoding must be done in correct order, */
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/* since some reset causes may trigger other reset causes due to internal */
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/* design. We are only interested in the main cause. */
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#if defined(_EFM32_TINY_FAMILY) || defined(_EFM32_GIANT_FAMILY)
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/* Clear "stray" bits if EM4 bit is set, they will always be active */
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if (ret & RMU_RSTCAUSE_EM4RST)
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{
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ret &= ~(RMU_RSTCAUSE_BODREGRST|
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RMU_RSTCAUSE_BODUNREGRST|
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RMU_RSTCAUSE_LOCKUPRST|
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RMU_RSTCAUSE_SYSREQRST);
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}
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#endif
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if (ret & RMU_RSTCAUSE_PORST)
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{
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ret = RMU_RSTCAUSE_PORST;
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}
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else if ((ret & 0x83) == RMU_RSTCAUSE_BODUNREGRST)
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{
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ret = RMU_RSTCAUSE_BODUNREGRST;
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}
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else if ((ret & 0x1f) == RMU_RSTCAUSE_BODREGRST)
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{
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ret = RMU_RSTCAUSE_BODREGRST;
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}
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/* Both external and watchdog reset may occur at the same time */
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else if ((ret & 0x1b) & (RMU_RSTCAUSE_EXTRST | RMU_RSTCAUSE_WDOGRST))
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{
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ret &= RMU_RSTCAUSE_EXTRST | RMU_RSTCAUSE_WDOGRST;
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}
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/* Both lockup and system reset may occur at the same time */
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else if ((ret & 0x7ff) & (RMU_RSTCAUSE_LOCKUPRST | RMU_RSTCAUSE_SYSREQRST))
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{
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ret &= RMU_RSTCAUSE_LOCKUPRST | RMU_RSTCAUSE_SYSREQRST;
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}
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/* EM4 wake up and pin retention support */
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#if defined(_EFM32_TINY_FAMILY) || defined(_EFM32_GIANT_FAMILY)
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else if (ret & RMU_RSTCAUSE_BODAVDD0)
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{
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ret = RMU_RSTCAUSE_BODAVDD0;
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}
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else if (ret & RMU_RSTCAUSE_BODAVDD1)
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{
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ret = RMU_RSTCAUSE_BODAVDD1;
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}
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else if (ret & (RMU_RSTCAUSE_EM4WURST|RMU_RSTCAUSE_EM4RST))
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{
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ret &= (RMU_RSTCAUSE_EM4WURST|
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#if defined(_EFM32_GIANT_FAMILY)
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RMU_RSTCAUSE_BUMODERST|
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#endif
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RMU_RSTCAUSE_EM4RST);
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}
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else if (ret & (RMU_RSTCAUSE_EM4RST|RMU_RSTCAUSE_EXTRST))
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{
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ret &= (RMU_RSTCAUSE_EM4RST|RMU_RSTCAUSE_EXTRST);
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}
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#endif
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/* Backup power domain support */
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#if defined(_EFM32_GIANT_FAMILY)
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else if (ret & (RMU_RSTCAUSE_BUBODVDDDREG))
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{
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/* Keep backup mode flag, will only be present in this scenario */
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ret &= (RMU_RSTCAUSE_BUBODVDDDREG|RMU_RSTCAUSE_BUMODERST);
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}
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else if (ret & (RMU_RSTCAUSE_BUBODBUVIN))
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{
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ret &= (RMU_RSTCAUSE_BUBODBUVIN);
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}
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else if (ret & (RMU_RSTCAUSE_BUBODUNREG))
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{
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ret &= (RMU_RSTCAUSE_BUBODUNREG);
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}
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else if (ret & (RMU_RSTCAUSE_BUBODREG))
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{
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ret &= (RMU_RSTCAUSE_BUBODREG);
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}
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#endif
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else
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{
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ret = 0;
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}
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return ret;
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}
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/** @} (end addtogroup RMU) */
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/** @} (end addtogroup EM_Library) */
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