367 lines
11 KiB
C
367 lines
11 KiB
C
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/**
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******************************************************************************
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* @file ft32f0xx_pwr.c
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* @author FMD AE
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* @brief This file provides firmware functions to manage the following
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* functionalities of the Power Controller (PWR) peripheral:
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* + Backup Domain Access
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* + PVD configuration
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* + WakeUp pins configuration
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* + Low Power modes configuration
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* + Flags management
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* @version V1.0.0
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* @data 2021-07-01
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******************************************************************************
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*/
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/* Includes ------------------------------------------------------------------*/
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#include "ft32f0xx_pwr.h"
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#include "ft32f0xx_rcc.h"
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/* ------------------ PWR registers bit mask ------------------------ */
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/* CR register bit mask */
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#define CR_DS_MASK ((uint32_t)0xFFFFFFFC)
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#define CR_PLS_MASK ((uint32_t)0xFFFFFD1F)
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/**
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* @brief Deinitializes the PWR peripheral registers to their default reset values.
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* @param None
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* @retval None
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*/
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void PWR_DeInit(void)
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{
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RCC_APB1PeriphResetCmd(RCC_APB1Periph_PWR, ENABLE);
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RCC_APB1PeriphResetCmd(RCC_APB1Periph_PWR, DISABLE);
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}
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/**
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* @brief Enables or disables access to the Backup domain registers.
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* @note If the HSE divided by 32 is used as the RTC clock, the
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* Backup Domain Access should be kept enabled.
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* @param NewState: new state of the access to the Backup domain registers.
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* This parameter can be: ENABLE or DISABLE.
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* @retval None
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*/
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void PWR_BackupAccessCmd(FunctionalState NewState)
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{
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/* Check the parameters */
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assert_param(IS_FUNCTIONAL_STATE(NewState));
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if (NewState != DISABLE)
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{
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/* Enable the Backup Domain Access */
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PWR->CR |= PWR_CR_DBP;
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}
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else
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{
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/* Disable the Backup Domain Access */
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PWR->CR &= (uint32_t)~((uint32_t)PWR_CR_DBP);
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}
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}
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/**
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* @}
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*/
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/**
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* @brief Configures the voltage threshold detected by the Power Voltage Detector(PVD).
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* @param PWR_PVDLevel: specifies the PVD detection level
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* This parameter can be one of the following values:
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* @arg PWR_PVDLevel_0
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* @arg PWR_PVDLevel_1
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* @arg PWR_PVDLevel_2
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* @arg PWR_PVDLevel_3
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* @arg PWR_PVDLevel_4
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* @arg PWR_PVDLevel_5
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* @arg PWR_PVDLevel_6
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* @arg PWR_PVDLevel_7
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* @arg PWR_PVDLevel_8
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* @arg PWR_PVDLevel_9
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* @arg PWR_PVDLevel_10
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* @arg PWR_PVDLevel_11
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* @arg PWR_PVDLevel_12
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* @arg PWR_PVDLevel_13
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* @arg PWR_PVDLevel_14
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* @arg PWR_PVDLevel_15
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* @note Refer to the electrical characteristics of your device datasheet for
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* more details about the voltage threshold corresponding to each
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* detection level.
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* @retval None
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*/
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void PWR_PVDLevelConfig(uint32_t PWR_PVDLevel)
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{
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uint32_t tmpreg = 0;
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/* Check the parameters */
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assert_param(IS_PWR_PVD_LEVEL(PWR_PVDLevel));
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tmpreg = PWR->CR;
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/* Clear PLS[7:5] bits PLS3*/
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tmpreg &= CR_PLS_MASK;
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/* Set PLS[7:5] and PLS3 bits according to PWR_PVDLevel value */
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tmpreg |= PWR_PVDLevel;
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/* Store the new value */
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PWR->CR = tmpreg;
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}
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/**
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* @brief Enables or disables the Power Voltage Detector(PVD).
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* @param NewState: new state of the PVD.
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* This parameter can be: ENABLE or DISABLE.
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* @retval None
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*/
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void PWR_PVDCmd(FunctionalState NewState)
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{
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/* Check the parameters */
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assert_param(IS_FUNCTIONAL_STATE(NewState));
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if (NewState != DISABLE)
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{
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/* Enable the PVD */
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PWR->CR |= PWR_CR_PVDE;
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}
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else
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{
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/* Disable the PVD */
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PWR->CR &= (uint32_t)~((uint32_t)PWR_CR_PVDE);
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}
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}
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/**
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* @}
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*/
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/**
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* @brief Enables or disables the WakeUp Pin functionality.
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* @param PWR_WakeUpPin: specifies the WakeUpPin.
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* This parameter can be one of the following values
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* @arg PWR_WakeUpPin_1
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* @arg PWR_WakeUpPin_2
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* @arg PWR_WakeUpPin_3
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* @arg PWR_WakeUpPin_4
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* @arg PWR_WakeUpPin_5
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* @arg PWR_WakeUpPin_6
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* @arg PWR_WakeUpPin_7
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* @arg PWR_WakeUpPin_8
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* @param NewState: new state of the WakeUp Pin functionality.
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* This parameter can be: ENABLE or DISABLE.
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* @retval None
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*/
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void PWR_WakeUpPinCmd(uint32_t PWR_WakeUpPin, FunctionalState NewState)
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{
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/* Check the parameters */
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assert_param(IS_PWR_WAKEUP_PIN(PWR_WakeUpPin));
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assert_param(IS_FUNCTIONAL_STATE(NewState));
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if (NewState != DISABLE)
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{
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/* Enable the EWUPx pin */
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PWR->CSR |= PWR_WakeUpPin;
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}
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else
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{
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/* Disable the EWUPx pin */
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PWR->CSR &= ~PWR_WakeUpPin;
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}
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}
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/**
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* @}
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*/
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/**
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* @brief Enters Sleep mode.
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* @note In Sleep mode, all I/O pins keep the same state as in Run mode.
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* @param PWR_SLEEPEntry: specifies if SLEEP mode in entered with WFI or WFE instruction.
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* This parameter can be one of the following values:
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* @arg PWR_SLEEPEntry_WFI: enter SLEEP mode with WFI instruction
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* @arg PWR_SLEEPEntry_WFE: enter SLEEP mode with WFE instruction
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* @retval None
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*/
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void PWR_EnterSleepMode(uint8_t PWR_SLEEPEntry)
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{
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/* Check the parameters */
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assert_param(IS_PWR_SLEEP_ENTRY(PWR_SLEEPEntry));
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/* Clear SLEEPDEEP bit of Cortex-M0 System Control Register */
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SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP_Msk);
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/* Select SLEEP mode entry -------------------------------------------------*/
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if(PWR_SLEEPEntry == PWR_SLEEPEntry_WFI)
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{
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/* Request Wait For Interrupt */
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__WFI();
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}
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else
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{
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/* Request Wait For Event */
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__SEV();
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__WFE();
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__WFE();
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}
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}
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/**
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* @brief Enters STOP mode.
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* @note In Stop mode, all I/O pins keep the same state as in Run mode.
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* @note When exiting Stop mode by issuing an interrupt or a wakeup event,
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* the HSI RC oscillator is selected as system clock.
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* @note When the voltage regulator operates in low power mode, an additional
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* startup delay is incurred when waking up from Stop mode.
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* By keeping the internal regulator ON during Stop mode, the consumption
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* is higher although the startup time is reduced.
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* @param PWR_Regulator: specifies the regulator state in STOP mode.
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* This parameter can be one of the following values:
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* @arg PWR_Regulator_ON: STOP mode with regulator ON
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* @arg PWR_Regulator_LowPower: STOP mode with regulator in low power mode
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* @param PWR_STOPEntry: specifies if STOP mode in entered with WFI or WFE instruction.
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* This parameter can be one of the following values:
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* @arg PWR_STOPEntry_WFI: enter STOP mode with WFI instruction
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* @arg PWR_STOPEntry_WFE: enter STOP mode with WFE instruction
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@arg PWR_STOPEntry_SLEEPONEXIT: enter STOP mode with SLEEPONEXIT instruction
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* @retval None
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*/
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void PWR_EnterSTOPMode(uint32_t PWR_Regulator, uint8_t PWR_STOPEntry)
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{
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uint32_t tmpreg = 0;
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/* Check the parameters */
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assert_param(IS_PWR_REGULATOR(PWR_Regulator));
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assert_param(IS_PWR_STOP_ENTRY(PWR_STOPEntry));
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/* Select the regulator state in STOP mode ---------------------------------*/
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tmpreg = PWR->CR;
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/* Clear PDDS and LPDSR bits */
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tmpreg &= CR_DS_MASK;
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/* Set LPDSR bit according to PWR_Regulator value */
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tmpreg |= PWR_Regulator;
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/* Store the new value */
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PWR->CR = tmpreg;
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/* Set SLEEPDEEP bit of Cortex-M0 System Control Register */
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SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
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/* Select STOP mode entry --------------------------------------------------*/
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if(PWR_STOPEntry == PWR_STOPEntry_WFI)
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{
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/* Request Wait For Interrupt */
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__WFI();
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/* Reset SLEEPDEEP bit of Cortex System Control Register */
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SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP_Msk);
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}
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else if (PWR_STOPEntry == PWR_STOPEntry_WFE)
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{
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/* Request Wait For Event */
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__WFE();
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/* Reset SLEEPDEEP bit of Cortex System Control Register */
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SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP_Msk);
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}
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else
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{
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/* Set SLEEP on exit bit of Cortex-M0 System Control Register */
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SCB->SCR |= SCB_SCR_SLEEPONEXIT_Msk;
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}
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}
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/**
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* @brief Enters STANDBY mode.
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* @note In Standby mode, all I/O pins are high impedance except for:
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* - Reset pad (still available)
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* - RTC_AF1 pin (PC13) if configured for Wakeup pin 2 (WKUP2), tamper,
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* time-stamp, RTC Alarm out, or RTC clock calibration out.
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* - WKUP pin 1 (PA0) if enabled.
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* @note The Wakeup flag (WUF) need to be cleared at application level before to call this function
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* @param None
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* @retval None
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*/
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void PWR_EnterSTANDBYMode(void)
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{
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/* Select STANDBY mode */
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PWR->CR |= PWR_CR_PDDS;
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/* Set SLEEPDEEP bit of Cortex-M0 System Control Register */
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SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
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/* Request Wait For Interrupt */
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__WFI();
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}
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/**
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* @}
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*/
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/**
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* @brief Checks whether the specified PWR flag is set or not.
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* @param PWR_FLAG: specifies the flag to check.
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* This parameter can be one of the following values:
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* @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup
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* event was received from the WKUP pin or from the RTC alarm
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* (Alarm A or Alarm B), RTC Tamper event or RTC TimeStamp event.
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* @arg PWR_FLAG_SB: StandBy flag. This flag indicates that the
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* system was resumed from StandBy mode.
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* @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD
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* is enabled by the PWR_PVDCmd() function.
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* @arg PWR_FLAG_VREFINTRDY: Internal Voltage Reference Ready flag.
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* This flag indicates the state of the internal voltage
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* reference, VREFINT.
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* @retval The new state of PWR_FLAG (SET or RESET).
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*/
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FlagStatus PWR_GetFlagStatus(uint32_t PWR_FLAG)
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{
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FlagStatus bitstatus = RESET;
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/* Check the parameters */
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assert_param(IS_PWR_GET_FLAG(PWR_FLAG));
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if ((PWR->CSR & PWR_FLAG) != (uint32_t)RESET)
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{
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bitstatus = SET;
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}
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else
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{
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bitstatus = RESET;
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}
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/* Return the flag status */
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return bitstatus;
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}
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/**
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* @brief Clears the PWR's pending flags.
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* @param PWR_FLAG: specifies the flag to clear.
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* This parameter can be one of the following values:
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* @arg PWR_FLAG_WU: Wake Up flag
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* @arg PWR_FLAG_SB: StandBy flag
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* @retval None
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*/
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void PWR_ClearFlag(uint32_t PWR_FLAG)
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{
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/* Check the parameters */
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assert_param(IS_PWR_CLEAR_FLAG(PWR_FLAG));
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PWR->CR |= PWR_FLAG << 2;
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}
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/**
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* @}
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*/
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/**
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* @}
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*/
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/**
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* @}
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*/
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/**
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* @}
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*/
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/************************ (C) COPYRIGHT FMD *****END OF FILE****/
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