2011-10-08 21:23:20 +08:00
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/*
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2021-03-21 23:32:39 +08:00
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* Copyright (c) 2006-2021, RT-Thread Development Team
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2011-10-08 21:23:20 +08:00
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*
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2021-03-21 23:32:39 +08:00
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* SPDX-License-Identifier: Apache-2.0
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2011-10-08 21:23:20 +08:00
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*
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* Change Logs:
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* Date Author Notes
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* 2011-05-25 Bernard first version
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*/
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#ifndef __NAND_H__
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#define __NAND_H__
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#include <rtthread.h>
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#define IO_NF_PFR FM3_GPIO->PFR3
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#define IO_NF_DDR FM3_GPIO->DDR3
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#define IO_NF_PDOR FM3_GPIO->PDOR3
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#define NF_EN 0x0008
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#define NF_DATA_DIR 0x0004
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#define EXT_BUS_BASE_ADDR 0x60000000
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#define EXT_CS7_OFFSET 0x0E000000
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#define EXT_CS7_SIZE 0x02000000
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#define NF_FLASH_BASE_ADDR (EXT_BUS_BASE_ADDR+EXT_CS7_OFFSET)
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#define NF_ALE_OFFSET 0x00003000
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#define NF_ADDR_OFFSET 0x00002000
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#define NF_CMD_OFFSET 0x00001000
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2021-03-21 23:32:39 +08:00
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#define NF_DATA_OFFSET 0x00000000
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2011-10-08 21:23:20 +08:00
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/* NAND command */
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#define NAND_CMD_READ0 0x00
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#define NAND_CMD_READ1 0x01
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#define NAND_CMD_PAGEPROG 0x10
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#define NAND_CMD_READOOB 0x50
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#define NAND_CMD_ERASE1 0x60
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#define NAND_CMD_STATUS 0x70
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#define NAND_CMD_SEQIN 0x80
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#define NAND_CMD_READID 0x90
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#define NAND_CMD_READID1 0x91
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#define NAND_CMD_ERASE2 0xd0
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#define NAND_CMD_RESET 0xff
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2021-03-21 23:32:39 +08:00
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2011-10-08 21:23:20 +08:00
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#define FLASH_OK 0
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#define FLASH_NG 1
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/* nand flash device initialization */
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void rt_hw_nand_init(void);
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#endif
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