530 lines
13 KiB
C
530 lines
13 KiB
C
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/*
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* Copyright (C) 2022-2024, Xiaohua Semiconductor Co., Ltd.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2023-02-10 CDT first version
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*/
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#include "board.h"
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#if defined(BSP_USING_HWCRYPTO)
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// #define DRV_DEBUG
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#define LOG_TAG "drv_crypto"
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#include <drv_log.h>
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struct hc32_hwcrypto_device
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{
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struct rt_hwcrypto_device dev;
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struct rt_mutex mutex;
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};
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#if defined(BSP_USING_CRC)
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#define DEFAULT_CRC16_CCITT_POLY (0x1021) /*!< X^16 + X^12 + X^5 + 1 */
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#define DEFAULT_CRC32_POLY (0x04C11DB7) /*!< X^32 + X^26 + X^23 + X^22 + X^16 + X^12 + X^11 + X^10 +X^8 + X^7 + X^5 + X^4 + X^2+ X + 1 */
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static rt_uint32_t _crc_update(struct hwcrypto_crc *ctx, const rt_uint8_t *in, rt_size_t length)
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{
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rt_uint32_t result = 0;
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stc_crc_init_t stcCrcInit;
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static struct hwcrypto_crc_cfg crc_cfgbk = {0};
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struct hc32_hwcrypto_device *hc32_hw_dev = (struct hc32_hwcrypto_device *)ctx->parent.device->user_data;
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rt_mutex_take(&hc32_hw_dev->mutex, RT_WAITING_FOREVER);
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if (ctx->crc_cfg.poly != DEFAULT_CRC16_CCITT_POLY && ctx->crc_cfg.poly != DEFAULT_CRC32_POLY)
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{
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LOG_E("CRC polynomial only support 0x1021/0x04C11DB7U.");
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goto _exit;
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}
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/* if crc_cfg change we need init crc again */
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if (rt_memcmp(&crc_cfgbk, &ctx->crc_cfg, sizeof(struct hwcrypto_crc_cfg)))
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{
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#if defined(HC32F460)
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switch (ctx->crc_cfg.flags)
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{
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case 0:
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stcCrcInit.u32RefIn = CRC_REFIN_DISABLE;
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stcCrcInit.u32RefOut = CRC_REFOUT_DISABLE;
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break;
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case CRC_FLAG_REFIN:
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stcCrcInit.u32RefIn = CRC_REFIN_ENABLE;
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stcCrcInit.u32RefOut = CRC_REFOUT_DISABLE;
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break;
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case CRC_FLAG_REFOUT:
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stcCrcInit.u32RefIn = CRC_REFIN_DISABLE;
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stcCrcInit.u32RefOut = CRC_REFOUT_ENABLE;
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break;
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case CRC_FLAG_REFIN | CRC_FLAG_REFOUT:
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stcCrcInit.u32RefIn = CRC_REFIN_ENABLE;
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stcCrcInit.u32RefOut = CRC_REFOUT_ENABLE;
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break;
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default :
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LOG_E("crc flag parameter error.");
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goto _exit;
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}
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if (ctx->crc_cfg.xorout)
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{
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stcCrcInit.u32XorOut = CRC_XOROUT_ENABLE;
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}
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else
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{
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stcCrcInit.u32XorOut = CRC_XOROUT_DISABLE;
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}
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#endif
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switch (ctx->crc_cfg.width)
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{
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case 16U:
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stcCrcInit.u32Protocol = CRC_CRC16;
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break;
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case 32U:
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stcCrcInit.u32Protocol = CRC_CRC32;
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break;
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default :
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LOG_E("crc width only support 16/32.");
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goto _exit;
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}
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stcCrcInit.u32InitValue = ctx->crc_cfg.last_val;
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if (CRC_Init(&stcCrcInit) != LL_OK)
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{
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LOG_E("crc init error.");
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goto _exit;
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}
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LOG_D("CRC_Init.");
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rt_memcpy(&crc_cfgbk, &ctx->crc_cfg, sizeof(struct hwcrypto_crc_cfg));
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}
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if (16U == ctx->crc_cfg.width)
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{
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result = CRC_CRC16_Calculate(ctx->crc_cfg.last_val, CRC_DATA_WIDTH_8BIT, in, length);
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}
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else /* CRC32 */
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{
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result = CRC_CRC32_Calculate(ctx->crc_cfg.last_val, CRC_DATA_WIDTH_8BIT, in, length);
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}
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_exit:
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rt_mutex_release(&hc32_hw_dev->mutex);
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return result;
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}
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static const struct hwcrypto_crc_ops crc_ops =
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{
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.update = _crc_update,
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};
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#endif /* BSP_USING_CRC */
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#if defined(BSP_USING_RNG)
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static rt_uint32_t _rng_rand(struct hwcrypto_rng *ctx)
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{
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rt_uint32_t gen_random = 0;
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if (TRNG_GenerateRandom(&gen_random, 1U) != LL_OK)
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{
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return 0;
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}
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return gen_random;
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}
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static const struct hwcrypto_rng_ops rng_ops =
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{
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.update = _rng_rand,
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};
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#endif /* BSP_USING_RNG */
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#if defined(BSP_USING_HASH)
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#define HASH_SHA256_MSG_DIGEST_SIZE (32U)
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static const rt_uint8_t *hash_in = RT_NULL;
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static rt_size_t hash_length = 0;
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static rt_err_t _hash_update(struct hwcrypto_hash *ctx, const rt_uint8_t *in, rt_size_t length)
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{
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rt_uint32_t result = RT_EOK;
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struct hc32_hwcrypto_device *hc32_hw_dev = (struct hc32_hwcrypto_device *)ctx->parent.device->user_data;
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rt_mutex_take(&hc32_hw_dev->mutex, RT_WAITING_FOREVER);
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/* Start HASH computation transfer */
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switch (ctx->parent.type)
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{
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case HWCRYPTO_TYPE_SHA256:
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hash_in = in;
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hash_length = length;
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break;
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default :
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LOG_E("not support hash type: %x", ctx->parent.type);
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result = -RT_ERROR;
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break;
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}
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rt_mutex_release(&hc32_hw_dev->mutex);
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return result;
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}
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static rt_err_t _hash_finish(struct hwcrypto_hash *ctx, rt_uint8_t *out, rt_size_t length)
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{
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rt_uint32_t result = RT_EOK;
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struct hc32_hwcrypto_device *hc32_hw_dev = (struct hc32_hwcrypto_device *)ctx->parent.device->user_data;
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rt_mutex_take(&hc32_hw_dev->mutex, RT_WAITING_FOREVER);
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if (hash_in == RT_NULL || hash_length == 0)
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{
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LOG_E("no data input.");
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result = -RT_ERROR;
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goto _exit;
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}
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/* Get the hash Subtype */
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switch (ctx->parent.type)
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{
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case HWCRYPTO_TYPE_SHA256:
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/* SHA256 = 32*8 Bits */
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if (length == HASH_SHA256_MSG_DIGEST_SIZE)
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{
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result = HASH_Calculate(hash_in, hash_length, out);
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}
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else
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{
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LOG_E("The out size must be 32 bytes");
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}
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break;
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default :
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LOG_E("not support hash type: %x", ctx->parent.type);
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result = -RT_ERROR;
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break;
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}
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_exit:
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rt_mutex_release(&hc32_hw_dev->mutex);
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return result;
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}
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static const struct hwcrypto_hash_ops hash_ops =
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{
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.update = _hash_update,
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.finish = _hash_finish
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};
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#endif /* BSP_USING_HASH */
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#if defined(BSP_USING_AES)
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static rt_err_t _cryp_crypt(struct hwcrypto_symmetric *ctx, struct hwcrypto_symmetric_info *info)
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{
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rt_uint32_t result = RT_EOK;
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struct hc32_hwcrypto_device *hc32_hw_dev = (struct hc32_hwcrypto_device *)ctx->parent.device->user_data;
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rt_mutex_take(&hc32_hw_dev->mutex, RT_WAITING_FOREVER);
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switch (ctx->parent.type)
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{
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case HWCRYPTO_TYPE_AES_ECB:
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LOG_D("AES type is ECB.");
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break;
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case HWCRYPTO_TYPE_AES_CBC:
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case HWCRYPTO_TYPE_AES_CTR:
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case HWCRYPTO_TYPE_DES_ECB:
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case HWCRYPTO_TYPE_DES_CBC:
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default :
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LOG_E("not support cryp type: %x", ctx->parent.type);
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break;
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}
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#if defined (HC32F460)
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if (ctx->key_bitlen != (AES_KEY_SIZE_16BYTE * 8U))
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{
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LOG_E("not support key bitlen: %d", ctx->key_bitlen);
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result = -RT_ERROR;
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goto _exit;
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}
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#elif defined (HC32F4A0)
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if (ctx->key_bitlen != (AES_KEY_SIZE_16BYTE * 8U) && ctx->key_bitlen != (AES_KEY_SIZE_24BYTE * 8U) && \
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ctx->key_bitlen != (AES_KEY_SIZE_32BYTE * 8U))
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{
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LOG_E("not support key bitlen: %d", ctx->key_bitlen);
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result = -RT_ERROR;
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goto _exit;
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}
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#endif
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if ((info->length % 16U) != 0U)
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{
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LOG_E("aes supports only an integer multiple of 16 in length");
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result = -RT_ERROR;
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goto _exit;
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}
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if (info->mode == HWCRYPTO_MODE_ENCRYPT)
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{
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/* AES encryption. */
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result = AES_Encrypt(info->in, info->length, ctx->key, (ctx->key_bitlen / 8U), info->out);
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}
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else if (info->mode == HWCRYPTO_MODE_DECRYPT)
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{
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/* AES decryption */
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result = AES_Decrypt(info->in, info->length, ctx->key, (ctx->key_bitlen / 8U), info->out);
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}
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else
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{
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rt_kprintf("error cryp mode : %02x!\n", info->mode);
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result = -RT_ERROR;
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goto _exit;
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}
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_exit:
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rt_mutex_release(&hc32_hw_dev->mutex);
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return result;
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}
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static const struct hwcrypto_symmetric_ops cryp_ops =
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{
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.crypt = _cryp_crypt
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};
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#endif
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static rt_err_t _crypto_create(struct rt_hwcrypto_ctx *ctx)
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{
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rt_err_t res = RT_EOK;
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switch (ctx->type & HWCRYPTO_MAIN_TYPE_MASK)
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{
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#if defined(BSP_USING_RNG)
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case HWCRYPTO_TYPE_RNG:
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{
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/* Enable TRNG. */
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FCG_Fcg0PeriphClockCmd(FCG0_PERIPH_TRNG, ENABLE);
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/* TRNG initialization configuration. */
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TRNG_Init(TRNG_SHIFT_CNT64, TRNG_RELOAD_INIT_VAL_ENABLE);
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((struct hwcrypto_rng *)ctx)->ops = &rng_ops;
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break;
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}
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#endif /* BSP_USING_RNG */
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#if defined(BSP_USING_CRC)
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case HWCRYPTO_TYPE_CRC:
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{
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/* Enable CRC module clock. */
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FCG_Fcg0PeriphClockCmd(FCG0_PERIPH_CRC, ENABLE);
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/* do not Initialize CRC because crc_update will do it */
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((struct hwcrypto_crc *)ctx)->ops = &crc_ops;
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break;
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}
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#endif /* BSP_USING_CRC */
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#if defined(BSP_USING_HASH)
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case HWCRYPTO_TYPE_MD5:
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case HWCRYPTO_TYPE_SHA1:
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case HWCRYPTO_TYPE_SHA2:
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{
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if (ctx->type == HWCRYPTO_TYPE_SHA256)
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{
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/* Enable HASH. */
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FCG_Fcg0PeriphClockCmd(FCG0_PERIPH_HASH, ENABLE);
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((struct hwcrypto_hash *)ctx)->ops = &hash_ops;
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}
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else
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{
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LOG_E("not support hash type.");
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res = -RT_ERROR;
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}
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break;
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}
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#endif /* BSP_USING_HASH */
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#if defined(BSP_USING_AES)
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case HWCRYPTO_TYPE_AES:
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case HWCRYPTO_TYPE_DES:
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case HWCRYPTO_TYPE_3DES:
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case HWCRYPTO_TYPE_RC4:
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case HWCRYPTO_TYPE_GCM:
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{
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/* Enable AES peripheral clock. */
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FCG_Fcg0PeriphClockCmd(PWC_FCG0_AES, ENABLE);
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((struct hwcrypto_symmetric *)ctx)->ops = &cryp_ops;
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break;
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}
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#endif /* BSP_USING_AES */
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default:
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res = -RT_ERROR;
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break;
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}
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return res;
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}
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static void _crypto_destroy(struct rt_hwcrypto_ctx *ctx)
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{
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switch (ctx->type & HWCRYPTO_MAIN_TYPE_MASK)
|
||
|
|
{
|
||
|
|
#if defined(BSP_USING_RNG)
|
||
|
|
case HWCRYPTO_TYPE_RNG:
|
||
|
|
TRNG_DeInit();
|
||
|
|
FCG_Fcg0PeriphClockCmd(FCG0_PERIPH_TRNG, DISABLE);
|
||
|
|
break;
|
||
|
|
#endif /* BSP_USING_RNG */
|
||
|
|
|
||
|
|
#if defined(BSP_USING_CRC)
|
||
|
|
case HWCRYPTO_TYPE_CRC:
|
||
|
|
CRC_DeInit();
|
||
|
|
FCG_Fcg0PeriphClockCmd(FCG0_PERIPH_CRC, DISABLE);
|
||
|
|
break;
|
||
|
|
#endif /* BSP_USING_CRC */
|
||
|
|
|
||
|
|
#if defined(BSP_USING_HASH)
|
||
|
|
case HWCRYPTO_TYPE_MD5:
|
||
|
|
case HWCRYPTO_TYPE_SHA1:
|
||
|
|
case HWCRYPTO_TYPE_SHA2:
|
||
|
|
HASH_DeInit();
|
||
|
|
FCG_Fcg0PeriphClockCmd(FCG0_PERIPH_HASH, DISABLE);
|
||
|
|
break;
|
||
|
|
#endif /* BSP_USING_HASH */
|
||
|
|
|
||
|
|
#if defined(BSP_USING_AES)
|
||
|
|
case HWCRYPTO_TYPE_AES:
|
||
|
|
case HWCRYPTO_TYPE_DES:
|
||
|
|
case HWCRYPTO_TYPE_3DES:
|
||
|
|
case HWCRYPTO_TYPE_RC4:
|
||
|
|
case HWCRYPTO_TYPE_GCM:
|
||
|
|
AES_DeInit();
|
||
|
|
FCG_Fcg0PeriphClockCmd(PWC_FCG0_AES, DISABLE);
|
||
|
|
break;
|
||
|
|
#endif /* BSP_USING_AES */
|
||
|
|
|
||
|
|
default:
|
||
|
|
break;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
static rt_err_t _crypto_clone(struct rt_hwcrypto_ctx *des, const struct rt_hwcrypto_ctx *src)
|
||
|
|
{
|
||
|
|
rt_err_t res = RT_EOK;
|
||
|
|
|
||
|
|
switch (src->type & HWCRYPTO_MAIN_TYPE_MASK)
|
||
|
|
{
|
||
|
|
#if defined(BSP_USING_RNG)
|
||
|
|
case HWCRYPTO_TYPE_RNG:
|
||
|
|
break;
|
||
|
|
#endif /* BSP_USING_RNG */
|
||
|
|
|
||
|
|
#if defined(BSP_USING_CRC)
|
||
|
|
case HWCRYPTO_TYPE_CRC:
|
||
|
|
break;
|
||
|
|
#endif /* BSP_USING_CRC */
|
||
|
|
|
||
|
|
#if defined(BSP_USING_HASH)
|
||
|
|
case HWCRYPTO_TYPE_MD5:
|
||
|
|
case HWCRYPTO_TYPE_SHA1:
|
||
|
|
case HWCRYPTO_TYPE_SHA2:
|
||
|
|
break;
|
||
|
|
#endif /* BSP_USING_HASH */
|
||
|
|
|
||
|
|
#if defined(BSP_USING_AES)
|
||
|
|
case HWCRYPTO_TYPE_AES:
|
||
|
|
case HWCRYPTO_TYPE_DES:
|
||
|
|
case HWCRYPTO_TYPE_3DES:
|
||
|
|
case HWCRYPTO_TYPE_RC4:
|
||
|
|
case HWCRYPTO_TYPE_GCM:
|
||
|
|
break;
|
||
|
|
#endif /* BSP_USING_AES */
|
||
|
|
|
||
|
|
default:
|
||
|
|
res = -RT_ERROR;
|
||
|
|
break;
|
||
|
|
}
|
||
|
|
return res;
|
||
|
|
}
|
||
|
|
|
||
|
|
static void _crypto_reset(struct rt_hwcrypto_ctx *ctx)
|
||
|
|
{
|
||
|
|
switch (ctx->type & HWCRYPTO_MAIN_TYPE_MASK)
|
||
|
|
{
|
||
|
|
#if defined(BSP_USING_RNG)
|
||
|
|
case HWCRYPTO_TYPE_RNG:
|
||
|
|
break;
|
||
|
|
#endif /* BSP_USING_RNG */
|
||
|
|
|
||
|
|
#if defined(BSP_USING_CRC)
|
||
|
|
case HWCRYPTO_TYPE_CRC:
|
||
|
|
break;
|
||
|
|
#endif /* BSP_USING_CRC */
|
||
|
|
|
||
|
|
#if defined(BSP_USING_HASH)
|
||
|
|
case HWCRYPTO_TYPE_MD5:
|
||
|
|
case HWCRYPTO_TYPE_SHA1:
|
||
|
|
case HWCRYPTO_TYPE_SHA2:
|
||
|
|
break;
|
||
|
|
#endif /* BSP_USING_HASH*/
|
||
|
|
|
||
|
|
#if defined(BSP_USING_AES)
|
||
|
|
case HWCRYPTO_TYPE_AES:
|
||
|
|
case HWCRYPTO_TYPE_DES:
|
||
|
|
case HWCRYPTO_TYPE_3DES:
|
||
|
|
case HWCRYPTO_TYPE_RC4:
|
||
|
|
case HWCRYPTO_TYPE_GCM:
|
||
|
|
break;
|
||
|
|
#endif /* BSP_USING_AES */
|
||
|
|
|
||
|
|
default:
|
||
|
|
break;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
static const struct rt_hwcrypto_ops _ops =
|
||
|
|
{
|
||
|
|
.create = _crypto_create,
|
||
|
|
.destroy = _crypto_destroy,
|
||
|
|
.copy = _crypto_clone,
|
||
|
|
.reset = _crypto_reset,
|
||
|
|
};
|
||
|
|
|
||
|
|
static int rt_hw_crypto_device_init(void)
|
||
|
|
{
|
||
|
|
static struct hc32_hwcrypto_device _crypto_dev;
|
||
|
|
|
||
|
|
#if defined(BSP_USING_UQID)
|
||
|
|
stc_efm_unique_id_t pstcUID;
|
||
|
|
rt_uint32_t cpuid[3] = {0};
|
||
|
|
|
||
|
|
EFM_GetUID(&pstcUID);
|
||
|
|
cpuid[0] = pstcUID.u32UniqueID0;
|
||
|
|
cpuid[1] = pstcUID.u32UniqueID1;
|
||
|
|
cpuid[2] = pstcUID.u32UniqueID2;
|
||
|
|
/* we only used 2 words to as the UQID */
|
||
|
|
rt_memcpy(&_crypto_dev.dev.id, cpuid, 8);
|
||
|
|
LOG_D("UQID = %x%x", cpuid[0], cpuid[1]);
|
||
|
|
#endif /* BSP_USING_UQID */
|
||
|
|
|
||
|
|
_crypto_dev.dev.ops = &_ops;
|
||
|
|
_crypto_dev.dev.user_data = &_crypto_dev;
|
||
|
|
|
||
|
|
if (rt_hwcrypto_register(&_crypto_dev.dev, RT_HWCRYPTO_DEFAULT_NAME) != RT_EOK)
|
||
|
|
{
|
||
|
|
return -RT_ERROR;
|
||
|
|
}
|
||
|
|
|
||
|
|
rt_mutex_init(&_crypto_dev.mutex, RT_HWCRYPTO_DEFAULT_NAME, RT_IPC_FLAG_PRIO);
|
||
|
|
return RT_EOK;
|
||
|
|
}
|
||
|
|
INIT_DEVICE_EXPORT(rt_hw_crypto_device_init);
|
||
|
|
|
||
|
|
#endif
|