2015-06-20 23:23:32 +08:00
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/*
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2021-03-08 18:19:04 +08:00
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* Copyright (c) 2006-2021, RT-Thread Development Team
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2015-06-20 23:23:32 +08:00
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*
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2018-10-14 19:37:18 +08:00
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* SPDX-License-Identifier: Apache-2.0
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2015-06-20 23:23:32 +08:00
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*
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* Change Logs:
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2019-07-19 16:46:14 +08:00
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* Date Author Notes
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* 2015-06-15 hichard first version
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2015-06-20 23:23:32 +08:00
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*/
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#include <drivers/mmcsd_core.h>
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#include <drivers/mmc.h>
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2019-04-12 10:18:57 +08:00
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#define DBG_TAG "SDIO"
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2018-09-05 14:50:43 +08:00
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#ifdef RT_SDIO_DEBUG
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2019-04-12 10:18:57 +08:00
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#define DBG_LVL DBG_LOG
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2018-09-05 14:50:43 +08:00
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#else
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2019-04-12 10:18:57 +08:00
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#define DBG_LVL DBG_INFO
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2018-09-05 14:50:43 +08:00
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#endif /* RT_SDIO_DEBUG */
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#include <rtdbg.h>
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2015-06-20 23:23:32 +08:00
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static const rt_uint32_t tran_unit[] =
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{
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10000, 100000, 1000000, 10000000,
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0, 0, 0, 0
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};
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static const rt_uint8_t tran_value[] =
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{
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0, 10, 12, 13, 15, 20, 25, 30,
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35, 40, 45, 50, 55, 60, 70, 80,
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};
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static const rt_uint32_t tacc_uint[] =
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{
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1, 10, 100, 1000, 10000, 100000, 1000000, 10000000,
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};
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static const rt_uint8_t tacc_value[] =
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{
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0, 10, 12, 13, 15, 20, 25, 30,
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35, 40, 45, 50, 55, 60, 70, 80,
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};
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rt_inline rt_uint32_t GET_BITS(rt_uint32_t *resp,
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rt_uint32_t start,
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rt_uint32_t size)
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2021-03-08 18:19:04 +08:00
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{
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2015-06-20 23:23:32 +08:00
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const rt_int32_t __size = size;
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2021-03-08 18:19:04 +08:00
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const rt_uint32_t __mask = (__size < 32 ? 1 << __size : 0) - 1;
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2015-06-20 23:23:32 +08:00
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const rt_int32_t __off = 3 - ((start) / 32);
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const rt_int32_t __shft = (start) & 31;
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rt_uint32_t __res;
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__res = resp[__off] >> __shft;
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if (__size + __shft > 32)
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__res |= resp[__off-1] << ((32 - __shft) % 32);
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return __res & __mask;
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}
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/*
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* Given a 128-bit response, decode to our card CSD structure.
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*/
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static rt_int32_t mmcsd_parse_csd(struct rt_mmcsd_card *card)
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{
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rt_uint32_t a, b;
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struct rt_mmcsd_csd *csd = &card->csd;
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rt_uint32_t *resp = card->resp_csd;
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2021-03-08 18:19:04 +08:00
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2015-06-20 23:23:32 +08:00
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/*
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* We only understand CSD structure v1.1 and v1.2.
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* v1.2 has extra information in bits 15, 11 and 10.
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* We also support eMMC v4.4 & v4.41.
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*/
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csd->csd_structure = GET_BITS(resp, 126, 2);
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if (csd->csd_structure == 0) {
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2018-09-05 14:50:43 +08:00
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LOG_E("unrecognised CSD structure version %d!", csd->csd_structure);
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2021-03-08 18:19:04 +08:00
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2015-06-20 23:23:32 +08:00
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return -RT_ERROR;
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}
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2021-03-08 18:19:04 +08:00
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2015-06-20 23:23:32 +08:00
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csd->taac = GET_BITS(resp, 112, 8);
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csd->nsac = GET_BITS(resp, 104, 8);
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csd->tran_speed = GET_BITS(resp, 96, 8);
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csd->card_cmd_class = GET_BITS(resp, 84, 12);
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csd->rd_blk_len = GET_BITS(resp, 80, 4);
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csd->rd_blk_part = GET_BITS(resp, 79, 1);
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csd->wr_blk_misalign = GET_BITS(resp, 78, 1);
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csd->rd_blk_misalign = GET_BITS(resp, 77, 1);
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csd->dsr_imp = GET_BITS(resp, 76, 1);
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csd->c_size = GET_BITS(resp, 62, 12);
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csd->c_size_mult = GET_BITS(resp, 47, 3);
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csd->r2w_factor = GET_BITS(resp, 26, 3);
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csd->wr_blk_len = GET_BITS(resp, 22, 4);
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csd->wr_blk_partial = GET_BITS(resp, 21, 1);
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csd->csd_crc = GET_BITS(resp, 1, 7);
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2021-03-08 18:19:04 +08:00
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2015-06-20 23:23:32 +08:00
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card->card_blksize = 1 << csd->rd_blk_len;
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card->tacc_clks = csd->nsac * 100;
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card->tacc_ns = (tacc_uint[csd->taac&0x07] * tacc_value[(csd->taac&0x78)>>3] + 9) / 10;
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card->max_data_rate = tran_unit[csd->tran_speed&0x07] * tran_value[(csd->tran_speed&0x78)>>3];
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if (csd->wr_blk_len >= 9) {
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a = GET_BITS(resp, 42, 5);
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b = GET_BITS(resp, 37, 5);
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card->erase_size = (a + 1) * (b + 1);
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card->erase_size <<= csd->wr_blk_len - 9;
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}
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2021-03-08 18:19:04 +08:00
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2015-06-20 23:23:32 +08:00
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return 0;
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}
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/*
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* Read extended CSD.
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*/
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static int mmc_get_ext_csd(struct rt_mmcsd_card *card, rt_uint8_t **new_ext_csd)
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{
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void *ext_csd;
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struct rt_mmcsd_req req;
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struct rt_mmcsd_cmd cmd;
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struct rt_mmcsd_data data;
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2021-03-08 18:19:04 +08:00
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2015-06-20 23:23:32 +08:00
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*new_ext_csd = RT_NULL;
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2021-03-08 18:19:04 +08:00
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2015-06-20 23:23:32 +08:00
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if (GET_BITS(card->resp_cid, 122, 4) < 4)
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return 0;
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2021-03-08 18:19:04 +08:00
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2015-06-20 23:23:32 +08:00
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/*
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* As the ext_csd is so large and mostly unused, we don't store the
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* raw block in mmc_card.
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*/
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ext_csd = rt_malloc(512);
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if (!ext_csd) {
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2018-09-05 14:50:43 +08:00
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LOG_E("alloc memory failed when get ext csd!");
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2015-06-20 23:23:32 +08:00
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return -RT_ENOMEM;
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}
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2021-03-08 18:19:04 +08:00
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2015-06-20 23:23:32 +08:00
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rt_memset(&req, 0, sizeof(struct rt_mmcsd_req));
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rt_memset(&cmd, 0, sizeof(struct rt_mmcsd_cmd));
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rt_memset(&data, 0, sizeof(struct rt_mmcsd_data));
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2021-03-08 18:19:04 +08:00
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2015-06-20 23:23:32 +08:00
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req.cmd = &cmd;
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req.data = &data;
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2021-03-08 18:19:04 +08:00
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2015-06-20 23:23:32 +08:00
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cmd.cmd_code = SEND_EXT_CSD;
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cmd.arg = 0;
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2021-03-08 18:19:04 +08:00
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2015-06-20 23:23:32 +08:00
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/* NOTE HACK: the RESP_SPI_R1 is always correct here, but we
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* rely on callers to never use this with "native" calls for reading
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* CSD or CID. Native versions of those commands use the R2 type,
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* not R1 plus a data block.
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*/
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cmd.flags = RESP_SPI_R1 | RESP_R1 | CMD_ADTC;
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2021-03-08 18:19:04 +08:00
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2015-06-20 23:23:32 +08:00
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data.blksize = 512;
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data.blks = 1;
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data.flags = DATA_DIR_READ;
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data.buf = ext_csd;
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2021-03-08 18:19:04 +08:00
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2015-06-20 23:23:32 +08:00
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/*
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* Some cards require longer data read timeout than indicated in CSD.
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* Address this by setting the read timeout to a "reasonably high"
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* value. For the cards tested, 300ms has proven enough. If necessary,
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* this value can be increased if other problematic cards require this.
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*/
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data.timeout_ns = 300000000;
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data.timeout_clks = 0;
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2021-03-08 18:19:04 +08:00
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2015-06-20 23:23:32 +08:00
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mmcsd_send_request(card->host, &req);
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2021-03-08 18:19:04 +08:00
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2015-06-20 23:23:32 +08:00
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if (cmd.err)
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return cmd.err;
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if (data.err)
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return data.err;
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2021-03-08 18:19:04 +08:00
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2015-06-20 23:23:32 +08:00
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*new_ext_csd = ext_csd;
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return 0;
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}
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/*
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* Decode extended CSD.
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*/
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static int mmc_parse_ext_csd(struct rt_mmcsd_card *card, rt_uint8_t *ext_csd)
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{
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2019-07-18 19:57:02 +08:00
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rt_uint64_t card_capacity = 0;
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2018-09-22 15:05:05 +08:00
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if(card == RT_NULL || ext_csd == RT_NULL)
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2018-09-22 15:02:48 +08:00
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{
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LOG_E("emmc parse ext csd fail, invaild args");
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return -1;
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}
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2018-09-22 15:05:05 +08:00
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2015-06-20 23:23:32 +08:00
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card->flags |= CARD_FLAG_HIGHSPEED;
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2020-03-16 14:45:41 +08:00
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card->hs_max_data_rate = 52000000;
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2021-03-08 18:19:04 +08:00
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2019-07-18 19:57:02 +08:00
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card_capacity = *((rt_uint32_t *)&ext_csd[EXT_CSD_SEC_CNT]);
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card_capacity *= card->card_blksize;
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card_capacity >>= 10; /* unit:KB */
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card->card_capacity = card_capacity;
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2018-09-05 14:50:43 +08:00
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LOG_I("emmc card capacity %d KB.", card->card_capacity);
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2021-03-08 18:19:04 +08:00
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2015-06-20 23:23:32 +08:00
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return 0;
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}
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/**
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* mmc_switch - modify EXT_CSD register
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* @card: the MMC card associated with the data transfer
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* @set: cmd set values
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* @index: EXT_CSD register index
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* @value: value to program into EXT_CSD register
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*
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* Modifies the EXT_CSD register for selected card.
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*/
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2021-03-08 18:19:04 +08:00
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static int mmc_switch(struct rt_mmcsd_card *card, rt_uint8_t set,
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2015-06-20 23:23:32 +08:00
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rt_uint8_t index, rt_uint8_t value)
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{
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int err;
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struct rt_mmcsd_host *host = card->host;
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struct rt_mmcsd_cmd cmd = {0};
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2021-03-08 18:19:04 +08:00
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2015-06-20 23:23:32 +08:00
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cmd.cmd_code = SWITCH;
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cmd.arg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) |
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(index << 16) | (value << 8) | set;
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cmd.flags = RESP_SPI_R1 | RESP_R1 | CMD_AC;
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2021-03-08 18:19:04 +08:00
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2015-06-20 23:23:32 +08:00
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err = mmcsd_send_cmd(host, &cmd, 3);
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if (err)
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return err;
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2021-03-08 18:19:04 +08:00
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2015-06-20 23:23:32 +08:00
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return 0;
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}
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2021-03-08 18:19:04 +08:00
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static int mmc_compare_ext_csds(struct rt_mmcsd_card *card,
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2015-06-20 23:23:32 +08:00
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rt_uint8_t *ext_csd, rt_uint32_t bus_width)
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{
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rt_uint8_t *bw_ext_csd;
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int err;
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2021-03-08 18:19:04 +08:00
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2015-06-20 23:23:32 +08:00
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if (bus_width == MMCSD_BUS_WIDTH_1)
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return 0;
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2021-03-08 18:19:04 +08:00
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2015-06-20 23:23:32 +08:00
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err = mmc_get_ext_csd(card, &bw_ext_csd);
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2021-03-08 18:19:04 +08:00
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2015-06-20 23:23:32 +08:00
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if (err || bw_ext_csd == RT_NULL) {
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err = -RT_ERROR;
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goto out;
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}
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2021-03-08 18:19:04 +08:00
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2015-06-20 23:23:32 +08:00
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/* only compare read only fields */
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err = !((ext_csd[EXT_CSD_PARTITION_SUPPORT] == bw_ext_csd[EXT_CSD_PARTITION_SUPPORT]) &&
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(ext_csd[EXT_CSD_ERASED_MEM_CONT] == bw_ext_csd[EXT_CSD_ERASED_MEM_CONT]) &&
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(ext_csd[EXT_CSD_REV] == bw_ext_csd[EXT_CSD_REV]) &&
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(ext_csd[EXT_CSD_STRUCTURE] == bw_ext_csd[EXT_CSD_STRUCTURE]) &&
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(ext_csd[EXT_CSD_CARD_TYPE] == bw_ext_csd[EXT_CSD_CARD_TYPE]) &&
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(ext_csd[EXT_CSD_S_A_TIMEOUT] == bw_ext_csd[EXT_CSD_S_A_TIMEOUT]) &&
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(ext_csd[EXT_CSD_HC_WP_GRP_SIZE] == bw_ext_csd[EXT_CSD_HC_WP_GRP_SIZE]) &&
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(ext_csd[EXT_CSD_ERASE_TIMEOUT_MULT] == bw_ext_csd[EXT_CSD_ERASE_TIMEOUT_MULT]) &&
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(ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] == bw_ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]) &&
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(ext_csd[EXT_CSD_SEC_TRIM_MULT] == bw_ext_csd[EXT_CSD_SEC_TRIM_MULT]) &&
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(ext_csd[EXT_CSD_SEC_ERASE_MULT] == bw_ext_csd[EXT_CSD_SEC_ERASE_MULT]) &&
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(ext_csd[EXT_CSD_SEC_FEATURE_SUPPORT] == bw_ext_csd[EXT_CSD_SEC_FEATURE_SUPPORT]) &&
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(ext_csd[EXT_CSD_TRIM_MULT] == bw_ext_csd[EXT_CSD_TRIM_MULT]) &&
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(ext_csd[EXT_CSD_SEC_CNT + 0] == bw_ext_csd[EXT_CSD_SEC_CNT + 0]) &&
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(ext_csd[EXT_CSD_SEC_CNT + 1] == bw_ext_csd[EXT_CSD_SEC_CNT + 1]) &&
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(ext_csd[EXT_CSD_SEC_CNT + 2] == bw_ext_csd[EXT_CSD_SEC_CNT + 2]) &&
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(ext_csd[EXT_CSD_SEC_CNT + 3] == bw_ext_csd[EXT_CSD_SEC_CNT + 3]) &&
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(ext_csd[EXT_CSD_PWR_CL_52_195] == bw_ext_csd[EXT_CSD_PWR_CL_52_195]) &&
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(ext_csd[EXT_CSD_PWR_CL_26_195] == bw_ext_csd[EXT_CSD_PWR_CL_26_195]) &&
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(ext_csd[EXT_CSD_PWR_CL_52_360] == bw_ext_csd[EXT_CSD_PWR_CL_52_360]) &&
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(ext_csd[EXT_CSD_PWR_CL_26_360] == bw_ext_csd[EXT_CSD_PWR_CL_26_360]) &&
|
|
|
|
(ext_csd[EXT_CSD_PWR_CL_200_195] == bw_ext_csd[EXT_CSD_PWR_CL_200_195]) &&
|
|
|
|
(ext_csd[EXT_CSD_PWR_CL_200_360] == bw_ext_csd[EXT_CSD_PWR_CL_200_360]) &&
|
|
|
|
(ext_csd[EXT_CSD_PWR_CL_DDR_52_195] == bw_ext_csd[EXT_CSD_PWR_CL_DDR_52_195]) &&
|
|
|
|
(ext_csd[EXT_CSD_PWR_CL_DDR_52_360] == bw_ext_csd[EXT_CSD_PWR_CL_DDR_52_360]) &&
|
|
|
|
(ext_csd[EXT_CSD_PWR_CL_DDR_200_360] == bw_ext_csd[EXT_CSD_PWR_CL_DDR_200_360]));
|
2021-03-08 18:19:04 +08:00
|
|
|
|
2015-06-20 23:23:32 +08:00
|
|
|
if (err)
|
|
|
|
err = -RT_ERROR;
|
2021-03-08 18:19:04 +08:00
|
|
|
|
2015-06-20 23:23:32 +08:00
|
|
|
out:
|
|
|
|
rt_free(bw_ext_csd);
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Select the bus width amoung 4-bit and 8-bit(SDR).
|
|
|
|
* If the bus width is changed successfully, return the selected width value.
|
|
|
|
* Zero is returned instead of error value if the wide width is not supported.
|
|
|
|
*/
|
|
|
|
static int mmc_select_bus_width(struct rt_mmcsd_card *card, rt_uint8_t *ext_csd)
|
|
|
|
{
|
|
|
|
rt_uint32_t ext_csd_bits[] = {
|
|
|
|
EXT_CSD_BUS_WIDTH_8,
|
|
|
|
EXT_CSD_BUS_WIDTH_4,
|
|
|
|
EXT_CSD_BUS_WIDTH_1
|
|
|
|
};
|
|
|
|
rt_uint32_t bus_widths[] = {
|
|
|
|
MMCSD_BUS_WIDTH_8,
|
|
|
|
MMCSD_BUS_WIDTH_4,
|
|
|
|
MMCSD_BUS_WIDTH_1
|
|
|
|
};
|
|
|
|
struct rt_mmcsd_host *host = card->host;
|
|
|
|
unsigned idx, bus_width = 0;
|
|
|
|
int err = 0;
|
2021-03-08 18:19:04 +08:00
|
|
|
|
2015-06-20 23:23:32 +08:00
|
|
|
if (GET_BITS(card->resp_cid, 122, 4) < 4)
|
|
|
|
return 0;
|
2021-03-08 18:19:04 +08:00
|
|
|
|
2015-06-20 23:23:32 +08:00
|
|
|
/*
|
|
|
|
* Unlike SD, MMC cards dont have a configuration register to notify
|
|
|
|
* supported bus width. So bus test command should be run to identify
|
|
|
|
* the supported bus width or compare the ext csd values of current
|
|
|
|
* bus width and ext csd values of 1 bit mode read earlier.
|
|
|
|
*/
|
|
|
|
for (idx = 0; idx < sizeof(bus_widths)/sizeof(rt_uint32_t); idx++) {
|
|
|
|
/*
|
|
|
|
* Host is capable of 8bit transfer, then switch
|
|
|
|
* the device to work in 8bit transfer mode. If the
|
|
|
|
* mmc switch command returns error then switch to
|
|
|
|
* 4bit transfer mode. On success set the corresponding
|
2020-03-12 08:52:56 +08:00
|
|
|
* bus width on the host. Meanwhile, mmc core would
|
|
|
|
* bail out early if corresponding bus capable wasn't
|
|
|
|
* set by drivers.
|
2015-06-20 23:23:32 +08:00
|
|
|
*/
|
2020-03-12 08:52:56 +08:00
|
|
|
if ((!(host->flags & MMCSD_BUSWIDTH_8) &&
|
2021-03-08 18:19:04 +08:00
|
|
|
ext_csd_bits[idx] == EXT_CSD_BUS_WIDTH_8) ||
|
2020-03-12 08:52:56 +08:00
|
|
|
(!(host->flags & MMCSD_BUSWIDTH_4) &&
|
2021-03-08 18:19:04 +08:00
|
|
|
(ext_csd_bits[idx] == EXT_CSD_BUS_WIDTH_4 ||
|
|
|
|
ext_csd_bits[idx] == EXT_CSD_BUS_WIDTH_8)))
|
|
|
|
continue;
|
2020-03-12 08:52:56 +08:00
|
|
|
|
2015-06-20 23:23:32 +08:00
|
|
|
err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
|
|
|
|
EXT_CSD_BUS_WIDTH,
|
|
|
|
ext_csd_bits[idx]);
|
|
|
|
if (err)
|
|
|
|
continue;
|
2021-03-08 18:19:04 +08:00
|
|
|
|
2015-06-20 23:23:32 +08:00
|
|
|
bus_width = bus_widths[idx];
|
|
|
|
mmcsd_set_bus_width(host, bus_width);
|
|
|
|
mmcsd_delay_ms(20); //delay 10ms
|
|
|
|
err = mmc_compare_ext_csds(card, ext_csd, bus_width);
|
|
|
|
if (!err) {
|
|
|
|
err = bus_width;
|
|
|
|
break;
|
|
|
|
} else {
|
|
|
|
switch(ext_csd_bits[idx]){
|
|
|
|
case 0:
|
2018-09-05 14:50:43 +08:00
|
|
|
LOG_E("switch to bus width 1 bit failed!");
|
2015-06-20 23:23:32 +08:00
|
|
|
break;
|
|
|
|
case 1:
|
2018-09-05 14:50:43 +08:00
|
|
|
LOG_E("switch to bus width 4 bit failed!");
|
2015-06-20 23:23:32 +08:00
|
|
|
break;
|
|
|
|
case 2:
|
2018-09-05 14:50:43 +08:00
|
|
|
LOG_E("switch to bus width 8 bit failed!");
|
2015-06-20 23:23:32 +08:00
|
|
|
break;
|
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
2021-03-08 18:19:04 +08:00
|
|
|
|
2015-06-20 23:23:32 +08:00
|
|
|
return err;
|
|
|
|
}
|
2021-03-08 18:19:04 +08:00
|
|
|
rt_err_t mmc_send_op_cond(struct rt_mmcsd_host *host,
|
2015-06-20 23:23:32 +08:00
|
|
|
rt_uint32_t ocr, rt_uint32_t *rocr)
|
|
|
|
{
|
|
|
|
struct rt_mmcsd_cmd cmd;
|
|
|
|
rt_uint32_t i;
|
|
|
|
rt_err_t err = RT_EOK;
|
|
|
|
|
|
|
|
rt_memset(&cmd, 0, sizeof(struct rt_mmcsd_cmd));
|
2021-03-08 18:19:04 +08:00
|
|
|
|
2015-06-20 23:23:32 +08:00
|
|
|
cmd.cmd_code = SEND_OP_COND;
|
|
|
|
cmd.arg = controller_is_spi(host) ? 0 : ocr;
|
|
|
|
cmd.flags = RESP_SPI_R1 | RESP_R3 | CMD_BCR;
|
2021-03-08 18:19:04 +08:00
|
|
|
|
2015-06-20 23:23:32 +08:00
|
|
|
for (i = 100; i; i--) {
|
|
|
|
err = mmcsd_send_cmd(host, &cmd, 3);
|
|
|
|
if (err)
|
|
|
|
break;
|
2021-03-08 18:19:04 +08:00
|
|
|
|
2015-06-20 23:23:32 +08:00
|
|
|
/* if we're just probing, do a single pass */
|
|
|
|
if (ocr == 0)
|
|
|
|
break;
|
2021-03-08 18:19:04 +08:00
|
|
|
|
2015-06-20 23:23:32 +08:00
|
|
|
/* otherwise wait until reset completes */
|
|
|
|
if (controller_is_spi(host)) {
|
|
|
|
if (!(cmd.resp[0] & R1_SPI_IDLE))
|
|
|
|
break;
|
|
|
|
} else {
|
|
|
|
if (cmd.resp[0] & CARD_BUSY)
|
|
|
|
break;
|
|
|
|
}
|
2021-03-08 18:19:04 +08:00
|
|
|
|
2015-06-20 23:23:32 +08:00
|
|
|
err = -RT_ETIMEOUT;
|
2021-03-08 18:19:04 +08:00
|
|
|
|
2015-06-20 23:23:32 +08:00
|
|
|
mmcsd_delay_ms(10); //delay 10ms
|
|
|
|
}
|
2021-03-08 18:19:04 +08:00
|
|
|
|
2015-06-20 23:23:32 +08:00
|
|
|
if (rocr && !controller_is_spi(host))
|
|
|
|
*rocr = cmd.resp[0];
|
2021-03-08 18:19:04 +08:00
|
|
|
|
2015-06-20 23:23:32 +08:00
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
|
|
|
static rt_err_t mmc_set_card_addr(struct rt_mmcsd_host *host, rt_uint32_t rca)
|
|
|
|
{
|
|
|
|
rt_err_t err;
|
|
|
|
struct rt_mmcsd_cmd cmd;
|
2021-03-08 18:19:04 +08:00
|
|
|
|
2015-06-20 23:23:32 +08:00
|
|
|
rt_memset(&cmd, 0, sizeof(struct rt_mmcsd_cmd));
|
2021-03-08 18:19:04 +08:00
|
|
|
|
2015-06-20 23:23:32 +08:00
|
|
|
cmd.cmd_code = SET_RELATIVE_ADDR;
|
|
|
|
cmd.arg = rca << 16;
|
|
|
|
cmd.flags = RESP_R1 | CMD_AC;
|
2021-03-08 18:19:04 +08:00
|
|
|
|
2015-06-20 23:23:32 +08:00
|
|
|
err = mmcsd_send_cmd(host, &cmd, 3);
|
|
|
|
if (err)
|
|
|
|
return err;
|
2021-03-08 18:19:04 +08:00
|
|
|
|
2015-06-20 23:23:32 +08:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static rt_int32_t mmcsd_mmc_init_card(struct rt_mmcsd_host *host,
|
|
|
|
rt_uint32_t ocr)
|
|
|
|
{
|
|
|
|
rt_int32_t err;
|
|
|
|
rt_uint32_t resp[4];
|
2018-09-22 15:05:05 +08:00
|
|
|
rt_uint32_t rocr = 0;
|
2015-06-20 23:23:32 +08:00
|
|
|
rt_uint32_t max_data_rate;
|
|
|
|
rt_uint8_t *ext_csd = RT_NULL;
|
2018-06-26 11:09:13 +08:00
|
|
|
struct rt_mmcsd_card *card = RT_NULL;
|
2015-06-20 23:23:32 +08:00
|
|
|
|
|
|
|
mmcsd_go_idle(host);
|
2021-03-08 18:19:04 +08:00
|
|
|
|
2015-06-20 23:23:32 +08:00
|
|
|
/* The extra bit indicates that we support high capacity */
|
|
|
|
err = mmc_send_op_cond(host, ocr | (1 << 30), &rocr);
|
|
|
|
if (err)
|
|
|
|
goto err;
|
2021-03-08 18:19:04 +08:00
|
|
|
|
|
|
|
if (controller_is_spi(host))
|
2015-06-20 23:23:32 +08:00
|
|
|
{
|
|
|
|
err = mmcsd_spi_use_crc(host, 1);
|
|
|
|
if (err)
|
|
|
|
goto err1;
|
|
|
|
}
|
2021-03-08 18:19:04 +08:00
|
|
|
|
2015-06-20 23:23:32 +08:00
|
|
|
if (controller_is_spi(host))
|
|
|
|
err = mmcsd_get_cid(host, resp);
|
|
|
|
else
|
|
|
|
err = mmcsd_all_get_cid(host, resp);
|
|
|
|
if (err)
|
|
|
|
goto err;
|
|
|
|
|
|
|
|
card = rt_malloc(sizeof(struct rt_mmcsd_card));
|
2021-03-08 18:19:04 +08:00
|
|
|
if (!card)
|
2015-06-20 23:23:32 +08:00
|
|
|
{
|
2018-09-05 14:50:43 +08:00
|
|
|
LOG_E("malloc card failed!");
|
2015-06-20 23:23:32 +08:00
|
|
|
err = -RT_ENOMEM;
|
|
|
|
goto err;
|
|
|
|
}
|
|
|
|
rt_memset(card, 0, sizeof(struct rt_mmcsd_card));
|
|
|
|
|
|
|
|
card->card_type = CARD_TYPE_MMC;
|
|
|
|
card->host = host;
|
|
|
|
card->rca = 1;
|
|
|
|
rt_memcpy(card->resp_cid, resp, sizeof(card->resp_cid));
|
|
|
|
|
|
|
|
/*
|
|
|
|
* For native busses: get card RCA and quit open drain mode.
|
|
|
|
*/
|
2021-03-08 18:19:04 +08:00
|
|
|
if (!controller_is_spi(host))
|
2015-06-20 23:23:32 +08:00
|
|
|
{
|
|
|
|
err = mmc_set_card_addr(host, card->rca);
|
|
|
|
if (err)
|
|
|
|
goto err1;
|
|
|
|
|
|
|
|
mmcsd_set_bus_mode(host, MMCSD_BUSMODE_PUSHPULL);
|
|
|
|
}
|
|
|
|
|
|
|
|
err = mmcsd_get_csd(card, card->resp_csd);
|
|
|
|
if (err)
|
|
|
|
goto err1;
|
|
|
|
|
|
|
|
err = mmcsd_parse_csd(card);
|
|
|
|
if (err)
|
|
|
|
goto err1;
|
|
|
|
|
2021-03-08 18:19:04 +08:00
|
|
|
if (!controller_is_spi(host))
|
2015-06-20 23:23:32 +08:00
|
|
|
{
|
|
|
|
err = mmcsd_select_card(card);
|
|
|
|
if (err)
|
|
|
|
goto err1;
|
|
|
|
}
|
2021-03-08 18:19:04 +08:00
|
|
|
|
2015-06-20 23:23:32 +08:00
|
|
|
/*
|
|
|
|
* Fetch and process extended CSD.
|
|
|
|
*/
|
2021-03-08 18:19:04 +08:00
|
|
|
|
2015-06-20 23:23:32 +08:00
|
|
|
err = mmc_get_ext_csd(card, &ext_csd);
|
|
|
|
if (err)
|
|
|
|
goto err1;
|
|
|
|
err = mmc_parse_ext_csd(card, ext_csd);
|
|
|
|
if (err)
|
|
|
|
goto err1;
|
2021-03-08 18:19:04 +08:00
|
|
|
|
2015-06-20 23:23:32 +08:00
|
|
|
/* If doing byte addressing, check if required to do sector
|
|
|
|
* addressing. Handle the case of <2GB cards needing sector
|
|
|
|
* addressing. See section 8.1 JEDEC Standard JED84-A441;
|
|
|
|
* ocr register has bit 30 set for sector addressing.
|
|
|
|
*/
|
|
|
|
if (!(card->flags & CARD_FLAG_SDHC) && (rocr & (1<<30)))
|
|
|
|
card->flags |= CARD_FLAG_SDHC;
|
2021-03-08 18:19:04 +08:00
|
|
|
|
2015-06-20 23:23:32 +08:00
|
|
|
/* set bus speed */
|
2021-03-08 18:19:04 +08:00
|
|
|
if (card->flags & CARD_FLAG_HIGHSPEED)
|
2020-03-16 14:45:41 +08:00
|
|
|
max_data_rate = card->hs_max_data_rate;
|
|
|
|
else
|
2015-06-20 23:23:32 +08:00
|
|
|
max_data_rate = card->max_data_rate;
|
|
|
|
|
|
|
|
mmcsd_set_clock(host, max_data_rate);
|
|
|
|
|
|
|
|
/*switch bus width*/
|
|
|
|
mmc_select_bus_width(card, ext_csd);
|
2021-03-08 18:19:04 +08:00
|
|
|
|
2015-06-20 23:23:32 +08:00
|
|
|
host->card = card;
|
|
|
|
|
|
|
|
rt_free(ext_csd);
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
err1:
|
|
|
|
rt_free(card);
|
|
|
|
err:
|
|
|
|
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Starting point for mmc card init.
|
|
|
|
*/
|
|
|
|
rt_int32_t init_mmc(struct rt_mmcsd_host *host, rt_uint32_t ocr)
|
|
|
|
{
|
|
|
|
rt_int32_t err;
|
|
|
|
rt_uint32_t current_ocr;
|
|
|
|
/*
|
|
|
|
* We need to get OCR a different way for SPI.
|
|
|
|
*/
|
|
|
|
if (controller_is_spi(host))
|
|
|
|
{
|
|
|
|
err = mmcsd_spi_read_ocr(host, 0, &ocr);
|
|
|
|
if (err)
|
|
|
|
goto err;
|
|
|
|
}
|
|
|
|
|
|
|
|
current_ocr = mmcsd_select_voltage(host, ocr);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Can we support the voltage(s) of the card(s)?
|
|
|
|
*/
|
|
|
|
if (!current_ocr)
|
|
|
|
{
|
|
|
|
err = -RT_ERROR;
|
|
|
|
goto err;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Detect and init the card.
|
|
|
|
*/
|
|
|
|
err = mmcsd_mmc_init_card(host, current_ocr);
|
|
|
|
if (err)
|
|
|
|
goto err;
|
|
|
|
|
|
|
|
mmcsd_host_unlock(host);
|
|
|
|
|
|
|
|
err = rt_mmcsd_blk_probe(host->card);
|
|
|
|
if (err)
|
|
|
|
goto remove_card;
|
|
|
|
mmcsd_host_lock(host);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
remove_card:
|
|
|
|
mmcsd_host_lock(host);
|
|
|
|
rt_mmcsd_blk_remove(host->card);
|
|
|
|
rt_free(host->card);
|
|
|
|
host->card = RT_NULL;
|
|
|
|
err:
|
|
|
|
|
2018-09-05 14:50:43 +08:00
|
|
|
LOG_E("init MMC card failed!");
|
2015-06-20 23:23:32 +08:00
|
|
|
|
|
|
|
return err;
|
|
|
|
}
|