2022-05-12 17:59:15 +08:00
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/*
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* Copyright (c) 2006-2021, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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2022-05-19 11:07:28 +08:00
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* 2022-05-16 shelton first version
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2022-05-12 17:59:15 +08:00
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*/
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2022-05-19 11:07:28 +08:00
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#include "drv_common.h"
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2022-05-12 17:59:15 +08:00
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#include "drv_spi.h"
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#ifdef RT_USING_SPI
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#if !defined(BSP_USING_SPI1) && !defined(BSP_USING_SPI2) && \
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!defined(BSP_USING_SPI3) && !defined(BSP_USING_SPI4)
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#error "Please define at least one BSP_USING_SPIx"
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#endif
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#define ARR_LEN(__N) (sizeof(__N) / sizeof(__N[0]))
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//#define DRV_DEBUG
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#define LOG_TAG "drv.pwm"
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#include <drv_log.h>
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/* private rt-thread spi ops function */
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static rt_err_t configure(struct rt_spi_device* device, struct rt_spi_configuration* configuration);
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static rt_uint32_t xfer(struct rt_spi_device* device, struct rt_spi_message* message);
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static struct rt_spi_ops at32_spi_ops =
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{
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configure,
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xfer
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};
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/**
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* attach the spi device to spi bus, this function must be used after initialization.
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*/
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rt_err_t rt_hw_spi_device_attach(const char *bus_name, const char *device_name, gpio_type *cs_gpiox, uint16_t cs_gpio_pin)
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{
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gpio_init_type gpio_init_struct;
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RT_ASSERT(bus_name != RT_NULL);
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RT_ASSERT(device_name != RT_NULL);
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rt_err_t result;
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struct rt_spi_device *spi_device;
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struct at32_spi_cs *cs_pin;
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/* initialize the cs pin & select the slave*/
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gpio_default_para_init(&gpio_init_struct);
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gpio_init_struct.gpio_pins = cs_gpio_pin;
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gpio_init_struct.gpio_mode = GPIO_MODE_OUTPUT;
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gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
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gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
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gpio_init(cs_gpiox, &gpio_init_struct);
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gpio_bits_set(cs_gpiox, cs_gpio_pin);
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/* attach the device to spi bus */
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spi_device = (struct rt_spi_device *)rt_malloc(sizeof(struct rt_spi_device));
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RT_ASSERT(spi_device != RT_NULL);
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cs_pin = (struct at32_spi_cs *)rt_malloc(sizeof(struct at32_spi_cs));
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RT_ASSERT(cs_pin != RT_NULL);
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cs_pin->gpio_x = cs_gpiox;
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cs_pin->gpio_pin = cs_gpio_pin;
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result = rt_spi_bus_attach_device(spi_device, device_name, bus_name, (void *)cs_pin);
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if (result != RT_EOK)
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{
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LOG_D("%s attach to %s faild, %d\n", device_name, bus_name, result);
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}
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RT_ASSERT(result == RT_EOK);
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LOG_D("%s attach to %s done", device_name, bus_name);
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return result;
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}
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static rt_err_t configure(struct rt_spi_device* device,
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struct rt_spi_configuration* configuration)
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{
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struct rt_spi_bus * spi_bus = (struct rt_spi_bus *)device->bus;
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struct at32_spi *spi_instance = (struct at32_spi *)spi_bus->parent.user_data;
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spi_init_type spi_init_struct;
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RT_ASSERT(device != RT_NULL);
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RT_ASSERT(configuration != RT_NULL);
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at32_msp_spi_init(spi_instance->config->spi_x);
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/* data_width */
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if(configuration->data_width <= 8)
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{
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spi_init_struct.frame_bit_num = SPI_FRAME_8BIT;
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}
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else if(configuration->data_width <= 16)
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{
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spi_init_struct.frame_bit_num = SPI_FRAME_16BIT;
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}
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else
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{
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return RT_EIO;
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}
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/* baudrate */
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{
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uint32_t spi_apb_clock;
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uint32_t max_hz;
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crm_clocks_freq_type clocks_struct;
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max_hz = configuration->max_hz;
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crm_clocks_freq_get(&clocks_struct);
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LOG_D("sys freq: %d\n", clocks_struct.sclk_freq);
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LOG_D("max freq: %d\n", max_hz);
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if (spi_instance->config->spi_x == SPI1)
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{
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spi_apb_clock = clocks_struct.apb2_freq;
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LOG_D("pclk2 freq: %d\n", clocks_struct.apb2_freq);
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}
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else
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{
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spi_apb_clock = clocks_struct.apb1_freq;
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LOG_D("pclk1 freq: %d\n", clocks_struct.apb1_freq);
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}
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if(max_hz >= (spi_apb_clock / 2))
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{
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spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_2;
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}
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else if (max_hz >= (spi_apb_clock / 4))
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{
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spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_4;
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}
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else if (max_hz >= (spi_apb_clock / 8))
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{
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spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_8;
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}
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else if (max_hz >= (spi_apb_clock / 16))
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{
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spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_16;
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}
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else if (max_hz >= (spi_apb_clock / 32))
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{
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spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_32;
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}
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else if (max_hz >= (spi_apb_clock / 64))
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{
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spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_64;
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}
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else if (max_hz >= (spi_apb_clock / 128))
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{
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spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_128;
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}
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else
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{
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/* min prescaler 256 */
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spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_256;
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}
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} /* baudrate */
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switch(configuration->mode & RT_SPI_MODE_3)
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{
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case RT_SPI_MODE_0:
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spi_init_struct.clock_phase = SPI_CLOCK_PHASE_1EDGE;
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spi_init_struct.clock_polarity = SPI_CLOCK_POLARITY_LOW;
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break;
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case RT_SPI_MODE_1:
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spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE;
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spi_init_struct.clock_polarity = SPI_CLOCK_POLARITY_LOW;
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break;
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case RT_SPI_MODE_2:
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spi_init_struct.clock_phase = SPI_CLOCK_PHASE_1EDGE;
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spi_init_struct.clock_polarity = SPI_CLOCK_POLARITY_HIGH;
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break;
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case RT_SPI_MODE_3:
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spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE;
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spi_init_struct.clock_polarity = SPI_CLOCK_POLARITY_HIGH;
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break;
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}
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/* msb or lsb */
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if(configuration->mode & RT_SPI_MSB)
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{
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spi_init_struct.first_bit_transmission = SPI_FIRST_BIT_MSB;
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}
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else
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{
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spi_init_struct.first_bit_transmission = SPI_FIRST_BIT_LSB;
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}
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spi_init_struct.transmission_mode = SPI_TRANSMIT_FULL_DUPLEX;
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spi_init_struct.master_slave_mode = SPI_MODE_MASTER;
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spi_init_struct.cs_mode_selection = SPI_CS_SOFTWARE_MODE;
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/* init spi */
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spi_init(spi_instance->config->spi_x, &spi_init_struct);
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/* enable spi */
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spi_enable(spi_instance->config->spi_x, TRUE);
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/* disable spi crc */
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spi_crc_enable(spi_instance->config->spi_x, FALSE);
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return RT_EOK;
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};
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static rt_uint32_t xfer(struct rt_spi_device* device, struct rt_spi_message* message)
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{
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struct rt_spi_bus * at32_spi_bus = (struct rt_spi_bus *)device->bus;
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struct at32_spi *spi_instance = (struct at32_spi *)at32_spi_bus->parent.user_data;
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struct rt_spi_configuration * config = &device->config;
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struct at32_spi_cs * at32_spi_cs = device->parent.user_data;
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RT_ASSERT(device != NULL);
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RT_ASSERT(message != NULL);
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/* take cs */
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if(message->cs_take)
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{
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gpio_bits_reset(at32_spi_cs->gpio_x, at32_spi_cs->gpio_pin);
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LOG_D("spi take cs\n");
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}
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if(config->data_width <= 8)
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{
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const rt_uint8_t *send_ptr = message->send_buf;
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rt_uint8_t * recv_ptr = message->recv_buf;
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rt_uint32_t size = message->length;
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LOG_D("spi poll transfer start: %d\n", size);
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while(size--)
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{
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rt_uint8_t data = 0xFF;
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if(send_ptr != RT_NULL)
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{
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data = *send_ptr++;
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}
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/* wait until the transmit buffer is empty */
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while(spi_i2s_flag_get(spi_instance->config->spi_x, SPI_I2S_TDBE_FLAG) == RESET);
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/* send the byte */
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spi_i2s_data_transmit(spi_instance->config->spi_x, data);
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/* wait until a data is received */
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while(spi_i2s_flag_get(spi_instance->config->spi_x, SPI_I2S_RDBF_FLAG) == RESET);
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/* get the received data */
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data = spi_i2s_data_receive(spi_instance->config->spi_x);
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if(recv_ptr != RT_NULL)
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{
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*recv_ptr++ = data;
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}
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}
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LOG_D("spi poll transfer finsh\n");
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}
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else if(config->data_width <= 16)
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{
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const rt_uint16_t * send_ptr = message->send_buf;
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rt_uint16_t * recv_ptr = message->recv_buf;
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rt_uint32_t size = message->length;
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while(size--)
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{
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rt_uint16_t data = 0xFF;
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if(send_ptr != RT_NULL)
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{
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data = *send_ptr++;
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}
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/* wait until the transmit buffer is empty */
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while(spi_i2s_flag_get(spi_instance->config->spi_x, SPI_I2S_TDBE_FLAG) == RESET);
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/* send the byte */
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spi_i2s_data_transmit(spi_instance->config->spi_x, data);
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/* wait until a data is received */
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while(spi_i2s_flag_get(spi_instance->config->spi_x, SPI_I2S_RDBF_FLAG) == RESET);
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/* get the received data */
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data = spi_i2s_data_receive(spi_instance->config->spi_x);
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if(recv_ptr != RT_NULL)
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{
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*recv_ptr++ = data;
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}
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}
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}
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/* release cs */
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if(message->cs_release)
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{
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gpio_bits_set(at32_spi_cs->gpio_x, at32_spi_cs->gpio_pin);
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LOG_D("spi release cs\n");
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}
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return message->length;
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};
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static struct at32_spi_config configs[] = {
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#ifdef BSP_USING_SPI1
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{SPI1, "spi1"},
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#endif
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#ifdef BSP_USING_SPI2
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{SPI2, "spi2"},
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#endif
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#ifdef BSP_USING_SPI3
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{SPI3, "spi3"},
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#endif
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#ifdef BSP_USING_SPI4
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{SPI4, "spi4"},
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#endif
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};
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static struct at32_spi spis[sizeof(configs) / sizeof(configs[0])] = {0};
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int rt_hw_spi_init(void)
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{
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int i;
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rt_err_t result;
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rt_size_t obj_num = sizeof(spis) / sizeof(struct at32_spi);
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for (i = 0; i < obj_num; i++)
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{
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spis[i].config = &configs[i];
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spis[i].spi_bus.parent.user_data = (void *)&spis[i];
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result = rt_spi_bus_register(&(spis[i].spi_bus), spis[i].config->spi_name, &at32_spi_ops);
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}
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return result;
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}
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INIT_BOARD_EXPORT(rt_hw_spi_init);
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#endif
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