2020-06-17 16:30:11 +08:00
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/**************************************************************************//**
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*
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* @copyright (C) 2019 Nuvoton Technology Corp. All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2020-2-07 ChingI First version
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*
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******************************************************************************/
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#include <rtconfig.h>
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#if defined(BSP_USING_CAN)
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#include <rtdevice.h>
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#include <rthw.h>
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#include <NuMicro.h>
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/* Private Define ---------------------------------------------------------------*/
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#define RX_MSG_ID_INDEX 16
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#define IS_CAN_STDID(STDID) ((STDID) <= 0x7FFU)
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#define IS_CAN_EXTID(EXTID) ((EXTID) <= 0x1FFFFFFFU)
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#define IS_CAN_DLC(DLC) ((DLC) <= 8U)
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/* Default config for serial_configure structure */
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#define NU_CAN_CONFIG_DEFAULT \
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{ \
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CAN1MBaud, /* 1M bits/s */ \
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RT_CANMSG_BOX_SZ, /* message box max size */ \
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RT_CANSND_BOX_NUM, /* message box number */ \
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RT_CAN_MODE_NORMAL, /* Normal mode */ \
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0, /* privmode */ \
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0, /* reserved */ \
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100, /* Timeout Tick */ \
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}
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enum
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{
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CAN_START = -1,
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#if defined(BSP_USING_CAN0)
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CAN0_IDX,
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#endif
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#if defined(BSP_USING_CAN1)
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CAN1_IDX,
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#endif
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#if defined(BSP_USING_CAN2)
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CAN2_IDX,
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#endif
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CAN_CNT
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};
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/* Private Typedef --------------------------------------------------------------*/
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struct nu_can
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{
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struct rt_can_device dev;
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char *name;
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CAN_T *can_base;
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uint32_t can_rst;
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IRQn_Type can_irq_n;
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};
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typedef struct nu_can *nu_can_t;
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/* Private functions ------------------------------------------------------------*/
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static rt_err_t nu_can_configure(struct rt_can_device *can, struct can_configure *cfg);
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static rt_err_t nu_can_control(struct rt_can_device *can, int cmd, void *arg);
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static int nu_can_sendmsg(struct rt_can_device *can, const void *buf, rt_uint32_t boxno);
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static int nu_can_recvmsg(struct rt_can_device *can, void *buf, rt_uint32_t boxno);
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static void nu_can_isr(nu_can_t can);
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static struct nu_can nu_can_arr[] =
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{
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#if defined(BSP_USING_CAN0)
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{
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.name = "can0",
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.can_base = CAN0,
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.can_rst = CAN0_RST,
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.can_irq_n = CAN0_IRQn,
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},
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#endif
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#if defined(BSP_USING_CAN1)
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{
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.name = "can1",
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.can_base = CAN1,
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.can_rst = CAN1_RST,
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.can_irq_n = CAN1_IRQn,
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},
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#endif
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#if defined(BSP_USING_CAN2)
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{
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.name = "can2",
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.can_base = CAN2,
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.can_rst = CAN2_RST,
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.can_irq_n = CAN2_IRQn,
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},
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#endif
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{0}
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2020-08-03 12:15:33 +08:00
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}; /* struct nu_can */
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2020-06-17 16:30:11 +08:00
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/* Public functions ------------------------------------------------------------*/
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/* Private variables ------------------------------------------------------------*/
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static const struct rt_can_ops nu_can_ops =
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{
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.configure = nu_can_configure,
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.control = nu_can_control,
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.sendmsg = nu_can_sendmsg,
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.recvmsg = nu_can_recvmsg,
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};
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static const struct can_configure nu_can_default_config = NU_CAN_CONFIG_DEFAULT;
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2020-08-03 12:15:33 +08:00
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/* Interrupt Handle Function ----------------------------------------------------*/
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2020-06-17 16:30:11 +08:00
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#if defined(BSP_USING_CAN0)
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/* CAN0 interrupt entry */
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void CAN0_IRQHandler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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nu_can_isr(&nu_can_arr[CAN0_IDX]);
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/* leave interrupt */
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rt_interrupt_leave();
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}
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#endif
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#if defined(BSP_USING_CAN1)
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/* CAN1 interrupt entry */
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void CAN1_IRQHandler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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nu_can_isr(&nu_can_arr[CAN1_IDX]);
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/* leave interrupt */
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rt_interrupt_leave();
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}
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#endif
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#if defined(BSP_USING_CAN2)
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/* CAN2 interrupt entry */
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void CAN2_IRQHandler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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nu_can_isr(&nu_can_arr[CAN2_IDX]);
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/* leave interrupt */
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rt_interrupt_leave();
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}
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#endif
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/* Private Variables ------------------------------------------------------------*/
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static void nu_can_isr(nu_can_t can)
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{
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uint32_t u32IIDRstatus;
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/* Get base address of CAN register */
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CAN_T *can_base = ((nu_can_t)can)->can_base;
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/* Get interrupt event */
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2020-12-25 18:39:12 +08:00
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u32IIDRstatus = CAN_GET_INT_PENDING_STATUS(can_base);
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2020-06-17 16:30:11 +08:00
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if (u32IIDRstatus == 0x00008000) /* Check Status Interrupt Flag (Error status Int and Status change Int) */
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{
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/**************************/
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/* Status Change interrupt*/
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/**************************/
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2020-12-25 18:39:12 +08:00
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if (can_base->STATUS & CAN_STATUS_TXOK_Msk)
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2020-06-17 16:30:11 +08:00
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{
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2020-12-25 18:39:12 +08:00
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can_base->STATUS &= ~CAN_STATUS_TXOK_Msk; /* Clear Tx Ok status*/
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2020-06-17 16:30:11 +08:00
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#ifndef RT_CAN_USING_HDR
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/* Using as Lisen,Loopback,Loopback+Lisen mode*/
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2020-12-25 18:39:12 +08:00
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rt_hw_can_isr(&can->dev, RT_CAN_EVENT_TX_DONE);
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2020-06-17 16:30:11 +08:00
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#endif
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2020-12-25 18:39:12 +08:00
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//rt_kprintf("[%s]TX OK INT\n", can->name) ;
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2020-06-17 16:30:11 +08:00
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}
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2020-12-25 18:39:12 +08:00
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if (can_base->STATUS & CAN_STATUS_RXOK_Msk)
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2020-06-17 16:30:11 +08:00
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{
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2020-12-25 18:39:12 +08:00
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can_base->STATUS &= ~CAN_STATUS_RXOK_Msk; /* Clear Rx Ok status*/
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2020-06-17 16:30:11 +08:00
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#ifndef RT_CAN_USING_HDR
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/* Using as Lisen,Loopback,Loopback+Lisen mode*/
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2020-12-25 18:39:12 +08:00
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rt_hw_can_isr(&can->dev, RT_CAN_EVENT_RX_IND);
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2020-06-17 16:30:11 +08:00
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#endif
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2020-12-25 18:39:12 +08:00
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//rt_kprintf("[%s]RX OK INT\n", can->name) ;
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2020-06-17 16:30:11 +08:00
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}
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/**************************/
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/* Error Status interrupt */
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/**************************/
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if (can_base->STATUS & CAN_STATUS_EWARN_Msk)
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{
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2020-12-25 18:39:12 +08:00
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rt_kprintf("[%s]EWARN INT\n", can->name) ;
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2020-06-17 16:30:11 +08:00
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}
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if (can_base->STATUS & CAN_STATUS_BOFF_Msk)
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{
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2020-12-25 18:39:12 +08:00
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rt_kprintf("[%s]BUSOFF INT\n", can->name) ;
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2020-06-17 16:30:11 +08:00
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/* Do Init to release busoff pin */
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can_base->CON = (CAN_CON_INIT_Msk | CAN_CON_CCE_Msk);
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can_base->CON &= (~(CAN_CON_INIT_Msk | CAN_CON_CCE_Msk));
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while (can_base->CON & CAN_CON_INIT_Msk);
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}
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}
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#ifdef RT_CAN_USING_HDR
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2020-12-29 19:35:43 +08:00
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/*IntId: 0x0001-0x0020, Number of Message Object which caused the interrupt.*/
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2020-12-25 18:39:12 +08:00
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else if (u32IIDRstatus > 0 && u32IIDRstatus <= 32)
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2020-06-17 16:30:11 +08:00
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{
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2020-12-29 19:35:43 +08:00
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/*Message RAM 0~RX_MSG_ID_INDEX for CAN Tx using*/
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if (u32IIDRstatus <= RX_MSG_ID_INDEX)
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{
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2020-12-25 18:39:12 +08:00
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//rt_kprintf("[%s-Tx]IntId = %d\n", can->name, u32IIDRstatus);
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2020-06-17 16:30:11 +08:00
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rt_hw_can_isr(&can->dev, RT_CAN_EVENT_TX_DONE);
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2020-12-29 19:35:43 +08:00
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}
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else /*Message RAM RX_MSG_ID_INDEX~31 for CAN Rx using*/
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2020-06-17 16:30:11 +08:00
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{
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2020-12-25 18:39:12 +08:00
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//rt_kprintf("[%s-Rx]IntId = %d\n", can->name, u32IIDRstatus);
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rt_hw_can_isr(&can->dev, (RT_CAN_EVENT_RX_IND | ((u32IIDRstatus - 1) << 8)));
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2020-06-17 16:30:11 +08:00
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}
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2020-12-25 18:39:12 +08:00
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CAN_CLR_INT_PENDING_BIT(can_base, (u32IIDRstatus - 1)); /* Clear Interrupt Pending */
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2020-06-17 16:30:11 +08:00
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}
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#endif
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}
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static rt_err_t nu_can_configure(struct rt_can_device *can, struct can_configure *cfg)
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{
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RT_ASSERT(can != RT_NULL);
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RT_ASSERT(cfg != RT_NULL);
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2020-08-03 12:15:33 +08:00
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/* Get base address of CAN register */
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2020-06-17 16:30:11 +08:00
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CAN_T *can_base = ((nu_can_t)can)->can_base;
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RT_ASSERT(can_base != RT_NULL);
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/* Reset this module */
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SYS_ResetModule(((nu_can_t)can)->can_rst);
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switch (cfg->mode)
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{
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/* CAN default Normal mode */
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case RT_CAN_MODE_NORMAL:
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can->config.mode = CAN_NORMAL_MODE;
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break;
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case RT_CAN_MODE_LISEN:
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can->config.mode = RT_CAN_MODE_LISEN;
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break;
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case RT_CAN_MODE_LOOPBACK:
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can->config.mode = RT_CAN_MODE_LOOPBACK;
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break;
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case RT_CAN_MODE_LOOPBACKANLISEN:
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can->config.mode = RT_CAN_MODE_LOOPBACKANLISEN;
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break;
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default:
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rt_kprintf("Unsupported Operating mode");
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goto exit_nu_can_configure;
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}
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/*Set the CAN Bit Rate and Operating mode*/
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if (CAN_Open(can_base, can->config.baud_rate, can->config.mode) < 1)
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return -(RT_ERROR);
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switch (cfg->mode)
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{
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/* CAN default Normal mode */
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case RT_CAN_MODE_NORMAL:
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#ifdef RT_CAN_USING_HDR
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CAN_LeaveTestMode(can_base);
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#else
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CAN_EnterTestMode(can_base, CAN_TEST_BASIC_Msk);
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#endif
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break;
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case RT_CAN_MODE_LISEN:
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CAN_EnterTestMode(can_base, CAN_TEST_BASIC_Msk | CAN_TEST_SILENT_Msk);
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break;
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case RT_CAN_MODE_LOOPBACK:
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CAN_EnterTestMode(can_base, CAN_TEST_BASIC_Msk | CAN_TEST_LBACK_Msk);
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break;
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case RT_CAN_MODE_LOOPBACKANLISEN:
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CAN_EnterTestMode(can_base, CAN_TEST_BASIC_Msk | CAN_TEST_SILENT_Msk | CAN_TEST_LBACK_Msk);
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break;
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default:
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rt_kprintf("Unsupported Operating mode");
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goto exit_nu_can_configure;
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}
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return RT_EOK;
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exit_nu_can_configure:
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CAN_Close(can_base);
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return -(RT_ERROR);
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}
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static rt_err_t nu_can_control(struct rt_can_device *can, int cmd, void *arg)
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{
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rt_uint32_t argval;
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#ifdef RT_CAN_USING_HDR
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struct rt_can_filter_config *filter_cfg;
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#endif
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2020-08-03 12:15:33 +08:00
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/* Get base address of CAN register */
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2020-06-17 16:30:11 +08:00
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CAN_T *can_base = ((nu_can_t)can)->can_base;
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RT_ASSERT(can_base != RT_NULL);
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2020-12-25 18:39:12 +08:00
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/* Check baud rate */
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2020-06-17 16:30:11 +08:00
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RT_ASSERT(can->config.baud_rate != 0);
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switch (cmd)
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{
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case RT_DEVICE_CTRL_CLR_INT:
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argval = (rt_uint32_t) arg;
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if ((argval == RT_DEVICE_FLAG_INT_RX) || (argval == RT_DEVICE_FLAG_INT_TX))
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{
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/* Disable NVIC interrupt. */
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NVIC_DisableIRQ(((nu_can_t)can)->can_irq_n);
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/* Disable Status Change Interrupt */
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CAN_DisableInt(can_base, CAN_CON_IE_Msk | CAN_CON_SIE_Msk);
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}
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else if (argval == RT_DEVICE_CAN_INT_ERR)
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{
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/* Disable NVIC interrupt. */
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NVIC_DisableIRQ(((nu_can_t)can)->can_irq_n);
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/* Disable Error Interrupt */
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CAN_DisableInt(can_base, CAN_CON_EIE_Msk);
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}
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break;
|
|
|
|
|
|
|
|
case RT_DEVICE_CTRL_SET_INT:
|
|
|
|
argval = (rt_uint32_t) arg;
|
|
|
|
if (argval == RT_DEVICE_FLAG_INT_RX || (argval == RT_DEVICE_FLAG_INT_TX))
|
|
|
|
{
|
|
|
|
/* Enable Status Change Interrupt */
|
|
|
|
CAN_EnableInt(can_base, CAN_CON_IE_Msk | CAN_CON_SIE_Msk);
|
|
|
|
/* Enable NVIC interrupt. */
|
|
|
|
NVIC_EnableIRQ(((nu_can_t)can)->can_irq_n);
|
|
|
|
|
|
|
|
}
|
|
|
|
else if (argval == RT_DEVICE_CAN_INT_ERR)
|
|
|
|
{
|
|
|
|
/* Enable Error Status and Status Change Interrupt */
|
|
|
|
CAN_EnableInt(can_base, CAN_CON_IE_Msk | CAN_CON_SIE_Msk | CAN_CON_EIE_Msk);
|
|
|
|
/* Enable NVIC interrupt. */
|
|
|
|
NVIC_EnableIRQ(((nu_can_t)can)->can_irq_n);
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
|
|
|
#ifdef RT_CAN_USING_HDR
|
2020-12-25 18:39:12 +08:00
|
|
|
case RT_CAN_CMD_SET_FILTER:
|
2020-06-17 16:30:11 +08:00
|
|
|
filter_cfg = (struct rt_can_filter_config *)arg;
|
|
|
|
|
|
|
|
for (int i = 0; i < filter_cfg->count; i++)
|
|
|
|
{
|
|
|
|
|
|
|
|
/*set the filter message object*/
|
|
|
|
if (filter_cfg->items[i].mode == 1)
|
|
|
|
{
|
2020-12-21 14:34:01 +08:00
|
|
|
if (CAN_SetRxMsgObjAndMsk(can_base, MSG(filter_cfg->items[i].hdr + RX_MSG_ID_INDEX), filter_cfg->items[i].ide, filter_cfg->items[i].id, filter_cfg->items[i].mask, FALSE) == FALSE)
|
2020-06-17 16:30:11 +08:00
|
|
|
{
|
|
|
|
return -(RT_ERROR);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
else
|
|
|
|
|
|
|
|
{
|
|
|
|
/*set the filter message object*/
|
2020-12-21 14:34:01 +08:00
|
|
|
if (CAN_SetRxMsgAndMsk(can_base, MSG(filter_cfg->items[i].hdr + RX_MSG_ID_INDEX), filter_cfg->items[i].ide, filter_cfg->items[i].id, filter_cfg->items[i].mask) == FALSE)
|
2020-06-17 16:30:11 +08:00
|
|
|
{
|
|
|
|
return -(RT_ERROR);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
break;
|
2020-12-25 18:39:12 +08:00
|
|
|
#endif
|
|
|
|
|
2020-06-17 16:30:11 +08:00
|
|
|
case RT_CAN_CMD_SET_MODE:
|
|
|
|
argval = (rt_uint32_t) arg;
|
|
|
|
if (argval != RT_CAN_MODE_NORMAL && argval != RT_CAN_MODE_LISEN &&
|
|
|
|
argval != RT_CAN_MODE_LOOPBACK && argval != RT_CAN_MODE_LOOPBACKANLISEN)
|
|
|
|
{
|
|
|
|
return -(RT_ERROR);
|
|
|
|
}
|
|
|
|
if (argval != can->config.mode)
|
|
|
|
{
|
|
|
|
can->config.mode = argval;
|
|
|
|
return nu_can_configure(can, &can->config);
|
|
|
|
}
|
|
|
|
break;
|
2020-12-25 18:39:12 +08:00
|
|
|
|
2020-06-17 16:30:11 +08:00
|
|
|
case RT_CAN_CMD_SET_BAUD:
|
|
|
|
argval = (rt_uint32_t) arg;
|
|
|
|
if (argval != CAN1MBaud && argval != CAN800kBaud && argval != CAN500kBaud && argval != CAN250kBaud &&
|
|
|
|
argval != CAN125kBaud && argval != CAN100kBaud && argval != CAN50kBaud && argval != CAN20kBaud && argval != CAN10kBaud)
|
|
|
|
{
|
|
|
|
return -(RT_ERROR);
|
|
|
|
}
|
|
|
|
if (argval != can->config.baud_rate)
|
|
|
|
{
|
|
|
|
can->config.baud_rate = argval;
|
|
|
|
return nu_can_configure(can, &can->config);
|
|
|
|
}
|
|
|
|
break;
|
2020-12-25 18:39:12 +08:00
|
|
|
|
2020-06-17 16:30:11 +08:00
|
|
|
case RT_CAN_CMD_SET_PRIV:
|
|
|
|
argval = (rt_uint32_t) arg;
|
|
|
|
if (argval != RT_CAN_MODE_PRIV && argval != RT_CAN_MODE_NOPRIV)
|
|
|
|
{
|
|
|
|
return -(RT_ERROR);
|
|
|
|
}
|
|
|
|
if (argval != can->config.privmode)
|
|
|
|
{
|
|
|
|
can->config.privmode = argval;
|
|
|
|
return nu_can_configure(can, &can->config);
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case RT_CAN_CMD_GET_STATUS:
|
|
|
|
{
|
|
|
|
rt_uint32_t errtype;
|
|
|
|
errtype = can_base->ERR;
|
|
|
|
/*Receive Error Counter*/
|
|
|
|
can->status.rcverrcnt = (errtype >> 8);
|
|
|
|
/*Transmit Error Counter*/
|
|
|
|
can->status.snderrcnt = ((errtype >> 24) & 0xFF);
|
|
|
|
can->status.lasterrtype = CAN_GET_INT_STATUS(can_base) & 0x8000;
|
|
|
|
/*status error code*/
|
|
|
|
can->status.errcode = CAN_GET_INT_STATUS(can_base) & 0x07;
|
|
|
|
rt_memcpy(arg, &can->status, sizeof(can->status));
|
|
|
|
}
|
|
|
|
break;
|
2020-08-03 12:15:33 +08:00
|
|
|
default:
|
2020-12-21 14:34:01 +08:00
|
|
|
return -(RT_EINVAL);
|
2020-08-03 12:15:33 +08:00
|
|
|
|
2020-06-17 16:30:11 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
return RT_EOK;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int nu_can_sendmsg(struct rt_can_device *can, const void *buf, rt_uint32_t boxno)
|
|
|
|
{
|
|
|
|
STR_CANMSG_T tMsg;
|
|
|
|
struct rt_can_msg *pmsg = (struct rt_can_msg *) buf;
|
2020-08-03 12:15:33 +08:00
|
|
|
/* Get base address of CAN register */
|
2020-06-17 16:30:11 +08:00
|
|
|
CAN_T *can_base = ((nu_can_t)can)->can_base;
|
|
|
|
|
|
|
|
RT_ASSERT(can_base != RT_NULL);
|
|
|
|
RT_ASSERT(buf != RT_NULL);
|
|
|
|
/* Check the parameters */
|
|
|
|
RT_ASSERT(IS_CAN_DLC(pmsg->len));
|
|
|
|
/* Standard ID (11 bits)*/
|
|
|
|
if (pmsg->ide == RT_CAN_STDID)
|
|
|
|
{
|
|
|
|
tMsg.IdType = CAN_STD_ID;
|
|
|
|
RT_ASSERT(IS_CAN_STDID(pmsg->id))
|
|
|
|
tMsg.Id = pmsg->id ;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
/* Extended ID (29 bits)*/
|
|
|
|
tMsg.IdType = CAN_EXT_ID;
|
|
|
|
RT_ASSERT(IS_CAN_EXTID(pmsg->id));
|
|
|
|
tMsg.Id = pmsg->id ;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (pmsg->rtr == RT_CAN_DTR)
|
|
|
|
{
|
|
|
|
/* Data frame */
|
|
|
|
tMsg.FrameType = CAN_DATA_FRAME;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
/* Remote frame */
|
|
|
|
tMsg.FrameType = CAN_REMOTE_FRAME;
|
|
|
|
}
|
|
|
|
tMsg.DLC = pmsg->len;
|
|
|
|
rt_memcpy(tMsg.Data, pmsg->data, pmsg->len);
|
|
|
|
|
|
|
|
if (CAN_Transmit(can_base, MSG(boxno), &tMsg) == FALSE) // Configure Msg RAM and send the Msg in the RAM
|
|
|
|
{
|
|
|
|
return -(RT_ERROR);
|
|
|
|
}
|
|
|
|
|
|
|
|
return RT_EOK;
|
|
|
|
}
|
|
|
|
static int nu_can_recvmsg(struct rt_can_device *can, void *buf, rt_uint32_t boxno)
|
|
|
|
{
|
|
|
|
STR_CANMSG_T tMsg;
|
|
|
|
struct rt_can_msg *pmsg = (struct rt_can_msg *) buf;
|
2020-08-03 12:15:33 +08:00
|
|
|
/* Get base address of CAN register */
|
2020-06-17 16:30:11 +08:00
|
|
|
CAN_T *can_base = ((nu_can_t)can)->can_base;
|
|
|
|
|
|
|
|
RT_ASSERT(can_base != RT_NULL);
|
|
|
|
RT_ASSERT(buf != RT_NULL);
|
|
|
|
|
|
|
|
/* get data */
|
2020-12-25 18:39:12 +08:00
|
|
|
if (CAN_Receive(can_base, boxno, &tMsg) == FALSE)
|
|
|
|
{
|
|
|
|
rt_kprintf("No available RX Msg.\n");
|
|
|
|
return -(RT_ERROR);
|
|
|
|
}
|
2020-06-17 16:30:11 +08:00
|
|
|
|
|
|
|
#ifdef RT_CAN_USING_HDR
|
|
|
|
/* Hardware filter messages are valid */
|
2020-12-21 14:34:01 +08:00
|
|
|
pmsg->hdr = boxno - RX_MSG_ID_INDEX;
|
|
|
|
can->hdr[pmsg->hdr].connected = 1;
|
2020-06-17 16:30:11 +08:00
|
|
|
#endif
|
|
|
|
|
|
|
|
/* Standard ID (11 bits)*/
|
|
|
|
if (tMsg.IdType == CAN_STD_ID)
|
|
|
|
{
|
|
|
|
pmsg->ide = RT_CAN_STDID;
|
|
|
|
pmsg->id = tMsg.Id;
|
|
|
|
}
|
|
|
|
else /* Extended ID (29 bits)*/
|
|
|
|
{
|
|
|
|
pmsg->ide = RT_CAN_EXTID;
|
|
|
|
pmsg->id = tMsg.Id;
|
|
|
|
}
|
2020-12-25 18:39:12 +08:00
|
|
|
|
2020-06-17 16:30:11 +08:00
|
|
|
if (tMsg.FrameType == CAN_DATA_FRAME)
|
|
|
|
{
|
|
|
|
/* Data frame */
|
|
|
|
pmsg->rtr = RT_CAN_DTR;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
/* Remote frame */
|
|
|
|
pmsg->rtr = RT_CAN_RTR;
|
|
|
|
}
|
2020-12-25 18:39:12 +08:00
|
|
|
|
2020-06-17 16:30:11 +08:00
|
|
|
pmsg->len = tMsg.DLC ;
|
|
|
|
|
2020-12-25 18:39:12 +08:00
|
|
|
rt_memcpy(pmsg->data, tMsg.Data, pmsg->len);
|
2020-06-17 16:30:11 +08:00
|
|
|
|
|
|
|
return RT_EOK;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* Hardware CAN Initialization
|
|
|
|
*/
|
|
|
|
static int rt_hw_can_init(void)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
rt_err_t ret = RT_EOK;
|
|
|
|
|
|
|
|
for (i = (CAN_START + 1); i < CAN_CNT; i++)
|
|
|
|
{
|
|
|
|
|
|
|
|
nu_can_arr[i].dev.ops = &nu_can_ops;
|
|
|
|
nu_can_arr[i].dev.config = nu_can_default_config;
|
|
|
|
|
|
|
|
#ifdef RT_CAN_USING_HDR
|
|
|
|
nu_can_arr[i].dev.config.maxhdr = RT_CANMSG_BOX_SZ;
|
|
|
|
#endif
|
|
|
|
ret = rt_hw_can_register(&nu_can_arr[i].dev, nu_can_arr[i].name, &nu_can_ops, NULL);
|
|
|
|
RT_ASSERT(ret == RT_EOK);
|
|
|
|
}
|
|
|
|
|
2020-08-03 12:15:33 +08:00
|
|
|
return (int)ret;
|
2020-06-17 16:30:11 +08:00
|
|
|
}
|
|
|
|
INIT_DEVICE_EXPORT(rt_hw_can_init);
|
|
|
|
#endif //#if defined(BSP_USING_CAN)
|