117 lines
3.1 KiB
C
117 lines
3.1 KiB
C
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/*
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* Copyright (c) 2021 Rockchip Electronics Co., Ltd.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2021-10-12 Steven Liu first implementation
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*/
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#include "rtdef.h"
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#include "iomux.h"
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#include "hal_base.h"
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/**
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* @brief Config iomux for M4 JTAG
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*/
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RT_WEAK void m4_jtag_iomux_config(void)
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{
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HAL_PINCTRL_SetIOMUX(GPIO_BANK0,
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GPIO_PIN_C7 | // M4_JTAG_TCK
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GPIO_PIN_D0, // M4_JTAG_TMS
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PIN_CONFIG_MUX_FUNC2);
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}
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/**
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* @brief Config iomux for UART0
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*/
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RT_WEAK void uart0_iomux_config(void)
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{
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HAL_PINCTRL_SetIOMUX(GPIO_BANK0,
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GPIO_PIN_C7 | // UART0_RX
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GPIO_PIN_D0, // UART0_TX
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PIN_CONFIG_MUX_FUNC1);
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}
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/**
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* @brief Config iomux for UART1
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*/
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RT_WEAK void uart1_m0_iomux_config(void)
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{
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HAL_PINCTRL_SetIOMUX(GPIO_BANK0,
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GPIO_PIN_D1 | // UART1_RX_M0
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GPIO_PIN_D2, // UART1_TX_M0
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PIN_CONFIG_MUX_FUNC2);
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WRITE_REG_MASK_WE(GRF->SOC_CON5,
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GRF_SOC_CON5_GRF_CON_UART1_IOMUX_SEL_MASK,
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(0 << GRF_SOC_CON5_GRF_CON_UART1_IOMUX_SEL_SHIFT));
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}
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RT_WEAK void uart1_m1_iomux_config(void)
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{
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HAL_PINCTRL_SetIOMUX(GPIO_BANK0,
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GPIO_PIN_A5 | // UART1_RX_M1
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GPIO_PIN_A4, // UART1_TX_M1
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PIN_CONFIG_MUX_FUNC2);
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WRITE_REG_MASK_WE(GRF->SOC_CON5,
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GRF_SOC_CON5_GRF_CON_UART1_IOMUX_SEL_MASK,
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(1 << GRF_SOC_CON5_GRF_CON_UART1_IOMUX_SEL_SHIFT));
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}
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RT_WEAK void uart1_m2_iomux_config(void)
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{
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HAL_PINCTRL_SetIOMUX(GPIO_BANK1,
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GPIO_PIN_B1 | // UART1_RX_M2
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GPIO_PIN_B0, // UART1_TX_M2
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PIN_CONFIG_MUX_FUNC3);
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WRITE_REG_MASK_WE(GRF->SOC_CON5,
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GRF_SOC_CON5_GRF_CON_UART1_IOMUX_SEL_MASK,
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(2 << GRF_SOC_CON5_GRF_CON_UART1_IOMUX_SEL_SHIFT));
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}
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RT_WEAK void uart1_m3_iomux_config(void)
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{
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HAL_PINCTRL_SetIOMUX(GPIO_BANK0,
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GPIO_PIN_A5, // UART1_RX_M3
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PIN_CONFIG_MUX_FUNC2);
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HAL_PINCTRL_SetIOMUX(GPIO_BANK0,
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GPIO_PIN_B1, // UART1_TX_M3
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PIN_CONFIG_MUX_FUNC4);
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WRITE_REG_MASK_WE(GRF->SOC_CON5,
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GRF_SOC_CON5_GRF_CON_UART1_IOMUX_SEL_MASK,
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(3 << GRF_SOC_CON5_GRF_CON_UART1_IOMUX_SEL_SHIFT));
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}
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/**
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* @brief Config iomux for UART2
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*/
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RT_WEAK void uart2_iomux_config(void)
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{
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HAL_PINCTRL_SetIOMUX(GPIO_BANK1,
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GPIO_PIN_A0 | // UART2_RX
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GPIO_PIN_A1 | // UART2_TX
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GPIO_PIN_A2 | // UART2_CTS
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GPIO_PIN_A3, // UART2_RTS
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PIN_CONFIG_MUX_FUNC4);
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}
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/**
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* @brief Config iomux for RK2108
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*/
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RT_WEAK void rt_hw_iomux_config(void)
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{
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uart2_iomux_config();
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#ifdef M4_JTAG_ENABLE
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m4_jtag_iomux_config();
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#else
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uart0_iomux_config();
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#endif
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}
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