647 lines
21 KiB
C
647 lines
21 KiB
C
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/*
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* Copyright (c) 2021-2022 hpmicro
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*
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*/
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#ifndef HPM_SOC_H
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#define HPM_SOC_H
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/* List of external IRQs */
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#define IRQn_GPIO0_A 1 /* GPIO0_A IRQ */
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#define IRQn_GPIO0_B 2 /* GPIO0_B IRQ */
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#define IRQn_GPIO0_C 3 /* GPIO0_C IRQ */
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#define IRQn_GPIO0_D 4 /* GPIO0_D IRQ */
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#define IRQn_GPIO0_X 5 /* GPIO0_X IRQ */
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#define IRQn_GPIO0_Y 6 /* GPIO0_Y IRQ */
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#define IRQn_GPIO0_Z 7 /* GPIO0_Z IRQ */
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#define IRQn_ADC0 8 /* ADC0 IRQ */
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#define IRQn_ADC1 9 /* ADC1 IRQ */
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#define IRQn_ADC2 10 /* ADC2 IRQ */
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#define IRQn_DAC 11 /* DAC IRQ */
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#define IRQn_ACMP_0 12 /* ACMP[0] IRQ */
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#define IRQn_ACMP_1 13 /* ACMP[1] IRQ */
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#define IRQn_SPI0 14 /* SPI0 IRQ */
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#define IRQn_SPI1 15 /* SPI1 IRQ */
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#define IRQn_SPI2 16 /* SPI2 IRQ */
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#define IRQn_SPI3 17 /* SPI3 IRQ */
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#define IRQn_UART0 18 /* UART0 IRQ */
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#define IRQn_UART1 19 /* UART1 IRQ */
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#define IRQn_UART2 20 /* UART2 IRQ */
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#define IRQn_UART3 21 /* UART3 IRQ */
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#define IRQn_UART4 22 /* UART4 IRQ */
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#define IRQn_UART5 23 /* UART5 IRQ */
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#define IRQn_UART6 24 /* UART6 IRQ */
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#define IRQn_UART7 25 /* UART7 IRQ */
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#define IRQn_CAN0 26 /* CAN0 IRQ */
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#define IRQn_CAN1 27 /* CAN1 IRQ */
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#define IRQn_PTPC 28 /* PTPC IRQ */
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#define IRQn_WDG0 29 /* WDG0 IRQ */
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#define IRQn_WDG1 30 /* WDG1 IRQ */
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#define IRQn_TSNS 31 /* TSNS IRQ */
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#define IRQn_MBX0A 32 /* MBX0A IRQ */
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#define IRQn_MBX0B 33 /* MBX0B IRQ */
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#define IRQn_GPTMR0 34 /* GPTMR0 IRQ */
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#define IRQn_GPTMR1 35 /* GPTMR1 IRQ */
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#define IRQn_GPTMR2 36 /* GPTMR2 IRQ */
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#define IRQn_GPTMR3 37 /* GPTMR3 IRQ */
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#define IRQn_I2C0 38 /* I2C0 IRQ */
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#define IRQn_I2C1 39 /* I2C1 IRQ */
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#define IRQn_I2C2 40 /* I2C2 IRQ */
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#define IRQn_I2C3 41 /* I2C3 IRQ */
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#define IRQn_PWM0 42 /* PWM0 IRQ */
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#define IRQn_HALL0 43 /* HALL0 IRQ */
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#define IRQn_QEI0 44 /* QEI0 IRQ */
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#define IRQn_PWM1 45 /* PWM1 IRQ */
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#define IRQn_HALL1 46 /* HALL1 IRQ */
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#define IRQn_QEI1 47 /* QEI1 IRQ */
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#define IRQn_SDP 48 /* SDP IRQ */
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#define IRQn_XPI0 49 /* XPI0 IRQ */
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#define IRQn_XPI1 50 /* XPI1 IRQ */
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#define IRQn_XDMA 51 /* XDMA IRQ */
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#define IRQn_HDMA 52 /* HDMA IRQ */
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#define IRQn_DRAM 53 /* DRAM IRQ */
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#define IRQn_RNG 54 /* RNG IRQ */
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#define IRQn_I2S0 55 /* I2S0 IRQ */
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#define IRQn_I2S1 56 /* I2S1 IRQ */
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#define IRQn_DAO 57 /* DAO IRQ */
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#define IRQn_PDM 58 /* PDM IRQ */
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#define IRQn_FFA 59 /* FFA IRQ */
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#define IRQn_NTMR0 60 /* NTMR0 IRQ */
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#define IRQn_USB0 61 /* USB0 IRQ */
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#define IRQn_ENET0 62 /* ENET0 IRQ */
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#define IRQn_SDXC0 63 /* SDXC0 IRQ */
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#define IRQn_PSEC 64 /* PSEC IRQ */
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#define IRQn_PGPIO 65 /* PGPIO IRQ */
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#define IRQn_PWDG 66 /* PWDG IRQ */
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#define IRQn_PTMR 67 /* PTMR IRQ */
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#define IRQn_PUART 68 /* PUART IRQ */
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#define IRQn_FUSE 69 /* FUSE IRQ */
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#define IRQn_SECMON 70 /* SECMON IRQ */
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#define IRQn_RTC 71 /* RTC IRQ */
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#define IRQn_BUTN 72 /* BUTN IRQ */
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#define IRQn_BGPIO 73 /* BGPIO IRQ */
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#define IRQn_BVIO 74 /* BVIO IRQ */
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#define IRQn_BROWNOUT 75 /* BROWNOUT IRQ */
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#define IRQn_SYSCTL 76 /* SYSCTL IRQ */
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#define IRQn_DEBUG_0 77 /* DEBUG[0] IRQ */
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#define IRQn_DEBUG_1 78 /* DEBUG[1] IRQ */
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#include "hpm_common.h"
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#include "hpm_gpio_regs.h"
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/* Address of GPIO instances */
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/* FGPIO base address */
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#define HPM_FGPIO_BASE (0xC0000UL)
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/* FGPIO base pointer */
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#define HPM_FGPIO ((GPIO_Type *) HPM_FGPIO_BASE)
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/* GPIO0 base address */
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#define HPM_GPIO0_BASE (0xF0000000UL)
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/* GPIO0 base pointer */
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#define HPM_GPIO0 ((GPIO_Type *) HPM_GPIO0_BASE)
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/* PGPIO base address */
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#define HPM_PGPIO_BASE (0xF40DC000UL)
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/* PGPIO base pointer */
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#define HPM_PGPIO ((GPIO_Type *) HPM_PGPIO_BASE)
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/* BGPIO base address */
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#define HPM_BGPIO_BASE (0xF5014000UL)
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/* BGPIO base pointer */
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#define HPM_BGPIO ((GPIO_Type *) HPM_BGPIO_BASE)
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/* Address of DM instances */
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/* DM base address */
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#define HPM_DM_BASE (0x30000000UL)
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#include "hpm_plic_regs.h"
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/* Address of PLIC instances */
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/* PLIC base address */
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#define HPM_PLIC_BASE (0xE4000000UL)
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/* PLIC base pointer */
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#define HPM_PLIC ((PLIC_Type *) HPM_PLIC_BASE)
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#include "hpm_mchtmr_regs.h"
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/* Address of MCHTMR instances */
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/* MCHTMR base address */
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#define HPM_MCHTMR_BASE (0xE6000000UL)
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/* MCHTMR base pointer */
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#define HPM_MCHTMR ((MCHTMR_Type *) HPM_MCHTMR_BASE)
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#include "hpm_plic_sw_regs.h"
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/* Address of PLICSW instances */
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/* PLICSW base address */
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#define HPM_PLICSW_BASE (0xE6400000UL)
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/* PLICSW base pointer */
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#define HPM_PLICSW ((PLIC_SW_Type *) HPM_PLICSW_BASE)
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#include "hpm_gpiom_regs.h"
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/* Address of GPIOM instances */
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/* GPIOM base address */
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#define HPM_GPIOM_BASE (0xF0008000UL)
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/* GPIOM base pointer */
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#define HPM_GPIOM ((GPIOM_Type *) HPM_GPIOM_BASE)
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#include "hpm_adc16_regs.h"
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/* Address of ADC16 instances */
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/* ADC0 base address */
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#define HPM_ADC0_BASE (0xF0010000UL)
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/* ADC0 base pointer */
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#define HPM_ADC0 ((ADC16_Type *) HPM_ADC0_BASE)
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/* ADC1 base address */
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#define HPM_ADC1_BASE (0xF0014000UL)
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/* ADC1 base pointer */
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#define HPM_ADC1 ((ADC16_Type *) HPM_ADC1_BASE)
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/* ADC2 base address */
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#define HPM_ADC2_BASE (0xF0018000UL)
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/* ADC2 base pointer */
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#define HPM_ADC2 ((ADC16_Type *) HPM_ADC2_BASE)
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#include "hpm_acmp_regs.h"
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/* Address of ACMP instances */
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/* ACMP base address */
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#define HPM_ACMP_BASE (0xF0020000UL)
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/* ACMP base pointer */
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#define HPM_ACMP ((ACMP_Type *) HPM_ACMP_BASE)
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#include "hpm_dac_regs.h"
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/* Address of DAC instances */
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/* DAC base address */
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#define HPM_DAC_BASE (0xF0024000UL)
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/* DAC base pointer */
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#define HPM_DAC ((DAC_Type *) HPM_DAC_BASE)
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#include "hpm_spi_regs.h"
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/* Address of SPI instances */
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/* SPI0 base address */
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#define HPM_SPI0_BASE (0xF0030000UL)
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/* SPI0 base pointer */
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#define HPM_SPI0 ((SPI_Type *) HPM_SPI0_BASE)
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/* SPI1 base address */
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#define HPM_SPI1_BASE (0xF0034000UL)
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/* SPI1 base pointer */
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#define HPM_SPI1 ((SPI_Type *) HPM_SPI1_BASE)
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/* SPI2 base address */
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#define HPM_SPI2_BASE (0xF0038000UL)
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/* SPI2 base pointer */
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#define HPM_SPI2 ((SPI_Type *) HPM_SPI2_BASE)
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/* SPI3 base address */
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#define HPM_SPI3_BASE (0xF003C000UL)
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/* SPI3 base pointer */
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#define HPM_SPI3 ((SPI_Type *) HPM_SPI3_BASE)
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#include "hpm_uart_regs.h"
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/* Address of UART instances */
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/* UART0 base address */
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#define HPM_UART0_BASE (0xF0040000UL)
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/* UART0 base pointer */
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#define HPM_UART0 ((UART_Type *) HPM_UART0_BASE)
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/* UART1 base address */
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#define HPM_UART1_BASE (0xF0044000UL)
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/* UART1 base pointer */
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#define HPM_UART1 ((UART_Type *) HPM_UART1_BASE)
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/* UART2 base address */
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#define HPM_UART2_BASE (0xF0048000UL)
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/* UART2 base pointer */
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#define HPM_UART2 ((UART_Type *) HPM_UART2_BASE)
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/* UART3 base address */
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#define HPM_UART3_BASE (0xF004C000UL)
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/* UART3 base pointer */
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#define HPM_UART3 ((UART_Type *) HPM_UART3_BASE)
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/* UART4 base address */
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#define HPM_UART4_BASE (0xF0050000UL)
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/* UART4 base pointer */
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#define HPM_UART4 ((UART_Type *) HPM_UART4_BASE)
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/* UART5 base address */
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#define HPM_UART5_BASE (0xF0054000UL)
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/* UART5 base pointer */
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#define HPM_UART5 ((UART_Type *) HPM_UART5_BASE)
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/* UART6 base address */
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#define HPM_UART6_BASE (0xF0058000UL)
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/* UART6 base pointer */
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#define HPM_UART6 ((UART_Type *) HPM_UART6_BASE)
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/* UART7 base address */
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#define HPM_UART7_BASE (0xF005C000UL)
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/* UART7 base pointer */
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#define HPM_UART7 ((UART_Type *) HPM_UART7_BASE)
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/* PUART base address */
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#define HPM_PUART_BASE (0xF40E4000UL)
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/* PUART base pointer */
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#define HPM_PUART ((UART_Type *) HPM_PUART_BASE)
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#include "hpm_can_regs.h"
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/* Address of CAN instances */
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/* CAN0 base address */
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#define HPM_CAN0_BASE (0xF0080000UL)
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/* CAN0 base pointer */
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#define HPM_CAN0 ((CAN_Type *) HPM_CAN0_BASE)
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/* CAN1 base address */
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#define HPM_CAN1_BASE (0xF0084000UL)
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/* CAN1 base pointer */
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#define HPM_CAN1 ((CAN_Type *) HPM_CAN1_BASE)
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#include "hpm_wdg_regs.h"
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/* Address of WDOG instances */
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/* WDG0 base address */
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#define HPM_WDG0_BASE (0xF0090000UL)
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/* WDG0 base pointer */
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#define HPM_WDG0 ((WDG_Type *) HPM_WDG0_BASE)
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/* WDG1 base address */
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#define HPM_WDG1_BASE (0xF0094000UL)
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/* WDG1 base pointer */
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#define HPM_WDG1 ((WDG_Type *) HPM_WDG1_BASE)
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/* PWDG base address */
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#define HPM_PWDG_BASE (0xF40E8000UL)
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/* PWDG base pointer */
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#define HPM_PWDG ((WDG_Type *) HPM_PWDG_BASE)
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#include "hpm_mbx_regs.h"
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/* Address of MBX instances */
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/* MBX0A base address */
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#define HPM_MBX0A_BASE (0xF00A0000UL)
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/* MBX0A base pointer */
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#define HPM_MBX0A ((MBX_Type *) HPM_MBX0A_BASE)
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/* MBX0B base address */
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#define HPM_MBX0B_BASE (0xF00A4000UL)
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/* MBX0B base pointer */
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#define HPM_MBX0B ((MBX_Type *) HPM_MBX0B_BASE)
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#include "hpm_ptpc_regs.h"
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/* Address of PTPC instances */
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/* PTPC base address */
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#define HPM_PTPC_BASE (0xF00B0000UL)
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/* PTPC base pointer */
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#define HPM_PTPC ((PTPC_Type *) HPM_PTPC_BASE)
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#include "hpm_dmamux_regs.h"
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/* Address of DMAMUX instances */
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/* DMAMUX base address */
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#define HPM_DMAMUX_BASE (0xF00C0000UL)
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/* DMAMUX base pointer */
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#define HPM_DMAMUX ((DMAMUX_Type *) HPM_DMAMUX_BASE)
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#include "hpm_dma_regs.h"
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/* Address of DMA instances */
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/* HDMA base address */
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#define HPM_HDMA_BASE (0xF00C4000UL)
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/* HDMA base pointer */
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#define HPM_HDMA ((DMA_Type *) HPM_HDMA_BASE)
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/* XDMA base address */
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#define HPM_XDMA_BASE (0xF3048000UL)
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/* XDMA base pointer */
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#define HPM_XDMA ((DMA_Type *) HPM_XDMA_BASE)
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#include "hpm_rng_regs.h"
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/* Address of RNG instances */
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/* RNG base address */
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#define HPM_RNG_BASE (0xF00C8000UL)
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/* RNG base pointer */
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#define HPM_RNG ((RNG_Type *) HPM_RNG_BASE)
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#include "hpm_keym_regs.h"
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/* Address of KEYM instances */
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/* KEYM base address */
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#define HPM_KEYM_BASE (0xF00CC000UL)
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/* KEYM base pointer */
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#define HPM_KEYM ((KEYM_Type *) HPM_KEYM_BASE)
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#include "hpm_i2s_regs.h"
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/* Address of I2S instances */
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/* I2S0 base address */
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#define HPM_I2S0_BASE (0xF0100000UL)
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/* I2S0 base pointer */
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#define HPM_I2S0 ((I2S_Type *) HPM_I2S0_BASE)
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|
|
/* I2S1 base address */
|
||
|
|
#define HPM_I2S1_BASE (0xF0104000UL)
|
||
|
|
/* I2S1 base pointer */
|
||
|
|
#define HPM_I2S1 ((I2S_Type *) HPM_I2S1_BASE)
|
||
|
|
|
||
|
|
#include "hpm_dao_regs.h"
|
||
|
|
/* Address of DAO instances */
|
||
|
|
/* DAO base address */
|
||
|
|
#define HPM_DAO_BASE (0xF0110000UL)
|
||
|
|
/* DAO base pointer */
|
||
|
|
#define HPM_DAO ((DAO_Type *) HPM_DAO_BASE)
|
||
|
|
|
||
|
|
#include "hpm_pdm_regs.h"
|
||
|
|
/* Address of PDM instances */
|
||
|
|
/* PDM base address */
|
||
|
|
#define HPM_PDM_BASE (0xF0114000UL)
|
||
|
|
/* PDM base pointer */
|
||
|
|
#define HPM_PDM ((PDM_Type *) HPM_PDM_BASE)
|
||
|
|
|
||
|
|
#include "hpm_pwm_regs.h"
|
||
|
|
/* Address of PWM instances */
|
||
|
|
/* PWM0 base address */
|
||
|
|
#define HPM_PWM0_BASE (0xF0200000UL)
|
||
|
|
/* PWM0 base pointer */
|
||
|
|
#define HPM_PWM0 ((PWM_Type *) HPM_PWM0_BASE)
|
||
|
|
/* PWM1 base address */
|
||
|
|
#define HPM_PWM1_BASE (0xF0210000UL)
|
||
|
|
/* PWM1 base pointer */
|
||
|
|
#define HPM_PWM1 ((PWM_Type *) HPM_PWM1_BASE)
|
||
|
|
|
||
|
|
#include "hpm_hall_regs.h"
|
||
|
|
/* Address of HALL instances */
|
||
|
|
/* HALL0 base address */
|
||
|
|
#define HPM_HALL0_BASE (0xF0204000UL)
|
||
|
|
/* HALL0 base pointer */
|
||
|
|
#define HPM_HALL0 ((HALL_Type *) HPM_HALL0_BASE)
|
||
|
|
/* HALL1 base address */
|
||
|
|
#define HPM_HALL1_BASE (0xF0214000UL)
|
||
|
|
/* HALL1 base pointer */
|
||
|
|
#define HPM_HALL1 ((HALL_Type *) HPM_HALL1_BASE)
|
||
|
|
|
||
|
|
#include "hpm_qei_regs.h"
|
||
|
|
/* Address of QEI instances */
|
||
|
|
/* QEI0 base address */
|
||
|
|
#define HPM_QEI0_BASE (0xF0208000UL)
|
||
|
|
/* QEI0 base pointer */
|
||
|
|
#define HPM_QEI0 ((QEI_Type *) HPM_QEI0_BASE)
|
||
|
|
/* QEI1 base address */
|
||
|
|
#define HPM_QEI1_BASE (0xF0218000UL)
|
||
|
|
/* QEI1 base pointer */
|
||
|
|
#define HPM_QEI1 ((QEI_Type *) HPM_QEI1_BASE)
|
||
|
|
|
||
|
|
#include "hpm_trgm_regs.h"
|
||
|
|
/* Address of TRGM instances */
|
||
|
|
/* TRGM0 base address */
|
||
|
|
#define HPM_TRGM0_BASE (0xF020C000UL)
|
||
|
|
/* TRGM0 base pointer */
|
||
|
|
#define HPM_TRGM0 ((TRGM_Type *) HPM_TRGM0_BASE)
|
||
|
|
/* TRGM1 base address */
|
||
|
|
#define HPM_TRGM1_BASE (0xF021C000UL)
|
||
|
|
/* TRGM1 base pointer */
|
||
|
|
#define HPM_TRGM1 ((TRGM_Type *) HPM_TRGM1_BASE)
|
||
|
|
|
||
|
|
#include "hpm_synt_regs.h"
|
||
|
|
/* Address of SYNT instances */
|
||
|
|
/* SYNT base address */
|
||
|
|
#define HPM_SYNT_BASE (0xF0240000UL)
|
||
|
|
/* SYNT base pointer */
|
||
|
|
#define HPM_SYNT ((SYNT_Type *) HPM_SYNT_BASE)
|
||
|
|
|
||
|
|
#include "hpm_enet_regs.h"
|
||
|
|
/* Address of ENET instances */
|
||
|
|
/* ENET0 base address */
|
||
|
|
#define HPM_ENET0_BASE (0xF2000000UL)
|
||
|
|
/* ENET0 base pointer */
|
||
|
|
#define HPM_ENET0 ((ENET_Type *) HPM_ENET0_BASE)
|
||
|
|
|
||
|
|
#include "hpm_gptmr_regs.h"
|
||
|
|
/* Address of TMR instances */
|
||
|
|
/* NTMR0 base address */
|
||
|
|
#define HPM_NTMR0_BASE (0xF2010000UL)
|
||
|
|
/* NTMR0 base pointer */
|
||
|
|
#define HPM_NTMR0 ((GPTMR_Type *) HPM_NTMR0_BASE)
|
||
|
|
/* GPTMR0 base address */
|
||
|
|
#define HPM_GPTMR0_BASE (0xF3000000UL)
|
||
|
|
/* GPTMR0 base pointer */
|
||
|
|
#define HPM_GPTMR0 ((GPTMR_Type *) HPM_GPTMR0_BASE)
|
||
|
|
/* GPTMR1 base address */
|
||
|
|
#define HPM_GPTMR1_BASE (0xF3004000UL)
|
||
|
|
/* GPTMR1 base pointer */
|
||
|
|
#define HPM_GPTMR1 ((GPTMR_Type *) HPM_GPTMR1_BASE)
|
||
|
|
/* GPTMR2 base address */
|
||
|
|
#define HPM_GPTMR2_BASE (0xF3008000UL)
|
||
|
|
/* GPTMR2 base pointer */
|
||
|
|
#define HPM_GPTMR2 ((GPTMR_Type *) HPM_GPTMR2_BASE)
|
||
|
|
/* GPTMR3 base address */
|
||
|
|
#define HPM_GPTMR3_BASE (0xF300C000UL)
|
||
|
|
/* GPTMR3 base pointer */
|
||
|
|
#define HPM_GPTMR3 ((GPTMR_Type *) HPM_GPTMR3_BASE)
|
||
|
|
/* PTMR base address */
|
||
|
|
#define HPM_PTMR_BASE (0xF40E0000UL)
|
||
|
|
/* PTMR base pointer */
|
||
|
|
#define HPM_PTMR ((GPTMR_Type *) HPM_PTMR_BASE)
|
||
|
|
|
||
|
|
#include "hpm_usb_regs.h"
|
||
|
|
/* Address of USB instances */
|
||
|
|
/* USB0 base address */
|
||
|
|
#define HPM_USB0_BASE (0xF2020000UL)
|
||
|
|
/* USB0 base pointer */
|
||
|
|
#define HPM_USB0 ((USB_Type *) HPM_USB0_BASE)
|
||
|
|
|
||
|
|
#include "hpm_sdxc_regs.h"
|
||
|
|
/* Address of SDXC instances */
|
||
|
|
/* SDXC0 base address */
|
||
|
|
#define HPM_SDXC0_BASE (0xF2030000UL)
|
||
|
|
/* SDXC0 base pointer */
|
||
|
|
#define HPM_SDXC0 ((SDXC_Type *) HPM_SDXC0_BASE)
|
||
|
|
|
||
|
|
#include "hpm_i2c_regs.h"
|
||
|
|
/* Address of I2C instances */
|
||
|
|
/* I2C0 base address */
|
||
|
|
#define HPM_I2C0_BASE (0xF3020000UL)
|
||
|
|
/* I2C0 base pointer */
|
||
|
|
#define HPM_I2C0 ((I2C_Type *) HPM_I2C0_BASE)
|
||
|
|
/* I2C1 base address */
|
||
|
|
#define HPM_I2C1_BASE (0xF3024000UL)
|
||
|
|
/* I2C1 base pointer */
|
||
|
|
#define HPM_I2C1 ((I2C_Type *) HPM_I2C1_BASE)
|
||
|
|
/* I2C2 base address */
|
||
|
|
#define HPM_I2C2_BASE (0xF3028000UL)
|
||
|
|
/* I2C2 base pointer */
|
||
|
|
#define HPM_I2C2 ((I2C_Type *) HPM_I2C2_BASE)
|
||
|
|
/* I2C3 base address */
|
||
|
|
#define HPM_I2C3_BASE (0xF302C000UL)
|
||
|
|
/* I2C3 base pointer */
|
||
|
|
#define HPM_I2C3 ((I2C_Type *) HPM_I2C3_BASE)
|
||
|
|
|
||
|
|
#include "hpm_sdp_regs.h"
|
||
|
|
/* Address of SDP instances */
|
||
|
|
/* SDP base address */
|
||
|
|
#define HPM_SDP_BASE (0xF304C000UL)
|
||
|
|
/* SDP base pointer */
|
||
|
|
#define HPM_SDP ((SDP_Type *) HPM_SDP_BASE)
|
||
|
|
|
||
|
|
#include "hpm_dram_regs.h"
|
||
|
|
/* Address of DRAM instances */
|
||
|
|
/* DRAM base address */
|
||
|
|
#define HPM_DRAM_BASE (0xF3050000UL)
|
||
|
|
/* DRAM base pointer */
|
||
|
|
#define HPM_DRAM ((DRAM_Type *) HPM_DRAM_BASE)
|
||
|
|
|
||
|
|
/* Address of ROMC instances */
|
||
|
|
/* ROMC base address */
|
||
|
|
#define HPM_ROMC_BASE (0xF3054000UL)
|
||
|
|
|
||
|
|
#include "hpm_ffa_regs.h"
|
||
|
|
/* Address of FFA instances */
|
||
|
|
/* FFA base address */
|
||
|
|
#define HPM_FFA_BASE (0xF3058000UL)
|
||
|
|
/* FFA base pointer */
|
||
|
|
#define HPM_FFA ((FFA_Type *) HPM_FFA_BASE)
|
||
|
|
|
||
|
|
#include "hpm_sysctl_regs.h"
|
||
|
|
/* Address of SYSCTL instances */
|
||
|
|
/* SYSCTL base address */
|
||
|
|
#define HPM_SYSCTL_BASE (0xF4000000UL)
|
||
|
|
/* SYSCTL base pointer */
|
||
|
|
#define HPM_SYSCTL ((SYSCTL_Type *) HPM_SYSCTL_BASE)
|
||
|
|
|
||
|
|
#include "hpm_ioc_regs.h"
|
||
|
|
/* Address of IOC instances */
|
||
|
|
/* IOC base address */
|
||
|
|
#define HPM_IOC_BASE (0xF4040000UL)
|
||
|
|
/* IOC base pointer */
|
||
|
|
#define HPM_IOC ((IOC_Type *) HPM_IOC_BASE)
|
||
|
|
/* PIOC base address */
|
||
|
|
#define HPM_PIOC_BASE (0xF40D8000UL)
|
||
|
|
/* PIOC base pointer */
|
||
|
|
#define HPM_PIOC ((IOC_Type *) HPM_PIOC_BASE)
|
||
|
|
/* BIOC base address */
|
||
|
|
#define HPM_BIOC_BASE (0xF5010000UL)
|
||
|
|
/* BIOC base pointer */
|
||
|
|
#define HPM_BIOC ((IOC_Type *) HPM_BIOC_BASE)
|
||
|
|
|
||
|
|
#include "hpm_otp_regs.h"
|
||
|
|
/* Address of OTP instances */
|
||
|
|
/* OTPSHW base address */
|
||
|
|
#define HPM_OTPSHW_BASE (0xF4080000UL)
|
||
|
|
/* OTPSHW base pointer */
|
||
|
|
#define HPM_OTPSHW ((OTP_Type *) HPM_OTPSHW_BASE)
|
||
|
|
/* OTP base address */
|
||
|
|
#define HPM_OTP_BASE (0xF40C8000UL)
|
||
|
|
/* OTP base pointer */
|
||
|
|
#define HPM_OTP ((OTP_Type *) HPM_OTP_BASE)
|
||
|
|
|
||
|
|
#include "hpm_ppor_regs.h"
|
||
|
|
/* Address of PPOR instances */
|
||
|
|
/* PPOR base address */
|
||
|
|
#define HPM_PPOR_BASE (0xF40C0000UL)
|
||
|
|
/* PPOR base pointer */
|
||
|
|
#define HPM_PPOR ((PPOR_Type *) HPM_PPOR_BASE)
|
||
|
|
|
||
|
|
#include "hpm_pcfg_regs.h"
|
||
|
|
/* Address of PCFG instances */
|
||
|
|
/* PCFG base address */
|
||
|
|
#define HPM_PCFG_BASE (0xF40C4000UL)
|
||
|
|
/* PCFG base pointer */
|
||
|
|
#define HPM_PCFG ((PCFG_Type *) HPM_PCFG_BASE)
|
||
|
|
|
||
|
|
#include "hpm_psec_regs.h"
|
||
|
|
/* Address of PSEC instances */
|
||
|
|
/* PSEC base address */
|
||
|
|
#define HPM_PSEC_BASE (0xF40CC000UL)
|
||
|
|
/* PSEC base pointer */
|
||
|
|
#define HPM_PSEC ((PSEC_Type *) HPM_PSEC_BASE)
|
||
|
|
|
||
|
|
#include "hpm_pmon_regs.h"
|
||
|
|
/* Address of PMON instances */
|
||
|
|
/* PMON base address */
|
||
|
|
#define HPM_PMON_BASE (0xF40D0000UL)
|
||
|
|
/* PMON base pointer */
|
||
|
|
#define HPM_PMON ((PMON_Type *) HPM_PMON_BASE)
|
||
|
|
|
||
|
|
#include "hpm_pgpr_regs.h"
|
||
|
|
/* Address of PGPR instances */
|
||
|
|
/* PGPR base address */
|
||
|
|
#define HPM_PGPR_BASE (0xF40D4000UL)
|
||
|
|
/* PGPR base pointer */
|
||
|
|
#define HPM_PGPR ((PGPR_Type *) HPM_PGPR_BASE)
|
||
|
|
|
||
|
|
#include "hpm_pllctlv2_regs.h"
|
||
|
|
/* Address of PLLCTLV2 instances */
|
||
|
|
/* PLLCTLV2 base address */
|
||
|
|
#define HPM_PLLCTLV2_BASE (0xF4100000UL)
|
||
|
|
/* PLLCTLV2 base pointer */
|
||
|
|
#define HPM_PLLCTLV2 ((PLLCTLV2_Type *) HPM_PLLCTLV2_BASE)
|
||
|
|
|
||
|
|
#include "hpm_tsns_regs.h"
|
||
|
|
/* Address of TSNS instances */
|
||
|
|
/* TSNS base address */
|
||
|
|
#define HPM_TSNS_BASE (0xF4104000UL)
|
||
|
|
/* TSNS base pointer */
|
||
|
|
#define HPM_TSNS ((TSNS_Type *) HPM_TSNS_BASE)
|
||
|
|
|
||
|
|
/* Address of BACC instances */
|
||
|
|
/* BACC base address */
|
||
|
|
#define HPM_BACC_BASE (0xF5000000UL)
|
||
|
|
|
||
|
|
#include "hpm_bpor_regs.h"
|
||
|
|
/* Address of BPOR instances */
|
||
|
|
/* BPOR base address */
|
||
|
|
#define HPM_BPOR_BASE (0xF5004000UL)
|
||
|
|
/* BPOR base pointer */
|
||
|
|
#define HPM_BPOR ((BPOR_Type *) HPM_BPOR_BASE)
|
||
|
|
|
||
|
|
#include "hpm_bcfg_regs.h"
|
||
|
|
/* Address of BCFG instances */
|
||
|
|
/* BCFG base address */
|
||
|
|
#define HPM_BCFG_BASE (0xF5008000UL)
|
||
|
|
/* BCFG base pointer */
|
||
|
|
#define HPM_BCFG ((BCFG_Type *) HPM_BCFG_BASE)
|
||
|
|
|
||
|
|
#include "hpm_butn_regs.h"
|
||
|
|
/* Address of BUTN instances */
|
||
|
|
/* BUTN base address */
|
||
|
|
#define HPM_BUTN_BASE (0xF500C000UL)
|
||
|
|
/* BUTN base pointer */
|
||
|
|
#define HPM_BUTN ((BUTN_Type *) HPM_BUTN_BASE)
|
||
|
|
|
||
|
|
#include "hpm_bgpr_regs.h"
|
||
|
|
/* Address of BGPR instances */
|
||
|
|
/* BGPR base address */
|
||
|
|
#define HPM_BGPR_BASE (0xF5018000UL)
|
||
|
|
/* BGPR base pointer */
|
||
|
|
#define HPM_BGPR ((BGPR_Type *) HPM_BGPR_BASE)
|
||
|
|
|
||
|
|
#include "hpm_bsec_regs.h"
|
||
|
|
/* Address of BSEC instances */
|
||
|
|
/* BSEC base address */
|
||
|
|
#define HPM_BSEC_BASE (0xF5040000UL)
|
||
|
|
/* BSEC base pointer */
|
||
|
|
#define HPM_BSEC ((BSEC_Type *) HPM_BSEC_BASE)
|
||
|
|
|
||
|
|
#include "hpm_rtc_regs.h"
|
||
|
|
/* Address of RTC instances */
|
||
|
|
/* RTC base address */
|
||
|
|
#define HPM_RTC_BASE (0xF5044000UL)
|
||
|
|
/* RTC base pointer */
|
||
|
|
#define HPM_RTC ((RTC_Type *) HPM_RTC_BASE)
|
||
|
|
|
||
|
|
#include "hpm_bkey_regs.h"
|
||
|
|
/* Address of BKEY instances */
|
||
|
|
/* BKEY base address */
|
||
|
|
#define HPM_BKEY_BASE (0xF5048000UL)
|
||
|
|
/* BKEY base pointer */
|
||
|
|
#define HPM_BKEY ((BKEY_Type *) HPM_BKEY_BASE)
|
||
|
|
|
||
|
|
#include "hpm_bmon_regs.h"
|
||
|
|
/* Address of BMON instances */
|
||
|
|
/* BMON base address */
|
||
|
|
#define HPM_BMON_BASE (0xF504C000UL)
|
||
|
|
/* BMON base pointer */
|
||
|
|
#define HPM_BMON ((BMON_Type *) HPM_BMON_BASE)
|
||
|
|
|
||
|
|
#include "hpm_tamp_regs.h"
|
||
|
|
/* Address of TAMP instances */
|
||
|
|
/* TAMP base address */
|
||
|
|
#define HPM_TAMP_BASE (0xF5050000UL)
|
||
|
|
/* TAMP base pointer */
|
||
|
|
#define HPM_TAMP ((TAMP_Type *) HPM_TAMP_BASE)
|
||
|
|
|
||
|
|
#include "hpm_mono_regs.h"
|
||
|
|
/* Address of MONO instances */
|
||
|
|
/* MONO base address */
|
||
|
|
#define HPM_MONO_BASE (0xF5054000UL)
|
||
|
|
/* MONO base pointer */
|
||
|
|
#define HPM_MONO ((MONO_Type *) HPM_MONO_BASE)
|
||
|
|
|
||
|
|
|
||
|
|
#include "riscv/riscv_core.h"
|
||
|
|
#include "hpm_csr_regs.h"
|
||
|
|
#include "hpm_interrupt.h"
|
||
|
|
#include "hpm_misc.h"
|
||
|
|
#include "hpm_dmamux_src.h"
|
||
|
|
#include "hpm_trgmmux_src.h"
|
||
|
|
#include "hpm_iomux.h"
|
||
|
|
#include "hpm_pmic_iomux.h"
|
||
|
|
#include "hpm_batt_iomux.h"
|
||
|
|
#include "hpm_ioc_regs.h"
|
||
|
|
#include "hpm_gpiom_regs.h"
|
||
|
|
#include "hpm_sysctl_regs.h"
|
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#include "hpm_trgm_regs.h"
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#endif /* HPM_SOC_H */
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