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rt-thread/bsp/ls1bdev/rtconfig.h

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[bsp] Adapt ls{1b,1c}dev to new mips common code LS1C selfboot feature have been rewiritten, and we changed bare boot base to 0x80000000 to better utilize memory. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
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#ifndef RT_CONFIG_H__
#define RT_CONFIG_H__
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/* Generated by Kconfiglib (https://github.com/ulfalizer/Kconfiglib) */
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/* RT-Thread Kernel */
#define RT_NAME_MAX 8
#define RT_ALIGN_SIZE 4
#define RT_THREAD_PRIORITY_32
#define RT_THREAD_PRIORITY_MAX 32
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#define RT_TICK_PER_SECOND 1000
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#define RT_USING_OVERFLOW_CHECK
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#define RT_USING_HOOK
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#define RT_USING_IDLE_HOOK
#define RT_IDLE_HOOK_LIST_SIZE 4
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#define IDLE_THREAD_STACK_SIZE 256
#define RT_USING_TIMER_SOFT
#define RT_TIMER_THREAD_PRIO 4
#define RT_TIMER_THREAD_STACK_SIZE 512
/* kservice optimization */
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/* end of kservice optimization */
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#define RT_DEBUG
/* Inter-Thread communication */
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#define RT_USING_SEMAPHORE
#define RT_USING_MUTEX
#define RT_USING_EVENT
#define RT_USING_MAILBOX
#define RT_USING_MESSAGEQUEUE
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/* end of Inter-Thread communication */
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/* Memory Management */
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#define RT_USING_MEMPOOL
#define RT_USING_SMALL_MEM
[bsp] Adapt ls{1b,1c}dev to new mips common code LS1C selfboot feature have been rewiritten, and we changed bare boot base to 0x80000000 to better utilize memory. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
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#define RT_USING_HEAP
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/* end of Memory Management */
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[bsp] Adapt ls{1b,1c}dev to new mips common code LS1C selfboot feature have been rewiritten, and we changed bare boot base to 0x80000000 to better utilize memory. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
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/* Kernel Device Object */
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#define RT_USING_DEVICE
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#define RT_USING_CONSOLE
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#define RT_CONSOLEBUF_SIZE 128
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#define RT_CONSOLE_DEVICE_NAME "uart5"
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/* end of Kernel Device Object */
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#define RT_VER_NUM 0x40004
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/* end of RT-Thread Kernel */
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/* RT-Thread Components */
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#define RT_USING_COMPONENTS_INIT
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#define RT_USING_USER_MAIN
#define RT_MAIN_THREAD_STACK_SIZE 2048
#define RT_MAIN_THREAD_PRIORITY 10
/* C++ features */
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/* end of C++ features */
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/* Command shell */
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#define RT_USING_FINSH
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#define RT_USING_MSH
#define FINSH_USING_MSH
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#define FINSH_THREAD_NAME "tshell"
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#define FINSH_THREAD_PRIORITY 20
#define FINSH_THREAD_STACK_SIZE 4096
[bsp] Adapt ls{1b,1c}dev to new mips common code LS1C selfboot feature have been rewiritten, and we changed bare boot base to 0x80000000 to better utilize memory. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
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#define FINSH_USING_HISTORY
#define FINSH_HISTORY_LINES 5
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#define FINSH_USING_SYMTAB
[bsp] Adapt ls{1b,1c}dev to new mips common code LS1C selfboot feature have been rewiritten, and we changed bare boot base to 0x80000000 to better utilize memory. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
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#define FINSH_CMD_SIZE 80
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#define MSH_USING_BUILT_IN_COMMANDS
#define FINSH_USING_DESCRIPTION
[bsp] Adapt ls{1b,1c}dev to new mips common code LS1C selfboot feature have been rewiritten, and we changed bare boot base to 0x80000000 to better utilize memory. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
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#define FINSH_ARG_MAX 10
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/* end of Command shell */
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/* Device virtual file system */
#define RT_USING_DFS
#define DFS_USING_WORKDIR
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#define DFS_FILESYSTEMS_MAX 4
#define DFS_FILESYSTEM_TYPES_MAX 4
[bsp] Adapt ls{1b,1c}dev to new mips common code LS1C selfboot feature have been rewiritten, and we changed bare boot base to 0x80000000 to better utilize memory. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
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#define DFS_FD_MAX 16
#define RT_USING_DFS_DEVFS
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/* end of Device virtual file system */
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/* Device Drivers */
#define RT_USING_DEVICE_IPC
#define RT_PIPE_BUFSZ 512
#define RT_USING_SERIAL
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#define RT_USING_SERIAL_V1
[bsp] Adapt ls{1b,1c}dev to new mips common code LS1C selfboot feature have been rewiritten, and we changed bare boot base to 0x80000000 to better utilize memory. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
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#define RT_SERIAL_USING_DMA
#define RT_SERIAL_RB_BUFSZ 64
#define RT_USING_PIN
/* Using USB */
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/* end of Using USB */
/* end of Device Drivers */
[bsp] Adapt ls{1b,1c}dev to new mips common code LS1C selfboot feature have been rewiritten, and we changed bare boot base to 0x80000000 to better utilize memory. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
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/* POSIX layer and C standard library */
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#define RT_USING_LIBC
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#define RT_USING_POSIX
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#define RT_LIBC_USING_TIME
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#define RT_LIBC_DEFAULT_TIMEZONE 8
[update] bsp .config file and rtconfig.h file.
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/* end of POSIX layer and C standard library */
[bsp] Adapt ls{1b,1c}dev to new mips common code LS1C selfboot feature have been rewiritten, and we changed bare boot base to 0x80000000 to better utilize memory. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
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/* Network */
/* Socket abstraction layer */
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/* end of Socket abstraction layer */
[bsp] Adapt ls{1b,1c}dev to new mips common code LS1C selfboot feature have been rewiritten, and we changed bare boot base to 0x80000000 to better utilize memory. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
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/* Network interface device */
[update] bsp .config file and rtconfig.h file.
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/* end of Network interface device */
[bsp] Adapt ls{1b,1c}dev to new mips common code LS1C selfboot feature have been rewiritten, and we changed bare boot base to 0x80000000 to better utilize memory. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
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/* light weight TCP/IP stack */
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/* end of light weight TCP/IP stack */
[bsp] Adapt ls{1b,1c}dev to new mips common code LS1C selfboot feature have been rewiritten, and we changed bare boot base to 0x80000000 to better utilize memory. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
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/* AT commands */
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/* end of AT commands */
/* end of Network */
[bsp] Adapt ls{1b,1c}dev to new mips common code LS1C selfboot feature have been rewiritten, and we changed bare boot base to 0x80000000 to better utilize memory. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
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/* VBUS(Virtual Software BUS) */
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/* end of VBUS(Virtual Software BUS) */
[bsp] Adapt ls{1b,1c}dev to new mips common code LS1C selfboot feature have been rewiritten, and we changed bare boot base to 0x80000000 to better utilize memory. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
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/* Utilities */
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/* end of Utilities */
/* end of RT-Thread Components */
[bsp] Adapt ls{1b,1c}dev to new mips common code LS1C selfboot feature have been rewiritten, and we changed bare boot base to 0x80000000 to better utilize memory. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
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/* RT-Thread Utestcases */
[update] bsp .config file and rtconfig.h file.
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/* end of RT-Thread Utestcases */
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[bsp] Adapt ls{1b,1c}dev to new mips common code LS1C selfboot feature have been rewiritten, and we changed bare boot base to 0x80000000 to better utilize memory. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
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/* RT-Thread online packages */
/* IoT - internet of things */
/* Wi-Fi */
/* Marvell WiFi */
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/* end of Marvell WiFi */
[bsp] Adapt ls{1b,1c}dev to new mips common code LS1C selfboot feature have been rewiritten, and we changed bare boot base to 0x80000000 to better utilize memory. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
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/* Wiced WiFi */
[update] bsp .config file and rtconfig.h file.
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/* end of Wiced WiFi */
/* end of Wi-Fi */
[bsp] Adapt ls{1b,1c}dev to new mips common code LS1C selfboot feature have been rewiritten, and we changed bare boot base to 0x80000000 to better utilize memory. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
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/* IoT Cloud */
[update] bsp .config file and rtconfig.h file.
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/* end of IoT Cloud */
/* end of IoT - internet of things */
[bsp] Adapt ls{1b,1c}dev to new mips common code LS1C selfboot feature have been rewiritten, and we changed bare boot base to 0x80000000 to better utilize memory. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
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/* security packages */
[update] bsp .config file and rtconfig.h file.
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/* end of security packages */
[bsp] Adapt ls{1b,1c}dev to new mips common code LS1C selfboot feature have been rewiritten, and we changed bare boot base to 0x80000000 to better utilize memory. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
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/* language packages */
[update] bsp .config file and rtconfig.h file.
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/* end of language packages */
[bsp] Adapt ls{1b,1c}dev to new mips common code LS1C selfboot feature have been rewiritten, and we changed bare boot base to 0x80000000 to better utilize memory. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
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/* multimedia packages */
[update] bsp .config file and rtconfig.h file.
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/* lvgl: powerful and easy-to-use embedded GUI library */
/* end of lvgl: powerful and easy-to-use embedded GUI library */
/* u8g2: a monochrome graphic library */
/* end of u8g2: a monochrome graphic library */
/* end of multimedia packages */
[bsp] Adapt ls{1b,1c}dev to new mips common code LS1C selfboot feature have been rewiritten, and we changed bare boot base to 0x80000000 to better utilize memory. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
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/* tools packages */
[update] bsp .config file and rtconfig.h file.
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/* end of tools packages */
[bsp] Adapt ls{1b,1c}dev to new mips common code LS1C selfboot feature have been rewiritten, and we changed bare boot base to 0x80000000 to better utilize memory. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
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/* system packages */
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/* acceleration: Assembly language or algorithmic acceleration packages */
[update] bsp .config file and rtconfig.h file.
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/* end of acceleration: Assembly language or algorithmic acceleration packages */
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/* Micrium: Micrium software products porting for RT-Thread */
[update] bsp .config file and rtconfig.h file.
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/* end of Micrium: Micrium software products porting for RT-Thread */
/* end of system packages */
[bsp] Adapt ls{1b,1c}dev to new mips common code LS1C selfboot feature have been rewiritten, and we changed bare boot base to 0x80000000 to better utilize memory. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
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/* peripheral libraries and drivers */
[update] bsp .config file and rtconfig.h file.
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/* end of peripheral libraries and drivers */
[bsp] Adapt ls{1b,1c}dev to new mips common code LS1C selfboot feature have been rewiritten, and we changed bare boot base to 0x80000000 to better utilize memory. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
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/* AI packages */
[update] bsp .config file and rtconfig.h file.
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/* end of AI packages */
[bsp] Adapt ls{1b,1c}dev to new mips common code LS1C selfboot feature have been rewiritten, and we changed bare boot base to 0x80000000 to better utilize memory. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
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/* miscellaneous packages */
[bsp] Adapt ls{1b,1c}dev to new mips common code LS1C selfboot feature have been rewiritten, and we changed bare boot base to 0x80000000 to better utilize memory. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
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/* samples: kernel and components samples */
[update] bsp .config file and rtconfig.h file.
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/* end of samples: kernel and components samples */
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/* entertainment: terminal games and other interesting software packages */
[update] bsp .config file and rtconfig.h file.
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/* end of entertainment: terminal games and other interesting software packages */
/* end of miscellaneous packages */
/* end of RT-Thread online packages */
[bsp] Adapt ls{1b,1c}dev to new mips common code LS1C selfboot feature have been rewiritten, and we changed bare boot base to 0x80000000 to better utilize memory. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
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#define SOC_LS1B
bsp:ls1b:rework uart driver and fix some bugs to make it work. tested on ls1b dev board which make by Loongson(GuangZhou)
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#define RT_MEM_SIZE 256
#define RT_OSC_CLK 25000000
#define RT_USING_UART5
[bsp] Adapt ls{1b,1c}dev to new mips common code LS1C selfboot feature have been rewiritten, and we changed bare boot base to 0x80000000 to better utilize memory. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
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#define RT_UART_RX_BUFFER_SIZE 64
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#endif