2021-10-27 11:28:55 +08:00
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/*
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* Copyright (c) 2006-2021, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2021-08-23 Mr.Tiger first version
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2021-11-04 20:31:55 +08:00
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* 2021-11-04 Sherman ADD complete_event
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2022-12-08 23:04:04 +08:00
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* 2022-12-7 Vandoul ADD sci spi support
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2021-10-27 11:28:55 +08:00
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*/
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/**< Note : Turn on any DMA mode and all SPIs will turn on DMA */
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#include "drv_spi.h"
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#ifdef RT_USING_SPI
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//#define DRV_DEBUG
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#define DBG_TAG "drv.spi"
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#ifdef DRV_DEBUG
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#define DBG_LVL DBG_LOG
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#else
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#define DBG_LVL DBG_INFO
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#endif /* DRV_DEBUG */
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#include <rtdbg.h>
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2022-12-08 23:04:04 +08:00
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#if defined(BSP_USING_SPI0) || defined(BSP_USING_SPI1)
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2022-12-09 10:14:19 +08:00
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#define RA_SPI0_EVENT 0x01
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#define RA_SPI1_EVENT 0x02
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2021-11-04 20:31:55 +08:00
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static struct rt_event complete_event = {0};
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2021-10-27 11:28:55 +08:00
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static struct ra_spi_handle spi_handle[] =
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{
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#ifdef BSP_USING_SPI0
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{.bus_name = "spi0", .spi_ctrl_t = &g_spi0_ctrl, .spi_cfg_t = &g_spi0_cfg,},
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#endif
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#ifdef BSP_USING_SPI1
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{.bus_name = "spi1", .spi_ctrl_t = &g_spi1_ctrl, .spi_cfg_t = &g_spi1_cfg,},
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#endif
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};
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static struct ra_spi spi_config[sizeof(spi_handle) / sizeof(spi_handle[0])] = {0};
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2022-03-11 09:17:46 +08:00
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void spi0_callback(spi_callback_args_t *p_args)
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2021-10-27 11:28:55 +08:00
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{
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rt_interrupt_enter();
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if (SPI_EVENT_TRANSFER_COMPLETE == p_args->event)
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{
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2021-11-04 20:31:55 +08:00
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rt_event_send(&complete_event, RA_SPI0_EVENT);
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2021-10-27 11:28:55 +08:00
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}
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rt_interrupt_leave();
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}
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2022-03-11 09:17:46 +08:00
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void spi1_callback(spi_callback_args_t *p_args)
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2021-10-27 11:28:55 +08:00
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{
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rt_interrupt_enter();
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if (SPI_EVENT_TRANSFER_COMPLETE == p_args->event)
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{
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2021-11-04 20:31:55 +08:00
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rt_event_send(&complete_event, RA_SPI1_EVENT);
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2021-10-27 11:28:55 +08:00
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}
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rt_interrupt_leave();
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}
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2021-11-04 20:31:55 +08:00
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static rt_err_t ra_wait_complete(rt_event_t event, const char bus_name[RT_NAME_MAX])
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{
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rt_uint32_t recved = 0x00;
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if (bus_name[3] == '0')
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{
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return rt_event_recv(event,
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RA_SPI0_EVENT,
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RT_EVENT_FLAG_OR | RT_EVENT_FLAG_CLEAR,
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RT_WAITING_FOREVER,
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&recved);
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}
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else if (bus_name[3] == '1')
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{
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return rt_event_recv(event,
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RA_SPI1_EVENT,
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RT_EVENT_FLAG_OR | RT_EVENT_FLAG_CLEAR,
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RT_WAITING_FOREVER,
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&recved);
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}
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return -RT_EINVAL;
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}
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2022-01-04 19:27:04 +08:00
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static spi_bit_width_t ra_width_shift(rt_uint8_t data_width)
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{
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spi_bit_width_t bit_width = SPI_BIT_WIDTH_8_BITS;
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2023-03-13 11:32:51 +08:00
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if (data_width == 1)
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2022-01-04 19:27:04 +08:00
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bit_width = SPI_BIT_WIDTH_8_BITS;
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2023-03-13 11:32:51 +08:00
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else if (data_width == 2)
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2022-01-04 19:27:04 +08:00
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bit_width = SPI_BIT_WIDTH_16_BITS;
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2023-03-13 11:32:51 +08:00
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else if (data_width == 4)
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2022-01-04 19:27:04 +08:00
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bit_width = SPI_BIT_WIDTH_32_BITS;
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return bit_width;
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}
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2021-10-27 11:28:55 +08:00
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static rt_err_t ra_write_message(struct rt_spi_device *device, const void *send_buf, const rt_size_t len)
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{
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RT_ASSERT(device != NULL);
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RT_ASSERT(send_buf != NULL);
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RT_ASSERT(len > 0);
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rt_err_t err = RT_EOK;
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struct ra_spi *spi_dev = rt_container_of(device->bus, struct ra_spi, bus);
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2022-01-04 19:27:04 +08:00
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spi_bit_width_t bit_width = ra_width_shift(spi_dev->rt_spi_cfg_t->data_width);
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2021-10-27 11:28:55 +08:00
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/**< send msessage */
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2022-01-04 19:27:04 +08:00
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err = R_SPI_Write((spi_ctrl_t *)spi_dev->ra_spi_handle_t->spi_ctrl_t, send_buf, len, bit_width);
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2021-10-27 11:28:55 +08:00
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if (RT_EOK != err)
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{
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LOG_E("%s write failed.", spi_dev->ra_spi_handle_t->bus_name);
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return -RT_ERROR;
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}
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2021-11-04 20:31:55 +08:00
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/* Wait for SPI_EVENT_TRANSFER_COMPLETE callback event. */
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ra_wait_complete(&complete_event, spi_dev->ra_spi_handle_t->bus_name);
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2021-10-27 11:28:55 +08:00
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return len;
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}
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static rt_err_t ra_read_message(struct rt_spi_device *device, void *recv_buf, const rt_size_t len)
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{
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RT_ASSERT(device != NULL);
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RT_ASSERT(recv_buf != NULL);
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RT_ASSERT(len > 0);
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rt_err_t err = RT_EOK;
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struct ra_spi *spi_dev = rt_container_of(device->bus, struct ra_spi, bus);
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2022-01-04 19:27:04 +08:00
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spi_bit_width_t bit_width = ra_width_shift(spi_dev->rt_spi_cfg_t->data_width);
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2021-10-27 11:28:55 +08:00
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/**< receive message */
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2022-01-04 19:27:04 +08:00
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err = R_SPI_Read((spi_ctrl_t *)spi_dev->ra_spi_handle_t->spi_ctrl_t, recv_buf, len, bit_width);
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2021-10-27 11:28:55 +08:00
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if (RT_EOK != err)
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{
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LOG_E("\n%s write failed.\n", spi_dev->ra_spi_handle_t->bus_name);
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return -RT_ERROR;
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}
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2021-11-04 20:31:55 +08:00
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/* Wait for SPI_EVENT_TRANSFER_COMPLETE callback event. */
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ra_wait_complete(&complete_event, spi_dev->ra_spi_handle_t->bus_name);
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2021-10-27 11:28:55 +08:00
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return len;
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}
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static rt_err_t ra_write_read_message(struct rt_spi_device *device, struct rt_spi_message *message)
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{
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RT_ASSERT(device != NULL);
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RT_ASSERT(message != NULL);
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RT_ASSERT(message->length > 0);
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rt_err_t err = RT_EOK;
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struct ra_spi *spi_dev = rt_container_of(device->bus, struct ra_spi, bus);
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2022-01-04 19:27:04 +08:00
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spi_bit_width_t bit_width = ra_width_shift(spi_dev->rt_spi_cfg_t->data_width);
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2021-10-27 11:28:55 +08:00
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/**< write and receive message */
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2022-01-04 19:27:04 +08:00
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err = R_SPI_WriteRead((spi_ctrl_t *)spi_dev->ra_spi_handle_t->spi_ctrl_t, message->send_buf, message->recv_buf, message->length, bit_width);
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2021-10-27 11:28:55 +08:00
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if (RT_EOK != err)
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{
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LOG_E("%s write and read failed.", spi_dev->ra_spi_handle_t->bus_name);
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return -RT_ERROR;
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}
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2021-11-04 20:31:55 +08:00
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/* Wait for SPI_EVENT_TRANSFER_COMPLETE callback event. */
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ra_wait_complete(&complete_event, spi_dev->ra_spi_handle_t->bus_name);
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2021-10-27 11:28:55 +08:00
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return message->length;
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}
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/**< init spi TODO : MSB does not support modification */
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static rt_err_t ra_hw_spi_configure(struct rt_spi_device *device,
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struct rt_spi_configuration *configuration)
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{
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RT_ASSERT(device != NULL);
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RT_ASSERT(configuration != NULL);
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rt_err_t err = RT_EOK;
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struct ra_spi *spi_dev = rt_container_of(device->bus, struct ra_spi, bus);
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/**< data_width : 1 -> 8 bits , 2 -> 16 bits, 4 -> 32 bits, default 32 bits*/
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rt_uint8_t data_width = configuration->data_width / 8;
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RT_ASSERT(data_width == 1 || data_width == 2 || data_width == 4);
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configuration->data_width = configuration->data_width / 8;
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spi_dev->rt_spi_cfg_t = configuration;
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spi_extended_cfg_t *spi_cfg = (spi_extended_cfg_t *)spi_dev->ra_spi_handle_t->spi_cfg_t->p_extend;
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/**< Configure Select Line */
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2023-03-13 11:32:51 +08:00
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rt_pin_write(device->cs_pin, PIN_HIGH);
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2021-10-27 11:28:55 +08:00
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/**< config bitrate */
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R_SPI_CalculateBitrate(spi_dev->rt_spi_cfg_t->max_hz, &spi_cfg->spck_div);
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/**< init */
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err = R_SPI_Open((spi_ctrl_t *)spi_dev->ra_spi_handle_t->spi_ctrl_t, (spi_cfg_t const * const)spi_dev->ra_spi_handle_t->spi_cfg_t);
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/* handle error */
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if (RT_EOK != err)
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{
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LOG_E("%s init failed.", spi_dev->ra_spi_handle_t->bus_name);
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return -RT_ERROR;
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}
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return RT_EOK;
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}
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2023-03-13 11:32:51 +08:00
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static rt_ssize_t ra_spixfer(struct rt_spi_device *device, struct rt_spi_message *message)
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2021-10-27 11:28:55 +08:00
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{
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2021-11-04 20:31:55 +08:00
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RT_ASSERT(device != RT_NULL);
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RT_ASSERT(device->bus != RT_NULL);
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RT_ASSERT(message != RT_NULL);
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2021-10-27 11:28:55 +08:00
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rt_err_t err = RT_EOK;
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2023-03-13 11:32:51 +08:00
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if (message->cs_take && !(device->config.mode & RT_SPI_NO_CS) && (device->cs_pin != PIN_NONE))
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2021-10-27 11:28:55 +08:00
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{
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2021-11-04 20:31:55 +08:00
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if (device->config.mode & RT_SPI_CS_HIGH)
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2023-03-13 11:32:51 +08:00
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rt_pin_write(device->cs_pin, PIN_HIGH);
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2021-11-04 20:31:55 +08:00
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else
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2023-03-13 11:32:51 +08:00
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rt_pin_write(device->cs_pin, PIN_LOW);
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2021-10-27 11:28:55 +08:00
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}
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2021-11-04 20:31:55 +08:00
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if (message->length > 0)
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2021-10-27 11:28:55 +08:00
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{
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if (message->send_buf == RT_NULL && message->recv_buf != RT_NULL)
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{
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/**< receive message */
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err = ra_read_message(device, (void *)message->recv_buf, (const rt_size_t)message->length);
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}
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else if (message->send_buf != RT_NULL && message->recv_buf == RT_NULL)
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{
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/**< send message */
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err = ra_write_message(device, (const void *)message->send_buf, (const rt_size_t)message->length);
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}
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else if (message->send_buf != RT_NULL && message->recv_buf != RT_NULL)
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{
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/**< send and receive message */
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err = ra_write_read_message(device, message);
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}
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}
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2021-11-04 20:31:55 +08:00
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2023-03-13 11:32:51 +08:00
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if (message->cs_release && !(device->config.mode & RT_SPI_NO_CS) && (device->cs_pin != PIN_NONE))
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2021-11-04 20:31:55 +08:00
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{
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if (device->config.mode & RT_SPI_CS_HIGH)
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2023-03-24 16:55:10 +08:00
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rt_pin_write(device->cs_pin, PIN_LOW);
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2021-11-04 20:31:55 +08:00
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else
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2023-03-24 16:55:10 +08:00
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rt_pin_write(device->cs_pin, PIN_HIGH);
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2021-11-04 20:31:55 +08:00
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}
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2021-10-27 11:28:55 +08:00
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return err;
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}
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static const struct rt_spi_ops ra_spi_ops =
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{
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.configure = ra_hw_spi_configure,
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.xfer = ra_spixfer,
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};
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int ra_hw_spi_init(void)
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{
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for (rt_uint8_t spi_index = 0; spi_index < sizeof(spi_handle) / sizeof(spi_handle[0]); spi_index++)
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{
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spi_config[spi_index].ra_spi_handle_t = &spi_handle[spi_index];
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/**< register spi bus */
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rt_err_t err = rt_spi_bus_register(&spi_config[spi_index].bus, spi_handle[spi_index].bus_name, &ra_spi_ops);
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if (RT_EOK != err)
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{
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LOG_E("%s bus register failed.", spi_config[spi_index].ra_spi_handle_t->bus_name);
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2021-11-04 20:31:55 +08:00
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return -RT_ERROR;
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2021-10-27 11:28:55 +08:00
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}
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}
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2021-11-04 20:31:55 +08:00
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if (RT_EOK != rt_event_init(&complete_event, "ra_spi", RT_IPC_FLAG_PRIO))
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{
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LOG_E("SPI transfer event init fail!");
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return -RT_ERROR;
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}
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2021-10-27 11:28:55 +08:00
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return RT_EOK;
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}
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INIT_BOARD_EXPORT(ra_hw_spi_init);
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2022-12-08 23:04:04 +08:00
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#endif
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2023-03-13 11:32:51 +08:00
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/**
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* Attach the spi device to SPI bus, this function must be used after initialization.
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*/
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2023-03-24 16:55:10 +08:00
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rt_err_t rt_hw_spi_device_attach(const char *bus_name, const char *device_name, rt_base_t cs_pin)
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2022-12-08 23:04:04 +08:00
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{
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2023-03-13 11:32:51 +08:00
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RT_ASSERT(bus_name != RT_NULL);
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RT_ASSERT(device_name != RT_NULL);
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2022-12-08 23:04:04 +08:00
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2023-03-13 11:32:51 +08:00
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rt_err_t result;
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struct rt_spi_device *spi_device;
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/* attach the device to spi bus*/
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spi_device = (struct rt_spi_device *)rt_malloc(sizeof(struct rt_spi_device));
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RT_ASSERT(spi_device != RT_NULL);
|
|
|
|
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2023-03-24 16:55:10 +08:00
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|
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result = rt_spi_bus_attach_device_cspin(spi_device, device_name, bus_name, cs_pin, RT_NULL);
|
2023-03-13 11:32:51 +08:00
|
|
|
if (result != RT_EOK)
|
2022-12-08 23:04:04 +08:00
|
|
|
{
|
2023-03-13 11:32:51 +08:00
|
|
|
LOG_E("%s attach to %s faild, %d\n", device_name, bus_name, result);
|
2022-12-08 23:04:04 +08:00
|
|
|
}
|
2023-03-13 11:32:51 +08:00
|
|
|
|
|
|
|
RT_ASSERT(result == RT_EOK);
|
|
|
|
|
|
|
|
LOG_D("%s attach to %s done", device_name, bus_name);
|
|
|
|
|
|
|
|
return result;
|
2022-12-08 23:04:04 +08:00
|
|
|
}
|
2021-10-27 11:28:55 +08:00
|
|
|
#endif /* RT_USING_SPI */
|