484 lines
18 KiB
C
484 lines
18 KiB
C
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/*
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* Copyright (c) 2015, Freescale Semiconductor, Inc.
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* Copyright 2016-2017 NXP
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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*
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* o Redistributions of source code must retain the above copyright notice, this list
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* of conditions and the following disclaimer.
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*
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* o Redistributions in binary form must reproduce the above copyright notice, this
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* list of conditions and the following disclaimer in the documentation and/or
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* other materials provided with the distribution.
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*
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* o Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived from this
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* software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _FSL_FLEXIO_I2C_MASTER_H_
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#define _FSL_FLEXIO_I2C_MASTER_H_
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#include "fsl_common.h"
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#include "fsl_flexio.h"
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/*!
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* @addtogroup flexio_i2c_master
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* @{
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*/
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/*******************************************************************************
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* Definitions
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******************************************************************************/
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/*! @name Driver version */
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/*@{*/
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/*! @brief FlexIO I2C master driver version 2.1.2. */
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#define FSL_FLEXIO_I2C_MASTER_DRIVER_VERSION (MAKE_VERSION(2, 1, 2))
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/*@}*/
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/*! @brief FlexIO I2C transfer status*/
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enum _flexio_i2c_status
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{
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kStatus_FLEXIO_I2C_Busy = MAKE_STATUS(kStatusGroup_FLEXIO_I2C, 0), /*!< I2C is busy doing transfer. */
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kStatus_FLEXIO_I2C_Idle = MAKE_STATUS(kStatusGroup_FLEXIO_I2C, 1), /*!< I2C is busy doing transfer. */
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kStatus_FLEXIO_I2C_Nak = MAKE_STATUS(kStatusGroup_FLEXIO_I2C, 2), /*!< NAK received during transfer. */
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};
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/*! @brief Define FlexIO I2C master interrupt mask. */
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enum _flexio_i2c_master_interrupt
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{
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kFLEXIO_I2C_TxEmptyInterruptEnable = 0x1U, /*!< Tx buffer empty interrupt enable. */
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kFLEXIO_I2C_RxFullInterruptEnable = 0x2U, /*!< Rx buffer full interrupt enable. */
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};
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/*! @brief Define FlexIO I2C master status mask. */
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enum _flexio_i2c_master_status_flags
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{
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kFLEXIO_I2C_TxEmptyFlag = 0x1U, /*!< Tx shifter empty flag. */
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kFLEXIO_I2C_RxFullFlag = 0x2U, /*!< Rx shifter full/Transfer complete flag. */
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kFLEXIO_I2C_ReceiveNakFlag = 0x4U, /*!< Receive NAK flag. */
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};
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/*! @brief Direction of master transfer.*/
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typedef enum _flexio_i2c_direction
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{
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kFLEXIO_I2C_Write = 0x0U, /*!< Master send to slave. */
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kFLEXIO_I2C_Read = 0x1U, /*!< Master receive from slave. */
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} flexio_i2c_direction_t;
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/*! @brief Define FlexIO I2C master access structure typedef. */
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typedef struct _flexio_i2c_type
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{
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FLEXIO_Type *flexioBase; /*!< FlexIO base pointer. */
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uint8_t SDAPinIndex; /*!< Pin select for I2C SDA. */
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uint8_t SCLPinIndex; /*!< Pin select for I2C SCL. */
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uint8_t shifterIndex[2]; /*!< Shifter index used in FlexIO I2C. */
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uint8_t timerIndex[2]; /*!< Timer index used in FlexIO I2C. */
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} FLEXIO_I2C_Type;
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/*! @brief Define FlexIO I2C master user configuration structure. */
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typedef struct _flexio_i2c_master_config
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{
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bool enableMaster; /*!< Enables the FlexIO I2C peripheral at initialization time. */
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bool enableInDoze; /*!< Enable/disable FlexIO operation in doze mode. */
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bool enableInDebug; /*!< Enable/disable FlexIO operation in debug mode. */
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bool enableFastAccess; /*!< Enable/disable fast access to FlexIO registers, fast access requires
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the FlexIO clock to be at least twice the frequency of the bus clock. */
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uint32_t baudRate_Bps; /*!< Baud rate in Bps. */
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} flexio_i2c_master_config_t;
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/*! @brief Define FlexIO I2C master transfer structure. */
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typedef struct _flexio_i2c_master_transfer
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{
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uint32_t flags; /*!< Transfer flag which controls the transfer, reserved for FlexIO I2C. */
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uint8_t slaveAddress; /*!< 7-bit slave address. */
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flexio_i2c_direction_t direction; /*!< Transfer direction, read or write. */
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uint32_t subaddress; /*!< Sub address. Transferred MSB first. */
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uint8_t subaddressSize; /*!< Size of command buffer. */
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uint8_t volatile *data; /*!< Transfer buffer. */
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volatile size_t dataSize; /*!< Transfer size. */
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} flexio_i2c_master_transfer_t;
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/*! @brief FlexIO I2C master handle typedef. */
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typedef struct _flexio_i2c_master_handle flexio_i2c_master_handle_t;
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/*! @brief FlexIO I2C master transfer callback typedef. */
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typedef void (*flexio_i2c_master_transfer_callback_t)(FLEXIO_I2C_Type *base,
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flexio_i2c_master_handle_t *handle,
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status_t status,
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void *userData);
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/*! @brief Define FlexIO I2C master handle structure. */
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struct _flexio_i2c_master_handle
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{
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flexio_i2c_master_transfer_t transfer; /*!< FlexIO I2C master transfer copy. */
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size_t transferSize; /*!< Total bytes to be transferred. */
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uint8_t state; /*!< Transfer state maintained during transfer. */
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flexio_i2c_master_transfer_callback_t completionCallback; /*!< Callback function called at transfer event. */
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/*!< Callback function called at transfer event. */
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void *userData; /*!< Callback parameter passed to callback function. */
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};
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/*******************************************************************************
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* API
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******************************************************************************/
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#if defined(__cplusplus)
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extern "C" {
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#endif /*_cplusplus*/
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/*!
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* @name Initialization and deinitialization
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* @{
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*/
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/*!
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* @brief Ungates the FlexIO clock, resets the FlexIO module, and configures the FlexIO I2C
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* hardware configuration.
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*
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* Example
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@code
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FLEXIO_I2C_Type base = {
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.flexioBase = FLEXIO,
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.SDAPinIndex = 0,
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.SCLPinIndex = 1,
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.shifterIndex = {0,1},
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.timerIndex = {0,1}
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};
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flexio_i2c_master_config_t config = {
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.enableInDoze = false,
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.enableInDebug = true,
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.enableFastAccess = false,
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.baudRate_Bps = 100000
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};
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FLEXIO_I2C_MasterInit(base, &config, srcClock_Hz);
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@endcode
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*
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* @param base Pointer to FLEXIO_I2C_Type structure.
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* @param masterConfig Pointer to flexio_i2c_master_config_t structure.
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* @param srcClock_Hz FlexIO source clock in Hz.
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* @retval kStatus_Success Initialization successful
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* @retval kStatus_InvalidArgument The source clock exceed upper range limitation
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*/
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status_t FLEXIO_I2C_MasterInit(FLEXIO_I2C_Type *base, flexio_i2c_master_config_t *masterConfig, uint32_t srcClock_Hz);
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/*!
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* @brief De-initializes the FlexIO I2C master peripheral. Calling this API Resets the FlexIO I2C master
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* shifer and timer config, module can't work unless the FLEXIO_I2C_MasterInit is called.
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*
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* @param base pointer to FLEXIO_I2C_Type structure.
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*/
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void FLEXIO_I2C_MasterDeinit(FLEXIO_I2C_Type *base);
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/*!
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* @brief Gets the default configuration to configure the FlexIO module. The configuration
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* can be used directly for calling the FLEXIO_I2C_MasterInit().
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*
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* Example:
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@code
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flexio_i2c_master_config_t config;
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FLEXIO_I2C_MasterGetDefaultConfig(&config);
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@endcode
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* @param masterConfig Pointer to flexio_i2c_master_config_t structure.
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*/
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void FLEXIO_I2C_MasterGetDefaultConfig(flexio_i2c_master_config_t *masterConfig);
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/*!
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* @brief Enables/disables the FlexIO module operation.
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*
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* @param base Pointer to FLEXIO_I2C_Type structure.
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* @param enable Pass true to enable module, false does not have any effect.
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*/
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static inline void FLEXIO_I2C_MasterEnable(FLEXIO_I2C_Type *base, bool enable)
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{
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if (enable)
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{
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base->flexioBase->CTRL |= FLEXIO_CTRL_FLEXEN_MASK;
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}
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}
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/* @} */
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/*!
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* @name Status
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* @{
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*/
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/*!
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* @brief Gets the FlexIO I2C master status flags.
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*
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* @param base Pointer to FLEXIO_I2C_Type structure
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* @return Status flag, use status flag to AND #_flexio_i2c_master_status_flags can get the related status.
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*/
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uint32_t FLEXIO_I2C_MasterGetStatusFlags(FLEXIO_I2C_Type *base);
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/*!
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* @brief Clears the FlexIO I2C master status flags.
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*
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* @param base Pointer to FLEXIO_I2C_Type structure.
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* @param mask Status flag.
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* The parameter can be any combination of the following values:
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* @arg kFLEXIO_I2C_RxFullFlag
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* @arg kFLEXIO_I2C_ReceiveNakFlag
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*/
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void FLEXIO_I2C_MasterClearStatusFlags(FLEXIO_I2C_Type *base, uint32_t mask);
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/*@}*/
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/*!
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* @name Interrupts
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* @{
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*/
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/*!
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* @brief Enables the FlexIO i2c master interrupt requests.
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*
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* @param base Pointer to FLEXIO_I2C_Type structure.
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* @param mask Interrupt source.
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* Currently only one interrupt request source:
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* @arg kFLEXIO_I2C_TransferCompleteInterruptEnable
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*/
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void FLEXIO_I2C_MasterEnableInterrupts(FLEXIO_I2C_Type *base, uint32_t mask);
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/*!
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* @brief Disables the FlexIO I2C master interrupt requests.
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*
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* @param base Pointer to FLEXIO_I2C_Type structure.
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* @param mask Interrupt source.
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*/
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void FLEXIO_I2C_MasterDisableInterrupts(FLEXIO_I2C_Type *base, uint32_t mask);
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/*@}*/
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/*!
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* @name Bus Operations
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* @{
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*/
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/*!
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* @brief Sets the FlexIO I2C master transfer baudrate.
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*
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* @param base Pointer to FLEXIO_I2C_Type structure
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* @param baudRate_Bps the baud rate value in HZ
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* @param srcClock_Hz source clock in HZ
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*/
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void FLEXIO_I2C_MasterSetBaudRate(FLEXIO_I2C_Type *base, uint32_t baudRate_Bps, uint32_t srcClock_Hz);
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/*!
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* @brief Sends START + 7-bit address to the bus.
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*
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* @note This API should be called when the transfer configuration is ready to send a START signal
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* and 7-bit address to the bus. This is a non-blocking API, which returns directly after the address
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* is put into the data register but the address transfer is not finished on the bus. Ensure that
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* the kFLEXIO_I2C_RxFullFlag status is asserted before calling this API.
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* @param base Pointer to FLEXIO_I2C_Type structure.
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* @param address 7-bit address.
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* @param direction transfer direction.
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* This parameter is one of the values in flexio_i2c_direction_t:
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* @arg kFLEXIO_I2C_Write: Transmit
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* @arg kFLEXIO_I2C_Read: Receive
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*/
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void FLEXIO_I2C_MasterStart(FLEXIO_I2C_Type *base, uint8_t address, flexio_i2c_direction_t direction);
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/*!
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* @brief Sends the stop signal on the bus.
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*
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* @param base Pointer to FLEXIO_I2C_Type structure.
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*/
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void FLEXIO_I2C_MasterStop(FLEXIO_I2C_Type *base);
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/*!
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* @brief Sends the repeated start signal on the bus.
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*
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* @param base Pointer to FLEXIO_I2C_Type structure.
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*/
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void FLEXIO_I2C_MasterRepeatedStart(FLEXIO_I2C_Type *base);
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/*!
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* @brief Sends the stop signal when transfer is still on-going.
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*
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* @param base Pointer to FLEXIO_I2C_Type structure.
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*/
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void FLEXIO_I2C_MasterAbortStop(FLEXIO_I2C_Type *base);
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/*!
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* @brief Configures the sent ACK/NAK for the following byte.
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*
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* @param base Pointer to FLEXIO_I2C_Type structure.
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* @param enable True to configure send ACK, false configure to send NAK.
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*/
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void FLEXIO_I2C_MasterEnableAck(FLEXIO_I2C_Type *base, bool enable);
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/*!
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* @brief Sets the number of bytes to be transferred from a start signal to a stop signal.
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*
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* @note Call this API before a transfer begins because the timer generates a number of clocks according
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* to the number of bytes that need to be transferred.
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*
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* @param base Pointer to FLEXIO_I2C_Type structure.
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* @param count Number of bytes need to be transferred from a start signal to a re-start/stop signal
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* @retval kStatus_Success Successfully configured the count.
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* @retval kStatus_InvalidArgument Input argument is invalid.
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*/
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status_t FLEXIO_I2C_MasterSetTransferCount(FLEXIO_I2C_Type *base, uint8_t count);
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/*!
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* @brief Writes one byte of data to the I2C bus.
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*
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* @note This is a non-blocking API, which returns directly after the data is put into the
|
||
|
|
* data register but the data transfer is not finished on the bus. Ensure that
|
||
|
|
* the TxEmptyFlag is asserted before calling this API.
|
||
|
|
*
|
||
|
|
* @param base Pointer to FLEXIO_I2C_Type structure.
|
||
|
|
* @param data a byte of data.
|
||
|
|
*/
|
||
|
|
static inline void FLEXIO_I2C_MasterWriteByte(FLEXIO_I2C_Type *base, uint32_t data)
|
||
|
|
{
|
||
|
|
base->flexioBase->SHIFTBUFBBS[base->shifterIndex[0]] = data;
|
||
|
|
}
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* @brief Reads one byte of data from the I2C bus.
|
||
|
|
*
|
||
|
|
* @note This is a non-blocking API, which returns directly after the data is read from the
|
||
|
|
* data register. Ensure that the data is ready in the register.
|
||
|
|
*
|
||
|
|
* @param base Pointer to FLEXIO_I2C_Type structure.
|
||
|
|
* @return data byte read.
|
||
|
|
*/
|
||
|
|
static inline uint8_t FLEXIO_I2C_MasterReadByte(FLEXIO_I2C_Type *base)
|
||
|
|
{
|
||
|
|
return base->flexioBase->SHIFTBUFBIS[base->shifterIndex[1]];
|
||
|
|
}
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* @brief Sends a buffer of data in bytes.
|
||
|
|
*
|
||
|
|
* @note This function blocks via polling until all bytes have been sent.
|
||
|
|
*
|
||
|
|
* @param base Pointer to FLEXIO_I2C_Type structure.
|
||
|
|
* @param txBuff The data bytes to send.
|
||
|
|
* @param txSize The number of data bytes to send.
|
||
|
|
* @retval kStatus_Success Successfully write data.
|
||
|
|
* @retval kStatus_FLEXIO_I2C_Nak Receive NAK during writing data.
|
||
|
|
*/
|
||
|
|
status_t FLEXIO_I2C_MasterWriteBlocking(FLEXIO_I2C_Type *base, const uint8_t *txBuff, uint8_t txSize);
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* @brief Receives a buffer of bytes.
|
||
|
|
*
|
||
|
|
* @note This function blocks via polling until all bytes have been received.
|
||
|
|
*
|
||
|
|
* @param base Pointer to FLEXIO_I2C_Type structure.
|
||
|
|
* @param rxBuff The buffer to store the received bytes.
|
||
|
|
* @param rxSize The number of data bytes to be received.
|
||
|
|
*/
|
||
|
|
void FLEXIO_I2C_MasterReadBlocking(FLEXIO_I2C_Type *base, uint8_t *rxBuff, uint8_t rxSize);
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* @brief Performs a master polling transfer on the I2C bus.
|
||
|
|
*
|
||
|
|
* @note The API does not return until the transfer succeeds or fails due
|
||
|
|
* to receiving NAK.
|
||
|
|
*
|
||
|
|
* @param base pointer to FLEXIO_I2C_Type structure.
|
||
|
|
* @param xfer pointer to flexio_i2c_master_transfer_t structure.
|
||
|
|
* @return status of status_t.
|
||
|
|
*/
|
||
|
|
status_t FLEXIO_I2C_MasterTransferBlocking(FLEXIO_I2C_Type *base, flexio_i2c_master_transfer_t *xfer);
|
||
|
|
/*@}*/
|
||
|
|
|
||
|
|
/*Transactional APIs*/
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* @name Transactional
|
||
|
|
* @{
|
||
|
|
*/
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* @brief Initializes the I2C handle which is used in transactional functions.
|
||
|
|
*
|
||
|
|
* @param base Pointer to FLEXIO_I2C_Type structure.
|
||
|
|
* @param handle Pointer to flexio_i2c_master_handle_t structure to store the transfer state.
|
||
|
|
* @param callback Pointer to user callback function.
|
||
|
|
* @param userData User param passed to the callback function.
|
||
|
|
* @retval kStatus_Success Successfully create the handle.
|
||
|
|
* @retval kStatus_OutOfRange The FlexIO type/handle/isr table out of range.
|
||
|
|
*/
|
||
|
|
status_t FLEXIO_I2C_MasterTransferCreateHandle(FLEXIO_I2C_Type *base,
|
||
|
|
flexio_i2c_master_handle_t *handle,
|
||
|
|
flexio_i2c_master_transfer_callback_t callback,
|
||
|
|
void *userData);
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* @brief Performs a master interrupt non-blocking transfer on the I2C bus.
|
||
|
|
*
|
||
|
|
* @note The API returns immediately after the transfer initiates.
|
||
|
|
* Call FLEXIO_I2C_MasterGetTransferCount to poll the transfer status to check whether
|
||
|
|
* the transfer is finished. If the return status is not kStatus_FLEXIO_I2C_Busy, the transfer
|
||
|
|
* is finished.
|
||
|
|
*
|
||
|
|
* @param base Pointer to FLEXIO_I2C_Type structure
|
||
|
|
* @param handle Pointer to flexio_i2c_master_handle_t structure which stores the transfer state
|
||
|
|
* @param xfer pointer to flexio_i2c_master_transfer_t structure
|
||
|
|
* @retval kStatus_Success Successfully start a transfer.
|
||
|
|
* @retval kStatus_FLEXIO_I2C_Busy FlexIO I2C is not idle, is running another transfer.
|
||
|
|
*/
|
||
|
|
status_t FLEXIO_I2C_MasterTransferNonBlocking(FLEXIO_I2C_Type *base,
|
||
|
|
flexio_i2c_master_handle_t *handle,
|
||
|
|
flexio_i2c_master_transfer_t *xfer);
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* @brief Gets the master transfer status during a interrupt non-blocking transfer.
|
||
|
|
*
|
||
|
|
* @param base Pointer to FLEXIO_I2C_Type structure.
|
||
|
|
* @param handle Pointer to flexio_i2c_master_handle_t structure which stores the transfer state.
|
||
|
|
* @param count Number of bytes transferred so far by the non-blocking transaction.
|
||
|
|
* @retval kStatus_InvalidArgument count is Invalid.
|
||
|
|
* @retval kStatus_Success Successfully return the count.
|
||
|
|
*/
|
||
|
|
status_t FLEXIO_I2C_MasterTransferGetCount(FLEXIO_I2C_Type *base, flexio_i2c_master_handle_t *handle, size_t *count);
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* @brief Aborts an interrupt non-blocking transfer early.
|
||
|
|
*
|
||
|
|
* @note This API can be called at any time when an interrupt non-blocking transfer initiates
|
||
|
|
* to abort the transfer early.
|
||
|
|
*
|
||
|
|
* @param base Pointer to FLEXIO_I2C_Type structure
|
||
|
|
* @param handle Pointer to flexio_i2c_master_handle_t structure which stores the transfer state
|
||
|
|
*/
|
||
|
|
void FLEXIO_I2C_MasterTransferAbort(FLEXIO_I2C_Type *base, flexio_i2c_master_handle_t *handle);
|
||
|
|
|
||
|
|
/*!
|
||
|
|
* @brief Master interrupt handler.
|
||
|
|
*
|
||
|
|
* @param i2cType Pointer to FLEXIO_I2C_Type structure
|
||
|
|
* @param i2cHandle Pointer to flexio_i2c_master_transfer_t structure
|
||
|
|
*/
|
||
|
|
void FLEXIO_I2C_MasterTransferHandleIRQ(void *i2cType, void *i2cHandle);
|
||
|
|
|
||
|
|
/*@}*/
|
||
|
|
|
||
|
|
#if defined(__cplusplus)
|
||
|
|
}
|
||
|
|
#endif /*_cplusplus*/
|
||
|
|
/*@}*/
|
||
|
|
|
||
|
|
#endif /*_FSL_FLEXIO_I2C_MASTER_H_*/
|