2018-11-29 17:00:22 +08:00
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/*
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2023-01-09 10:20:16 +08:00
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* Copyright (c) 2006-2023, RT-Thread Development Team
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2018-11-29 17:00:22 +08:00
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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2019-01-08 11:58:57 +08:00
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* 2018-11-10 SummerGift first version
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2020-10-14 15:02:23 +08:00
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* 2020-10-14 Dozingfiretruck Porting for stm32wbxx
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2018-11-29 17:00:22 +08:00
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*/
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#ifndef __DRV_DMA_H_
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#define __DRV_DMA_H_
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#include <rtthread.h>
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2019-01-22 09:14:06 +08:00
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#include <board.h>
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2018-11-29 17:00:22 +08:00
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2019-01-09 10:10:39 +08:00
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#ifdef __cplusplus
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extern "C" {
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#endif
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2021-11-01 14:56:23 +08:00
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#if defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32L0) || defined(SOC_SERIES_STM32L5)\
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2021-11-15 10:26:14 +08:00
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|| defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32WL) || defined(SOC_SERIES_STM32G0) \
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|| defined(SOC_SERIES_STM32G4) || defined(SOC_SERIES_STM32WB)|| defined(SOC_SERIES_STM32F3) \
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2024-04-09 20:33:21 +08:00
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|| defined(SOC_SERIES_STM32U5) || defined(SOC_SERIES_STM32H5) || defined(SOC_SERIES_STM32H7RS)
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2018-11-29 17:00:22 +08:00
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#define DMA_INSTANCE_TYPE DMA_Channel_TypeDef
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2019-06-18 15:54:36 +08:00
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#elif defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)\
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2021-11-15 13:43:33 +08:00
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|| defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32MP1)
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2018-11-29 17:00:22 +08:00
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#define DMA_INSTANCE_TYPE DMA_Stream_TypeDef
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2021-01-29 10:28:18 +08:00
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#endif /* defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32WL) */
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2018-11-29 17:00:22 +08:00
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struct dma_config {
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DMA_INSTANCE_TYPE *Instance;
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rt_uint32_t dma_rcc;
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IRQn_Type dma_irq;
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2021-08-05 16:00:35 +08:00
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#if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)|| defined(SOC_SERIES_STM32F3)
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2018-11-29 17:00:22 +08:00
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rt_uint32_t channel;
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#endif
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2021-01-29 10:28:18 +08:00
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#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32WL) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32G4)\
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2021-11-01 14:56:23 +08:00
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|| defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32MP1) || defined(SOC_SERIES_STM32WB) || defined(SOC_SERIES_STM32L5)
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2018-11-29 17:00:22 +08:00
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rt_uint32_t request;
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#endif
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};
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2019-01-09 10:10:39 +08:00
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#ifdef __cplusplus
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}
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#endif
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2018-11-29 17:00:22 +08:00
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#endif /*__DRV_DMA_H_ */
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