2022-05-06 09:28:21 +08:00
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/*
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2024-02-23 01:34:35 +08:00
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* Copyright (C) 2022-2024, Xiaohua Semiconductor Co., Ltd.
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2022-05-06 09:28:21 +08:00
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2022-04-28 CDT first version
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*/
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#ifndef __DRV_USART_H__
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#define __DRV_USART_H__
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/*******************************************************************************
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* Include files
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******************************************************************************/
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#include <rtthread.h>
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#include "rtdevice.h"
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#include "drv_irq.h"
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#include "drv_dma.h"
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/* C binding of definitions if building with C++ compiler */
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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/*******************************************************************************
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* Global type definitions ('typedef')
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******************************************************************************/
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struct hc32_uart_irq_config
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{
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struct hc32_irq_config irq_config;
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func_ptr_t irq_callback;
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};
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/* HC32 config Rx timeout */
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struct hc32_uart_rxto
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{
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CM_TMR0_TypeDef *TMR0_Instance;
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rt_uint32_t channel;
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rt_uint32_t clock;
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rt_size_t timeout_bits;
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2024-01-09 21:56:37 +08:00
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#if defined (HC32F460) || defined (HC32F4A0)
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2022-05-06 09:28:21 +08:00
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struct hc32_irq_config irq_config;
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func_ptr_t irq_callback;
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2024-01-09 21:56:37 +08:00
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#endif
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2022-05-06 09:28:21 +08:00
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};
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/* HC32 config uart class */
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struct hc32_uart_config
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{
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const char *name;
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CM_USART_TypeDef *Instance;
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rt_uint32_t clock;
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2024-01-09 21:56:37 +08:00
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#if defined (HC32F460) || defined (HC32F4A0)
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2022-05-06 09:28:21 +08:00
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struct hc32_uart_irq_config rxerr_irq;
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struct hc32_uart_irq_config rx_irq;
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struct hc32_uart_irq_config tx_irq;
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2024-02-23 01:34:35 +08:00
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#elif defined (HC32F448)
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IRQn_Type irq_num;
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en_int_src_t rxerr_int_src;
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en_int_src_t tx_int_src;
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en_int_src_t rx_int_src;
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#ifdef RT_SERIAL_USING_DMA
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en_int_src_t rxto_int_src;
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#endif
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2024-01-09 21:56:37 +08:00
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#endif
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2022-05-06 09:28:21 +08:00
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#ifdef RT_SERIAL_USING_DMA
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struct hc32_uart_rxto *rx_timeout;
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2024-01-09 21:56:37 +08:00
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stc_dma_llp_descriptor_t llp_desc[2U];
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2022-05-06 09:28:21 +08:00
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struct dma_config *dma_rx;
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struct hc32_uart_irq_config *tc_irq;
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struct dma_config *dma_tx;
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#endif
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};
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2024-01-09 21:56:37 +08:00
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/* HC32 uart driver class */
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2022-05-06 09:28:21 +08:00
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struct hc32_uart
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{
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struct hc32_uart_config *config;
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#ifdef RT_SERIAL_USING_DMA
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2024-02-23 01:34:35 +08:00
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rt_size_t dma_rx_remaining_cnt;
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2022-05-06 09:28:21 +08:00
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#endif
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rt_uint16_t uart_dma_flag;
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struct rt_serial_device serial;
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};
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/*******************************************************************************
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* Global pre-processor symbols/macros ('#define')
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******************************************************************************/
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/*******************************************************************************
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* Global variable definitions ('extern')
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******************************************************************************/
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/*******************************************************************************
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* Global function prototypes (definition in C source)
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******************************************************************************/
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2024-01-16 01:00:09 +08:00
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int rt_hw_usart_init(void);
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2022-05-06 09:28:21 +08:00
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#ifdef __cplusplus
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}
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#endif
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#endif /* __DRV_USART_H__ */
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/*******************************************************************************
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* EOF (not truncated)
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******************************************************************************/
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