2021-09-22 17:14:47 +08:00
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/*
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******************************************************************************
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* @file HAL_Uart.h
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* @version V1.0.0
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* @date 2020
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* @brief Header file of UART HAL module.
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******************************************************************************
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*/
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#ifndef __HAL_UART_H__
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#define __HAL_UART_H__
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#include "ACM32Fxx_HAL.h"
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/******************************************************************************/
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/* Peripheral Registers Bits Definition */
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/******************************************************************************/
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/**************** Bit definition for UART FR register ***********************/
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#define UART_FR_TXFE BIT7
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#define UART_FR_RXFF BIT6
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#define UART_FR_TXFF BIT5
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#define UART_FR_RXFE BIT4
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#define UART_FR_BUSY BIT3
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#define UART_FR_CTS BIT0
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/*************** Bit definition for UART LCRH register **********************/
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#define UART_LCRH_SPS BIT7
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#define UART_LCRH_WLEN (BIT6|BIT5)
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#define UART_LCRH_FEN BIT4
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#define UART_LCRH_STP2 BIT3
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#define UART_LCRH_EPS BIT2
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#define UART_LCRH_PEN BIT1
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#define UART_LCRH_BRK BIT0
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/**************** Bit definition for UART CR register ***********************/
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#define UART_CR_CTSEN BIT15
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#define UART_CR_RTSEN BIT14
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#define UART_CR_RTS BIT11
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#define UART_CR_RXE BIT9
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#define UART_CR_TXE BIT8
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#define UART_CR_UARTEN BIT0
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/*************** Bit definition for UART IFLS register **********************/
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#define UART_IFLS_RXIFLSEL (BIT3|BIT4|BIT5)
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#define UART_IFLS_TXIFLSEL (BIT0|BIT1|BIT2)
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/**************** Bit definition for UART IE register ***********************/
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#define UART_IE_OEI BIT10
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#define UART_IE_BEI BIT9
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#define UART_IE_PEI BIT8
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#define UART_IE_FEI BIT7
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#define UART_IE_RTI BIT6
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#define UART_IE_TXI BIT5
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#define UART_IE_RXI BIT4
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/**************** Bit definition for UART RIS register ***********************/
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#define UART_RIS_OEI BIT10
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#define UART_RIS_BEI BIT9
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#define UART_RIS_PEI BIT8
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#define UART_RIS_FEI BIT7
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#define UART_RIS_RTI BIT6
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#define UART_RIS_TXI BIT5
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#define UART_RIS_RXI BIT4
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/**************** Bit definition for UART ICR register ***********************/
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#define UART_ICR_OEI BIT10
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#define UART_ICR_BEI BIT9
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#define UART_ICR_PEI BIT8
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#define UART_ICR_FEI BIT7
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#define UART_ICR_RTI BIT6
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#define UART_ICR_TXI BIT5
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#define UART_ICR_RXI BIT4
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/***************** Bit definition for UART DMACR register ***********************/
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#define UART_DMACR_DMAONERR BIT2
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#define UART_DMACR_TXDMAE BIT1
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#define UART_DMACR_RXDMAE BIT0
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/***************** Bit definition for UART CR2 register ***********************/
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#define UART_CR2_TXOE_SEL BIT1
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#define UART_CR2_RX_SEL BIT0
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/** @defgroup UARTEx_Word_Length UARTEx Word Length
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* @{
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*/
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#define UART_WORDLENGTH_5B (0x00000000U) /*!< 5-bit Word Length */
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#define UART_WORDLENGTH_6B (0x00000020U) /*!< 6-bit Word Length */
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#define UART_WORDLENGTH_7B (0x00000040U) /*!< 7-bit Word Length */
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#define UART_WORDLENGTH_8B (0x00000060U) /*!< 8-bit Word Length */
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/**
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* @}
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*/
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/** @defgroup UART_Parity UART Parity
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* @{
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*/
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#define UART_PARITY_NONE (0x00000000U) /*!< No parity */
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#define UART_PARITY_EVEN (0x00000006U) /*!< Even parity */
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#define UART_PARITY_ODD (0x00000002U) /*!< Odd parity */
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#define UART_PARITY_0 (0x00000086U) /*!< 0 parity */
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#define UART_PARITY_1 (0x00000082U) /*!< 1 parity */
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/**
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* @}
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*/
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/** @defgroup UART_Stop_Bits UART Number of Stop Bits
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* @{
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*/
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#define UART_STOPBITS_1 (0x00000000U) /*!< UART frame with 1 stop bit */
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#define UART_STOPBITS_2 (0x00008000U) /*!< UART frame with 2 stop bits */
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/**
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* @}
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*/
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/** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control
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* @{
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*/
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#define UART_HWCONTROL_NONE (0x00000000U) /*!< No hardware control */
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#define UART_HWCONTROL_CTS (0x00008000U) /*!< Clear To Send */
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#define UART_HWCONTROL_RTS (0x00004000U) /*!< Request To Send */
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#define UART_HWCONTROL_CTS_RTS (UART_HWCONTROL_CTS | UART_HWCONTROL_RTS) /*!< Request and Clear To Send */
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/**
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* @}
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*/
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/** @defgroup UART_Mode UART Transfer Mode
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* @{
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*/
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#define UART_MODE_RX (0x00000200) /*!< RX mode */
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#define UART_MODE_TX (0x00000100) /*!< TX mode */
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#define UART_MODE_TX_RX (0x00000300) /*!< RX and TX mode */
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2023-04-02 00:07:10 +08:00
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#define UART_MODE_TX_RX_DEBUG (0x10000300) /*!< RX/TX mode and Debug use this uart */
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2021-09-22 17:14:47 +08:00
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#define UART_MODE_HALF_DUPLEX (0x20000300) /*!< Single half duplex */
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/**
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* @}
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*/
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/** @defgroup FIFO interrupt Config
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* @{
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*/
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#define UART_TX_FIFO_1_16 (0x00000005) /*!< Transfer 1 Data */
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#define UART_TX_FIFO_1_8 (0x00000000) /*!< Transfer 2 Data */
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#define UART_TX_FIFO_1_4 (0x00000001) /*!< Transfer 4 Data */
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#define UART_TX_FIFO_1_2 (0x00000002) /*!< Transfer 8 Data */
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#define UART_TX_FIFO_3_4 (0x00000003) /*!< Transfer 12 Data */
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#define UART_TX_FIFO_7_8 (0x00000004) /*!< Transfer 14 Data */
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#define UART_RX_FIFO_1_16 (0x00000028) /*!< Receive 1 Data */
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#define UART_RX_FIFO_1_8 (0x00000000) /*!< Receive 2 Data */
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#define UART_RX_FIFO_1_4 (0x00000008) /*!< Receive 4 Data */
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#define UART_RX_FIFO_1_2 (0x00000010) /*!< Receive 8 Data */
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#define UART_RX_FIFO_3_4 (0x00000018) /*!< Receive 12 Data */
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#define UART_RX_FIFO_7_8 (0x00000020) /*!< Receive 14 Data */
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/**
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* @}
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*/
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/** @defgroup UART_Error_Code UART Error Code
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* @{
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*/
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#define HAL_UART_ERROR_NONE 0x00000000U /*!< No error */
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#define HAL_UART_ERROR_PE 0x00000001U /*!< Parity error */
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#define HAL_UART_ERROR_NE 0x00000002U /*!< Noise error */
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#define HAL_UART_ERROR_FE 0x00000004U /*!< Frame error */
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#define HAL_UART_ERROR_ORE 0x00000008U /*!< Overrun error */
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#define HAL_UART_ERROR_DMA 0x00000010U /*!< DMA transfer error */
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/**
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* @}
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*/
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/*
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* @brief UART Init Structure definition
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*/
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typedef struct
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{
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uint32_t BaudRate; /*!< This member configures the UART communication baud rate. */
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uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
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This parameter can be a value of @ref UARTEx_Word_Length. */
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uint32_t StopBits; /*!< Specifies the number of stop bits transmitted.
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This parameter can be a value of @ref UART_Stop_Bits. */
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uint32_t Parity; /*!< Specifies the parity mode.
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This parameter can be a value of @ref UART_Parity. */
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uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled.
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This parameter can be a value of @ref UART_Mode. */
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uint32_t HwFlowCtl; /*!< Specifies whether the hardware flow control mode is enabled or disabled.
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This parameter can be a value of @ref UART_Hardware_Flow_Control. */
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}UART_InitTypeDef;
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/*
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* @brief UART handle Structure definition
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*/
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typedef struct
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{
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UART_TypeDef *Instance; /*!< UART registers base address */
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UART_InitTypeDef Init; /*!< UART communication parameters */
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uint32_t lu32_TxSize; /*!< UART Transmit parameters in interrupt */
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__IO uint32_t lu32_TxCount;
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uint8_t *lu8_TxData;
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uint32_t lu32_RxSize; /*!< UART Receive parameters in interrupt */
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__IO uint32_t lu32_RxCount;
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uint32_t lu32_fifo_level_minus1;
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uint8_t *lu8_RxData;
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__IO uint8_t lu8_TxBusy;
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__IO uint8_t lu8_RxBusy;
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DMA_HandleTypeDef *HDMA_Tx; /*!< UART Tx DMA handle parameters */
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DMA_HandleTypeDef *HDMA_Rx; /*!< UART Rx DMA handle parameters */
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__IO uint32_t ErrorCode; /*!<UART Error Code */
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}UART_HandleTypeDef;
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/** @defgroup GPIO Private Macros
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* @{
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*/
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#define IS_UART_ALL_INSTANCE(INSTANCE) (((INSTANCE) == UART1) || \
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((INSTANCE) == UART2) || \
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((INSTANCE) == UART3) || \
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((INSTANCE) == UART4))
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#define IS_UART_WORDLENGTH(__WORDLENGTH__) (((__WORDLENGTH__) == UART_WORDLENGTH_5B) || \
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((__WORDLENGTH__) == UART_WORDLENGTH_6B) || \
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((__WORDLENGTH__) == UART_WORDLENGTH_7B) || \
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((__WORDLENGTH__) == UART_WORDLENGTH_8B))
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#define IS_UART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_1) || \
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((__STOPBITS__) == UART_STOPBITS_2))
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#define IS_UART_PARITY(__PARITY__) (((__PARITY__) == UART_PARITY_NONE) || \
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((__PARITY__) == UART_PARITY_EVEN) || \
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((__PARITY__) == UART_PARITY_ODD))
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#define IS_UART_MODE(__MODE__) (((__MODE__) == UART_MODE_RX) || \
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((__MODE__) == UART_MODE_TX) || \
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((__MODE__) == UART_MODE_TX_RX) || \
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((__MODE__) == UART_MODE_TX_RX_DEBUG) || \
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((__MODE__) == UART_MODE_HALF_DUPLEX))
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#define IS_UART_HARDWARE_FLOW_CONTROL(__CONTROL__) (((__CONTROL__) == UART_HWCONTROL_NONE) || \
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((__CONTROL__) == UART_HWCONTROL_RTS) || \
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((__CONTROL__) == UART_HWCONTROL_CTS) || \
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((__CONTROL__) == UART_HWCONTROL_CTS_RTS))
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/**
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* @}
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*/
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/* HAL_UART_IRQHandler */
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void HAL_UART_IRQHandler(UART_HandleTypeDef *huart);
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/* HAL_UART_MspInit */
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void HAL_UART_MspInit(UART_HandleTypeDef *huart);
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/* HAL_UART_Init */
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HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart);
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/* HAL_UART_DeInit */
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HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart);
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/* HAL_UART_GetState */
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HAL_StatusTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart);
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/* HAL_UART_GetError*/
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uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart);
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/* HAL_UART_Abort*/
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HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart);
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/* HAL_UART_DMAPause */
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HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart);
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/* HAL_UART_DMAResume */
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HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart);
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/* HAL_UART_Transmit */
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HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *fu8_Data, uint32_t fu32_Size, uint32_t fu32_Timeout);
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/* HAL_UART_Receive */
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HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *fu8_Data, uint32_t fu32_Size, uint32_t fu32_Timeout);
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/* HAL_UART_Transmit_IT */
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HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *fu8_Data, uint32_t fu32_Size);
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/* HAL_UART_Receive_IT */
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HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *fu8_Data, uint32_t fu32_Size);
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/* HAL_UART_Transmit_DMA */
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HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *fu8_Data, uint32_t fu32_Size);
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/* HAL_UART_Receive_DMA */
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HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *fu8_Data, uint32_t fu32_Size);
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#endif
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