129 lines
4.4 KiB
C
129 lines
4.4 KiB
C
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/*
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* Copyright : (C) 2022 Phytium Information Technology, Inc.
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* All Rights Reserved.
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*
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* This program is OPEN SOURCE software: you can redistribute it and/or modify it
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* under the terms of the Phytium Public License as published by the Phytium Technology Co.,Ltd,
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* either version 1.0 of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,but WITHOUT ANY WARRANTY;
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* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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* See the Phytium Public License for more details.
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*
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*
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* FilePath: fpwm_g.c
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* Date: 2022-02-10 14:53:42
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* LastEditTime: 2022-02-25 11:45:05
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* Description: This files is for
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*
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* Modify History:
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* Ver Who Date Changes
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* ----- ------ -------- --------------------------------------
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*/
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#include "fparameters.h"
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#include "fpwm.h"
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#include "fpwm_hw.h"
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/* default configs of pwm ctrl */
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const FPwmConfig FPwmConfigTbl[FPWM_INSTANCE_NUM] =
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{
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[FPWM_INSTANCE_0] =
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{
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.instance_id = FPWM_INSTANCE_0,
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.db_base_addr = FPWM0_BASE_ADR,
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.pwm_base_addr = FPWM0_BASE_ADR + FPWM_OFFSET,
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.base_clk = FPWM_CLK,
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.irq_num[FPWM_CHANNEL_0] = FPWM0_INTR_IRQ,
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.irq_num[FPWM_CHANNEL_1] = FPWM1_INTR_IRQ,
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.irq_prority[FPWM_CHANNEL_0] = 0,
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.irq_prority[FPWM_CHANNEL_1] = 0,
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.instance_name = "PWM_CTRL0",
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},
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[FPWM_INSTANCE_1] =
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{
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.instance_id = FPWM_INSTANCE_1,
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.db_base_addr = FPWM1_BASE_ADR,
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.pwm_base_addr = FPWM1_BASE_ADR + FPWM_OFFSET,
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.base_clk = FPWM_CLK,
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.irq_num[FPWM_CHANNEL_0] = FPWM2_INTR_IRQ,
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.irq_num[FPWM_CHANNEL_1] = FPWM3_INTR_IRQ,
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.irq_prority[FPWM_CHANNEL_0] = 0,
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.irq_prority[FPWM_CHANNEL_1] = 0,
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.instance_name = "PWM_CTRL1",
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},
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[FPWM_INSTANCE_2] =
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{
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.instance_id = FPWM_INSTANCE_2,
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.db_base_addr = FPWM2_BASE_ADR,
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.pwm_base_addr = FPWM2_BASE_ADR + FPWM_OFFSET,
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.base_clk = FPWM_CLK,
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.irq_num[FPWM_CHANNEL_0] = FPWM4_INTR_IRQ,
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.irq_num[FPWM_CHANNEL_1] = FPWM5_INTR_IRQ,
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.irq_prority[FPWM_CHANNEL_0] = 0,
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.irq_prority[FPWM_CHANNEL_1] = 0,
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.instance_name = "PWM_CTRL2",
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},
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[FPWM_INSTANCE_3] =
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{
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.instance_id = FPWM_INSTANCE_3,
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.db_base_addr = FPWM3_BASE_ADR,
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.pwm_base_addr = FPWM3_BASE_ADR + FPWM_OFFSET,
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.base_clk = FPWM_CLK,
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.irq_num[FPWM_CHANNEL_0] = FPWM6_INTR_IRQ,
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.irq_num[FPWM_CHANNEL_1] = FPWM7_INTR_IRQ,
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.irq_prority[FPWM_CHANNEL_0] = 0,
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.irq_prority[FPWM_CHANNEL_1] = 0,
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.instance_name = "PWM_CTRL3",
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},
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[FPWM_INSTANCE_4] =
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{
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.instance_id = FPWM_INSTANCE_4,
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.db_base_addr = FPWM4_BASE_ADR,
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.pwm_base_addr = FPWM4_BASE_ADR + FPWM_OFFSET,
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.base_clk = FPWM_CLK,
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.irq_num[FPWM_CHANNEL_0] = FPWM8_INTR_IRQ,
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.irq_num[FPWM_CHANNEL_1] = FPWM9_INTR_IRQ,
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.irq_prority[FPWM_CHANNEL_0] = 0,
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.irq_prority[FPWM_CHANNEL_1] = 0,
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.instance_name = "PWM_CTRL4",
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},
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[FPWM_INSTANCE_5] =
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{
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.instance_id = FPWM_INSTANCE_5,
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.db_base_addr = FPWM5_BASE_ADR,
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.pwm_base_addr = FPWM5_BASE_ADR + FPWM_OFFSET,
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.base_clk = FPWM_CLK,
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.irq_num[FPWM_CHANNEL_0] = FPWM10_INTR_IRQ,
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.irq_num[FPWM_CHANNEL_1] = FPWM11_INTR_IRQ,
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.irq_prority[FPWM_CHANNEL_0] = 0,
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.irq_prority[FPWM_CHANNEL_1] = 0,
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.instance_name = "PWM_CTRL5",
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},
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[FPWM_INSTANCE_6] =
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{
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.instance_id = FPWM_INSTANCE_6,
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.db_base_addr = FPWM6_BASE_ADR,
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.pwm_base_addr = FPWM6_BASE_ADR + FPWM_OFFSET,
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.base_clk = FPWM_CLK,
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.irq_num[FPWM_CHANNEL_0] = FPWM12_INTR_IRQ,
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.irq_num[FPWM_CHANNEL_1] = FPWM13_INTR_IRQ,
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.irq_prority[FPWM_CHANNEL_0] = 0,
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.irq_prority[FPWM_CHANNEL_1] = 0,
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.instance_name = "PWM_CTRL6",
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},
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[FPWM_INSTANCE_7] =
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{
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.instance_id = FPWM_INSTANCE_7,
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.db_base_addr = FPWM7_BASE_ADR,
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.pwm_base_addr = FPWM7_BASE_ADR + FPWM_OFFSET,
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.base_clk = FPWM_CLK,
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.irq_num[FPWM_CHANNEL_0] = FPWM14_INTR_IRQ,
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.irq_num[FPWM_CHANNEL_1] = FPWM15_INTR_IRQ,
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.irq_prority[FPWM_CHANNEL_0] = 0,
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.irq_prority[FPWM_CHANNEL_1] = 0,
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.instance_name = "PWM_CTRL7",
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},
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};
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