412 lines
13 KiB
C
412 lines
13 KiB
C
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/*
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* Copyright : (C) 2022 Phytium Information Technology, Inc.
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* All Rights Reserved.
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*
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* This program is OPEN SOURCE software: you can redistribute it and/or modify it
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* under the terms of the Phytium Public License as published by the Phytium Technology Co.,Ltd,
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* either version 1.0 of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,but WITHOUT ANY WARRANTY;
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* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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* See the Phytium Public License for more details.
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*
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*
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* FilePath: fi2c_master.c
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* Date: 2022-02-10 14:53:42
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* LastEditTime: 2022-02-18 08:36:46
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* Description: This files is for
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*
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* Modify History:
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* Ver Who Date Changes
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* ----- ------ -------- --------------------------------------
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*/
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/*
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- 一些驱动模块，直接操作硬件的I/O接口，无法实现有意义的操作，此时需要针对中间件或者用户使用习惯设计此模块 （i2c,nand,eth）
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- 部分场景适用, 分角色的 I/O 操作
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- 此模块的函数原型，在fooxx.h 中声明一次，方便用户或者中间件层调用
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*/
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/***************************** Include Files *********************************/
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#include "fio.h"
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#include "fsleep.h"
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#include "fdebug.h"
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#include "fi2c_hw.h"
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#include "fi2c.h"
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#include "finterrupt.h"
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/************************** Constant Definitions *****************************/
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/**************************** Type Definitions *******************************/
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/***************** Macros (Inline Functions) Definitions *********************/
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#define FI2C_DEBUG_TAG "I2C_MASTER"
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#define FI2C_ERROR(format, ...) FT_DEBUG_PRINT_E(FI2C_DEBUG_TAG, format, ##__VA_ARGS__)
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#define FI2C_INFO(format, ...) FT_DEBUG_PRINT_I(FI2C_DEBUG_TAG, format, ##__VA_ARGS__)
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#define FI2C_DEBUG(format, ...) FT_DEBUG_PRINT_D(FI2C_DEBUG_TAG, format, ##__VA_ARGS__)
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#define FI2C_TIMEOUT 500
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/************************** Function Prototypes ******************************/
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/************************** Variable Definitions *****************************/
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/*****************************************************************************/
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/**
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* @name: FI2cMasterStartTrans
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* @msg: I2C主机开始传输
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* @return {*}
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* @param {FI2c} *instance_p, I2C驱动实例数据
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* @param {u32} mem_addr, 从机的片内偏移
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* @param {u8} mem_byte_len, Size of internal memory address 1->8bit ~ 4->32bit
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* @param {u8} flag ,for cmd reg STOP,RESTART.
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*/
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static FError FI2cMasterStartTrans(FI2c *instance_p, u32 mem_addr, u8 mem_byte_len, u16 flag)
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{
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FASSERT(instance_p);
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uintptr base_addr = instance_p->config.base_addr;
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FError ret = FI2C_SUCCESS;
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u32 addr_len = mem_byte_len;
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ret = FI2cWaitBusBusy(base_addr);
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if (FI2C_SUCCESS != ret)
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return ret;
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ret = FI2cSetTar(base_addr, instance_p->config.slave_addr); /* 设备地址 */
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if (FI2C_SUCCESS != ret)
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return ret;
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while (addr_len)
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{
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ret = FI2cWaitStatus(base_addr, FI2C_STATUS_TFNF);
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if (FI2C_SUCCESS != ret)
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break;
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if (FI2C_GET_STATUS(base_addr) & FI2C_STATUS_TFNF)
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{
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addr_len--;
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if (addr_len != 0)
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{
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FI2C_WRITE_REG32(base_addr, FI2C_DATA_CMD_OFFSET,
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(mem_addr >> (addr_len * BITS_PER_BYTE)) & FI2C_DATA_MASK); /* word address */
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}
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else
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{
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FI2C_WRITE_REG32(base_addr, FI2C_DATA_CMD_OFFSET,
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((mem_addr >> (addr_len * BITS_PER_BYTE)) & FI2C_DATA_MASK) + flag); /* word address */
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}
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}
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}
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return ret;
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}
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/**
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* @name: FI2cMasterStopTrans
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* @msg: I2C主机结束传输
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* @return {*}
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* @param {FI2c} *instance_p, I2C驱动实例数据
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*/
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static FError FI2cMasterStopTrans(FI2c *instance_p)
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{
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FASSERT(instance_p);
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FError ret = FI2C_SUCCESS;
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uintptr base_addr = instance_p->config.base_addr;
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u32 reg_val;
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u32 timeout = 0;
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FI2C_INFO("GET MASTER STOP, stat: 0x%x, 0x%x", FI2C_READ_INTR_STAT(base_addr),
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FI2C_READ_RAW_INTR_STAT(base_addr));
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while (TRUE)
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{
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if (FI2C_READ_RAW_INTR_STAT(base_addr) & FI2C_INTR_STOP_DET)
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{
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reg_val = FI2C_READ_REG32(base_addr, FI2C_CLR_STOP_DET_OFFSET); /* read to clr intr status */
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break;
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}
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else if (FI2C_TIMEOUT < ++timeout)
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{
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break; /* wait timeout, but no error code ret */
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}
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}
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ret = FI2cWaitBusBusy(base_addr);
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if (FI2C_SUCCESS == ret)
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ret = FI2cFlushRxFifo(base_addr);
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return ret;
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}
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/**
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* @name: FI2cMasterReadPoll
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* @msg: I2C主机读，阻塞直到完成读操作或失败
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* @return {FError *} 返回错误码
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* @param {FI2c} *instance_p I2C驱动实例数据
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* @param {u32} mem_addr 从机的内部偏移地址
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* @param {u8} mem_byte_len, Size of internal memory address 1->8bit ~ 4->32bit
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* @param {u8} *buf_p 读目的缓冲区
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* @param {int} buf_len 读目的缓冲区长度
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*/
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FError FI2cMasterReadPoll(FI2c *instance_p, u32 mem_addr, u8 mem_byte_len, u8 *buf_p, u32 buf_len)
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{
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FError ret = FI2C_SUCCESS;
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FASSERT(instance_p);
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u32 mask;
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u32 reg_val;
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u32 tx_len = buf_len;
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u32 rx_len = buf_len;
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u32 rx_limit, tx_limit;
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u32 trans_timeout = 0;
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uintptr base_addr = instance_p->config.base_addr;
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if (FT_COMPONENT_IS_READY != instance_p->is_ready)
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{
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FI2C_ERROR("i2c driver not ready");
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return FI2C_ERR_NOT_READY;
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}
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if (FI2C_MASTER != instance_p->config.work_mode)
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{
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FI2C_ERROR("i2c work mode shall be master");
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return FI2C_ERR_INVAL_STATE;
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}
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ret = FI2cMasterStartTrans(instance_p, mem_addr, mem_byte_len, FI2C_DATA_CMD_WRITE);
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if (FI2C_SUCCESS != ret)
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return ret;
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/*for trigger rx intr*/
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while (tx_len > 0 || rx_len > 0)
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{
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/* code */
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rx_limit = FI2C_IIC_FIFO_MAX_LV - FI2C_READ_REG32(base_addr, FI2C_RXFLR_OFFSET);
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tx_limit = FI2C_IIC_FIFO_MAX_LV - FI2C_READ_REG32(base_addr, FI2C_TXFLR_OFFSET);
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while (tx_len > 0 & rx_limit > 0 & tx_limit > 0)
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{
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/* code */
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if (tx_len == 1)
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{
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reg_val = FI2C_DATA_CMD_READ | FI2C_DATA_CMD_STOP;
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FI2C_WRITE_REG32(instance_p->config.base_addr, FI2C_DATA_CMD_OFFSET, reg_val);
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}
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else
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{
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reg_val = FI2C_DATA_CMD_READ;
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FI2C_WRITE_REG32(instance_p->config.base_addr, FI2C_DATA_CMD_OFFSET, reg_val);
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}
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tx_len--;
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rx_limit--;
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tx_limit--;
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}
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u8 rx_tem = FI2C_READ_REG32(base_addr, FI2C_RXFLR_OFFSET);
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while (rx_tem > 0 & rx_len > 0)
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{
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/* code */
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if (FI2C_GET_STATUS(base_addr) & FI2C_STATUS_RFNE)
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{
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/* trans one byte */
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*buf_p++ = FI2C_READ_DATA(base_addr);
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rx_len--;
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rx_tem--;
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trans_timeout = 0;
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}
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else if (FI2C_TIMEOUT < (++trans_timeout))
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{
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ret = FI2C_ERR_TIMEOUT;
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FI2C_ERROR("timeout in i2c master read");
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break;
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}
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}
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}
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if (FI2C_SUCCESS == ret)
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{
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ret = FI2cMasterStopTrans(instance_p);
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}
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return ret;
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}
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/**
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* @name: FI2cMasterWritePoll
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* @msg: I2C主机写，阻塞直到完成写操作或失败
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* @return {FError *} 返回错误码
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* @param {FI2c} *instance_p I2C驱动实例数据
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* @param {u32} mem_addr 从机的内部偏移地址
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* @param {u8} mem_byte_len, Size of internal memory address 1->8bit ~ 4->32bit
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* @param {u8} *buf_p 写源缓冲区
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* @param {size_t} buf_len 写源缓冲区长度
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*/
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FError FI2cMasterWritePoll(FI2c *instance_p, u32 mem_addr, u8 mem_byte_len, const u8 *buf_p, u32 buf_len)
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{
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FASSERT(instance_p && buf_p);
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FError ret = FI2C_SUCCESS;
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u32 buf_idx = buf_len;
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u32 tx_limit;
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uintptr base_addr = instance_p->config.base_addr;
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u32 reg_val;
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u32 trans_timeout = 0;
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if (FT_COMPONENT_IS_READY != instance_p->is_ready)
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{
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FI2C_ERROR("i2c driver not ready");
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return FI2C_ERR_NOT_READY;
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}
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if (FI2C_MASTER != instance_p->config.work_mode)
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{
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FI2C_ERROR("i2c work mode shall be master");
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return FI2C_ERR_INVAL_STATE;
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}
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ret = FI2cMasterStartTrans(instance_p, mem_addr, mem_byte_len, FI2C_DATA_CMD_WRITE);
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if (FI2C_SUCCESS != ret)
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return ret;
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while (buf_idx)
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{
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tx_limit = FI2C_IIC_FIFO_MAX_LV - FI2C_READ_REG32(base_addr, FI2C_TXFLR_OFFSET);
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while (tx_limit > 0 & buf_idx > 0)
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{
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if (FI2C_GET_STATUS(base_addr) & FI2C_STATUS_TFNF)
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{
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if (1 == buf_idx)
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{
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reg_val = (FI2C_DATA_MASK & *buf_p) |
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FI2C_DATA_CMD_WRITE |
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FI2C_DATA_CMD_STOP;
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FI2C_INFO("Write Stop Singal");
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}
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else
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{
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reg_val = (FI2C_DATA_MASK & *buf_p) |
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FI2C_DATA_CMD_WRITE;
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}
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buf_idx--;
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tx_limit--;
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FI2C_WRITE_REG32(base_addr, FI2C_DATA_CMD_OFFSET, reg_val);
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buf_p++;
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trans_timeout = 0;
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}
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else if (FI2C_TIMEOUT < ++trans_timeout)
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{
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ret = FI2C_ERR_TIMEOUT;
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FI2C_ERROR("timeout in i2c master write");
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break;
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}
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}
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}
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if (FI2C_SUCCESS == ret)
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{
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ret = FI2cMasterStopTrans(instance_p);
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}
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return ret;
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}
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/**
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* @name: FI2cMasterReadIntr
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* @msg: I2C主机读，中断完成读操作或失败
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* @return {FError *} 返回错误码
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* @param {FI2c} *instance_p I2C驱动实例数据
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* @param {u32} mem_addr 从机的内部偏移地址
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* @param {u8} mem_byte_len, Size of internal memory address 1->8bit ~ 4->32bit
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* @param {u8} *buf_p 读目的缓冲区
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* @param {int} buf_len 读目的缓冲区长度
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*/
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FError FI2cMasterReadIntr(FI2c *instance_p, u32 mem_addr, u8 mem_byte_len, u8 *buf_p, u32 buf_len)
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{
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FError ret = FI2C_SUCCESS;
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FASSERT(instance_p);
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u32 mask;
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u32 reg_val;
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u32 trans_timeout;
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if (FT_COMPONENT_IS_READY != instance_p->is_ready)
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{
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FI2C_ERROR("i2c driver not ready");
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return FI2C_ERR_NOT_READY;
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}
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if (FI2C_MASTER != instance_p->config.work_mode)
|
|||
|
|
{
|
|||
|
|
FI2C_ERROR("i2c work mode shall be master");
|
|||
|
|
return FI2C_ERR_INVAL_STATE;
|
|||
|
|
}
|
|||
|
|
|
|||
|
|
while (instance_p->status != STATUS_IDLE)
|
|||
|
|
{
|
|||
|
|
/* code */
|
|||
|
|
fsleep_millisec(1);
|
|||
|
|
if (FI2C_TIMEOUT < (++trans_timeout))
|
|||
|
|
{
|
|||
|
|
ret = FI2C_ERR_TIMEOUT;
|
|||
|
|
FI2C_ERROR("timeout in i2c master read intr.");
|
|||
|
|
break;
|
|||
|
|
}
|
|||
|
|
}
|
|||
|
|
instance_p->rxframe.data_buff = buf_p;
|
|||
|
|
instance_p->rxframe.rx_total_num = buf_len;
|
|||
|
|
instance_p->txframe.tx_total_num = buf_len;
|
|||
|
|
instance_p->rxframe.rx_cnt = 0;
|
|||
|
|
FI2C_SET_RX_TL(instance_p->config.base_addr, 0);/* 0 表示接收缓冲区大于等于 1 时触发中断 */
|
|||
|
|
ret = FI2cMasterStartTrans(instance_p, mem_addr, mem_byte_len, FI2C_DATA_CMD_WRITE);
|
|||
|
|
instance_p->status = STATUS_READ_IN_PROGRESS;
|
|||
|
|
if (FI2C_SUCCESS != ret)
|
|||
|
|
return ret;
|
|||
|
|
mask = FI2C_GET_INTRRUPT_MASK(instance_p->config.base_addr);
|
|||
|
|
mask |= FI2C_INTR_MASTER_RD_MASK;
|
|||
|
|
ret = FI2cMasterSetupIntr(instance_p, mask);
|
|||
|
|
if (FI2C_SUCCESS != ret)
|
|||
|
|
return ret;
|
|||
|
|
return ret;
|
|||
|
|
}
|
|||
|
|
|
|||
|
|
/**
|
|||
|
|
* @name: FI2cMasterWriteIntr
|
|||
|
|
* @msg: I2C主机写，中断写操作或失败
|
|||
|
|
* @return {FError *} 返回错误码
|
|||
|
|
* @param {FI2c} *instance_p I2C驱动实例数据
|
|||
|
|
* @param {u32} mem_addr 从机的内部偏移地址
|
|||
|
|
* @param {u8} mem_byte_len, Size of internal memory address 1->8bit ~ 4->32bit
|
|||
|
|
* @param {u8} *buf_p 写源缓冲区
|
|||
|
|
* @param {size_t} buf_len 写源缓冲区长度
|
|||
|
|
*/
|
|||
|
|
FError FI2cMasterWriteIntr(FI2c *instance_p, u32 mem_addr, u8 mem_byte_len, const u8 *buf_p, u32 buf_len)
|
|||
|
|
{
|
|||
|
|
FError ret = FI2C_SUCCESS;
|
|||
|
|
FASSERT(instance_p);
|
|||
|
|
u32 mask;
|
|||
|
|
u32 trans_timeout = 0;
|
|||
|
|
if (FT_COMPONENT_IS_READY != instance_p->is_ready)
|
|||
|
|
{
|
|||
|
|
FI2C_ERROR("i2c driver not ready");
|
|||
|
|
return FI2C_ERR_NOT_READY;
|
|||
|
|
}
|
|||
|
|
|
|||
|
|
if (FI2C_MASTER != instance_p->config.work_mode)
|
|||
|
|
{
|
|||
|
|
FI2C_ERROR("i2c work mode shall be master");
|
|||
|
|
return FI2C_ERR_INVAL_STATE;
|
|||
|
|
}
|
|||
|
|
while (instance_p->status != STATUS_IDLE)
|
|||
|
|
{
|
|||
|
|
/* code */
|
|||
|
|
fsleep_millisec(1);
|
|||
|
|
if (FI2C_TIMEOUT < (++trans_timeout))
|
|||
|
|
{
|
|||
|
|
ret = FI2C_ERR_TIMEOUT;
|
|||
|
|
FI2C_ERROR("timeout in i2c master write intr.");
|
|||
|
|
break;
|
|||
|
|
}
|
|||
|
|
}
|
|||
|
|
instance_p->txframe.data_buff = buf_p;
|
|||
|
|
instance_p->txframe.tx_total_num = buf_len;
|
|||
|
|
instance_p->txframe.tx_cnt = 0;
|
|||
|
|
ret = FI2cMasterStartTrans(instance_p, mem_addr, mem_byte_len, FI2C_DATA_CMD_WRITE);
|
|||
|
|
if (FI2C_SUCCESS != ret)
|
|||
|
|
return ret;
|
|||
|
|
instance_p->status = STATUS_WRITE_IN_PROGRESS;
|
|||
|
|
mask = FI2C_GET_INTRRUPT_MASK(instance_p->config.base_addr);
|
|||
|
|
mask |= FI2C_INTR_MASTER_WR_MASK;
|
|||
|
|
ret = FI2cMasterSetupIntr(instance_p, mask);
|
|||
|
|
if (FI2C_SUCCESS != ret)
|
|||
|
|
return ret;
|
|||
|
|
return ret;
|
|||
|
|
}
|