2021-05-18 09:57:25 +08:00
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/*
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2022-12-03 12:07:44 +08:00
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* Copyright (c) 2006-2020, RT-Thread Development Team
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2021-05-18 09:57:25 +08:00
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2021-01-30 lizhirui first version
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*/
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#include <rthw.h>
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#include <rtthread.h>
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#include <rtdevice.h>
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#include "board.h"
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#include "tick.h"
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#include "drv_uart.h"
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#include "encoding.h"
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#include "stack.h"
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2022-12-03 12:07:44 +08:00
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#include "sbi.h"
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2021-05-18 09:57:25 +08:00
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#include "riscv.h"
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2021-05-21 17:03:30 +08:00
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#include "plic.h"
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2022-12-03 12:07:44 +08:00
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#include "stack.h"
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2022-12-16 18:38:28 +08:00
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#ifdef RT_USING_SMART
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2022-12-03 12:07:44 +08:00
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#include "riscv_mmu.h"
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#include "mmu.h"
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#include "page.h"
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#include "lwp_arch.h"
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rt_region_t init_page_region = {(rt_size_t)RT_HW_PAGE_START, (rt_size_t)RT_HW_PAGE_END};
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rt_mmu_info mmu_info;
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extern size_t MMUTable[];
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struct mem_desc platform_mem_desc[] = {
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{KERNEL_VADDR_START, KERNEL_VADDR_START + 0x10000000 - 1, KERNEL_VADDR_START + PV_OFFSET, NORMAL_MEM},
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};
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#define NUM_MEM_DESC (sizeof(platform_mem_desc) / sizeof(platform_mem_desc[0]))
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2022-05-27 23:31:35 +08:00
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#endif
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2021-05-18 09:57:25 +08:00
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2022-12-03 12:07:44 +08:00
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void init_bss(void)
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{
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unsigned int *dst;
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dst = &__bss_start;
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while (dst < &__bss_end)
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{
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*dst++ = 0;
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}
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}
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2021-05-18 09:57:25 +08:00
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void primary_cpu_entry(void)
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{
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extern void entry(void);
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/* disable global interrupt */
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2022-12-03 12:07:44 +08:00
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init_bss();
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2021-05-18 09:57:25 +08:00
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rt_hw_interrupt_disable();
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entry();
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}
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2022-12-03 12:07:44 +08:00
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#define IOREMAP_SIZE (1ul << 30)
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void rt_hw_board_init(void)
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{
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#ifdef RT_USING_SMART
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rt_page_init(init_page_region);
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/* init mmu_info structure */
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rt_hw_mmu_map_init(&mmu_info, (void *)(USER_VADDR_START - IOREMAP_SIZE), IOREMAP_SIZE, (rt_size_t *)MMUTable, 0);
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// this API is reserved currently since PLIC etc had not been porting completely to MMU version
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rt_hw_mmu_kernel_map_init(&mmu_info, 0x00000000UL, 0x80000000);
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/* setup region, and enable MMU */
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rt_hw_mmu_setup(&mmu_info, platform_mem_desc, NUM_MEM_DESC);
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#endif
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2021-05-18 09:57:25 +08:00
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2022-01-08 23:29:41 +08:00
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#ifdef RT_USING_HEAP
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/* initialize memory system */
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rt_system_heap_init(RT_HW_HEAP_BEGIN, RT_HW_HEAP_END);
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#endif
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2022-12-03 12:07:44 +08:00
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plic_init();
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rt_hw_interrupt_init();
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rt_hw_uart_init();
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#ifdef RT_USING_CONSOLE
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2022-01-08 23:29:41 +08:00
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/* set console device */
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rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
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#endif /* RT_USING_CONSOLE */
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2021-05-18 09:57:25 +08:00
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2021-05-21 17:03:30 +08:00
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rt_hw_tick_init();
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2021-05-21 18:39:41 +08:00
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2022-01-08 23:29:41 +08:00
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#ifdef RT_USING_COMPONENTS_INIT
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rt_components_board_init();
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#endif
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2022-12-03 12:07:44 +08:00
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#ifdef RT_USING_HEAP
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rt_kprintf("heap: [0x%08x - 0x%08x]\n", (rt_ubase_t)RT_HW_HEAP_BEGIN, (rt_ubase_t)RT_HW_HEAP_END);
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#endif /* RT_USING_HEAP */
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2021-05-18 09:57:25 +08:00
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}
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2022-12-03 12:07:44 +08:00
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void rt_hw_cpu_reset(void)
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{
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2021-05-18 18:58:39 +08:00
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sbi_shutdown();
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2022-12-03 12:07:44 +08:00
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while (1)
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;
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2021-05-18 09:57:25 +08:00
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}
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2022-12-03 12:07:44 +08:00
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MSH_CMD_EXPORT_ALIAS(rt_hw_cpu_reset, reboot, reset machine);
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