696 lines
20 KiB
C
696 lines
20 KiB
C
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/*
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* Copyright (c) 2006-2022, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2022-03-02 FMD-AE first version
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*/
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#include "board.h"
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#include "drv_usart.h"
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#include "drv_config.h"
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#ifdef RT_USING_SERIAL
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//#define DRV_DEBUG
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#define LOG_TAG "drv.usart"
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#include <drv_log.h>
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#if !defined(BSP_USING_UART1) && !defined(BSP_USING_UART2)
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#error "Please define at least one BSP_USING_UARTx"
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/* this driver can be disabled at menuconfig -> RT-Thread Components -> Device Drivers */
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#endif
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#ifdef RT_SERIAL_USING_DMA
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static void ft32_dma_config(struct rt_serial_device *serial, rt_ubase_t flag);
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#endif
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enum
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{
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#ifdef BSP_USING_UART1
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UART1_INDEX,
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#endif
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#ifdef BSP_USING_UART2
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UART2_INDEX,
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#endif
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};
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static struct ft32_uart_config uart_config[] =
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{
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#ifdef BSP_USING_UART1
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UART1_CONFIG,
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#endif
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#ifdef BSP_USING_UART2
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UART2_CONFIG,
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#endif
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};
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static struct ft32_uart uart_obj[sizeof(uart_config) / sizeof(uart_config[0])] = {0};
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void UART_MspInit(USART_TypeDef *USARTx)
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{
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GPIO_InitTypeDef GPIO_InitStruct;
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if (USARTx == USART1)
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{
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RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOA, ENABLE);
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RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE);
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/*GPIO INIT*/
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GPIO_InitStruct.GPIO_Pin = GPIO_Pin_9 | GPIO_Pin_10;
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GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AF;
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GPIO_InitStruct.GPIO_Speed = GPIO_Speed_50MHz;
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GPIO_InitStruct.GPIO_OType = GPIO_OType_PP;
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GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_NOPULL;
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GPIO_Init(GPIOA, &GPIO_InitStruct);
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GPIO_PinAFConfig(GPIOA, GPIO_PinSource9, GPIO_AF_1);
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GPIO_PinAFConfig(GPIOA, GPIO_PinSource10, GPIO_AF_1);
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/* USART1 interrupt Init */
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NVIC_SetPriority(USART1_IRQn, 5);
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NVIC_EnableIRQ(USART1_IRQn);
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}
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else if (USARTx == USART2)
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{
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RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOA, ENABLE);
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RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE);
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/*GPIO INIT*/
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GPIO_InitStruct.GPIO_Pin = GPIO_Pin_2 | GPIO_Pin_3;
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GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AF;
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GPIO_InitStruct.GPIO_Speed = GPIO_Speed_50MHz;
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GPIO_InitStruct.GPIO_OType = GPIO_OType_PP;
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GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_NOPULL;
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GPIO_Init(GPIOA, &GPIO_InitStruct);
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GPIO_PinAFConfig(GPIOA, GPIO_PinSource2, GPIO_AF_1);
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GPIO_PinAFConfig(GPIOA, GPIO_PinSource3, GPIO_AF_1);
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/* USART2 interrupt Init */
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NVIC_SetPriority(USART2_IRQn, 5);
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NVIC_EnableIRQ(USART2_IRQn);
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}
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}
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static rt_err_t ft32_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
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{
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struct ft32_uart *uart;
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RT_ASSERT(serial != RT_NULL);
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RT_ASSERT(cfg != RT_NULL);
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uart = rt_container_of(serial, struct ft32_uart, serial);
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uart->Init.USART_BaudRate = cfg->baud_rate;
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uart->Init.USART_Mode = USART_Mode_Tx | USART_Mode_Rx;
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switch (cfg->flowcontrol)
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{
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case RT_SERIAL_FLOWCONTROL_NONE:
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uart->Init.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
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break;
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case RT_SERIAL_FLOWCONTROL_CTSRTS:
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uart->Init.USART_HardwareFlowControl = USART_HardwareFlowControl_RTS_CTS;
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break;
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default:
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uart->Init.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
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break;
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}
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switch (cfg->data_bits)
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{
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case DATA_BITS_8:
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if (cfg->parity == PARITY_ODD || cfg->parity == PARITY_EVEN)
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uart->Init.USART_WordLength = USART_WordLength_9b;
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else
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uart->Init.USART_WordLength = USART_WordLength_8b;
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break;
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case DATA_BITS_9:
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uart->Init.USART_WordLength = USART_WordLength_9b;
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break;
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default:
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uart->Init.USART_WordLength = USART_WordLength_8b;
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break;
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}
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switch (cfg->stop_bits)
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{
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case STOP_BITS_1:
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uart->Init.USART_StopBits = USART_StopBits_1;
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break;
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case STOP_BITS_2:
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uart->Init.USART_StopBits = USART_StopBits_2;
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break;
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default:
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uart->Init.USART_StopBits = USART_StopBits_1;
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break;
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}
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switch (cfg->parity)
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{
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case PARITY_NONE:
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uart->Init.USART_Parity = USART_Parity_No;
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break;
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case PARITY_ODD:
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uart->Init.USART_Parity = USART_Parity_Odd;
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break;
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case PARITY_EVEN:
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uart->Init.USART_Parity = USART_Parity_Even;
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break;
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default:
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uart->Init.USART_Parity = USART_Parity_No;
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break;
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}
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#ifdef RT_SERIAL_USING_DMA
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uart->dma_rx.last_index = 0;
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#endif
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UART_MspInit(uart->config->Instance);
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USART_Init(uart->config->Instance, &(uart->Init));
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USART_Cmd(uart->config->Instance, ENABLE);
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return RT_EOK;
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}
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static rt_err_t ft32_control(struct rt_serial_device *serial, int cmd, void *arg)
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{
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struct ft32_uart *uart;
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#ifdef RT_SERIAL_USING_DMA
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rt_ubase_t ctrl_arg = (rt_ubase_t)arg;
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#endif
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RT_ASSERT(serial != RT_NULL);
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uart = rt_container_of(serial, struct ft32_uart, serial);
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switch (cmd)
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{
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/* disable interrupt */
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case RT_DEVICE_CTRL_CLR_INT:
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/* disable rx irq */
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NVIC_DisableIRQ(uart->config->irq_type);
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/* disable interrupt */
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USART_ITConfig(uart->config->Instance, USART_IT_RXNE, DISABLE);
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#ifdef RT_SERIAL_USING_DMA
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/* disable DMA */
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if (ctrl_arg == RT_DEVICE_FLAG_DMA_RX)
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{
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NVIC_DisableIRQ(uart->config->dma_rx->dma_irq);
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DMA_DeInit(uart->dma_rx.Instance);
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}
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else if (ctrl_arg == RT_DEVICE_FLAG_DMA_TX)
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{
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NVIC_DisableIRQ(uart->config->dma_tx->dma_irq);
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DMA_DeInit(uart->dma_rx.Instance);
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}
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#endif
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break;
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/* enable interrupt */
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case RT_DEVICE_CTRL_SET_INT:
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/* enable rx irq */
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NVIC_SetPriority(uart->config->irq_type, 1);
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NVIC_EnableIRQ(uart->config->irq_type);
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/* enable interrupt */
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USART_ITConfig(uart->config->Instance, USART_IT_RXNE, ENABLE);
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break;
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#ifdef RT_SERIAL_USING_DMA
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case RT_DEVICE_CTRL_CONFIG:
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ft32_dma_config(serial, ctrl_arg);
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break;
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#endif
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case RT_DEVICE_CTRL_CLOSE:
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USART_DeInit(uart->config->Instance);
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break;
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}
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return RT_EOK;
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}
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rt_uint32_t ft32_uart_get_mask(rt_uint32_t word_length, rt_uint32_t parity)
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{
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rt_uint32_t mask;
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if (word_length == USART_WordLength_8b)
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{
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if (parity == USART_Parity_No)
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{
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mask = 0x00FFU ;
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}
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else
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{
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mask = 0x007FU ;
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}
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}
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else if (word_length == USART_WordLength_9b)
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{
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if (parity == USART_Parity_No)
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{
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mask = 0x01FFU ;
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}
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else
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{
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mask = 0x00FFU ;
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}
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}
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else if (word_length == USART_WordLength_7b)
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{
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if (parity == USART_Parity_No)
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{
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mask = 0x007FU ;
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}
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else
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{
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mask = 0x003FU ;
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}
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}
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else
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{
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mask = 0x0000U;
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}
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return mask;
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}
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static int ft32_putc(struct rt_serial_device *serial, char c)
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{
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struct ft32_uart *uart;
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RT_ASSERT(serial != RT_NULL);
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uart = rt_container_of(serial, struct ft32_uart, serial);
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UART_INSTANCE_CLEAR_FUNCTION(uart->config->Instance, USART_FLAG_TC);
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#if defined(SOC_SERIES_FT32F0)
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uart->config->Instance->TDR = c;
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#else
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uart->config->Instance->DR = c;
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#endif
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while (USART_GetFlagStatus(uart->config->Instance, USART_FLAG_TC) == RESET);
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return 1;
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}
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static int ft32_getc(struct rt_serial_device *serial)
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{
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int ch;
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struct ft32_uart *uart;
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RT_ASSERT(serial != RT_NULL);
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uart = rt_container_of(serial, struct ft32_uart, serial);
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ch = -1;
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if (USART_GetFlagStatus(uart->config->Instance, USART_FLAG_RXNE) != RESET)
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{
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#if defined(SOC_SERIES_FT32F0)
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ch = uart->config->Instance->RDR & ft32_uart_get_mask(uart->Init.USART_WordLength, uart->Init.USART_Parity);
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#else
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ch = uart->config->Instance->DR & ft32_uart_get_mask(uart->Init.USART_WordLength, uart->Init.USART_Parity);
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#endif
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}
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return ch;
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}
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static rt_size_t ft32_dma_transmit(struct rt_serial_device *serial, rt_uint8_t *buf, rt_size_t size, int direction)
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{
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RT_ASSERT(serial != RT_NULL);
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RT_ASSERT(buf != RT_NULL);
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if (size == 0)
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{
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return 0;
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}
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if (RT_SERIAL_DMA_TX == direction)
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{
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return size;
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}
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return 0;
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}
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/**
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* Uart common interrupt process. This need add to uart ISR.
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*
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* @param serial serial device
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*/
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static void uart_isr(struct rt_serial_device *serial)
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{
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struct ft32_uart *uart;
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#ifdef RT_SERIAL_USING_DMA
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rt_size_t recv_total_index, recv_len;
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rt_base_t level;
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#endif
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RT_ASSERT(serial != RT_NULL);
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uart = rt_container_of(serial, struct ft32_uart, serial);
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/* UART in mode Receiver -------------------------------------------------*/
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if (USART_GetFlagStatus(uart->config->Instance, USART_FLAG_RXNE) != RESET)
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{
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rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
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}
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#ifdef RT_SERIAL_USING_DMA
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else if ((uart->uart_dma_flag) && (USART_GetFlagStatus(uart->config->Instance, USART_FLAG_RXNE) != RESET))
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{
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level = rt_hw_interrupt_disable();
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recv_total_index = serial->config.bufsz - DMA_GetCurrDataCounter(&(uart->dma_rx.Instance));
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recv_len = recv_total_index - uart->dma_rx.last_index;
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uart->dma_rx.last_index = recv_total_index;
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rt_hw_interrupt_enable(level);
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if (recv_len)
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{
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rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_DMADONE | (recv_len << 8));
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}
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USART_ClearFlag(uart->config->Instance, USART_IT_IDLE);
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}
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else if (USART_GetFlagStatus(uart->config->Instance, USART_FLAG_TC) != RESET))
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{
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if ((serial->parent.open_flag & RT_DEVICE_FLAG_DMA_TX) != 0)
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{
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}
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UART_INSTANCE_CLEAR_FUNCTION(uart->config->Instance, USART_FLAG_TC);
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}
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#endif
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else
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{
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if (USART_GetFlagStatus(uart->config->Instance, USART_FLAG_ORE) != RESET)
|
||
|
|
{
|
||
|
|
USART_ClearFlag(uart->config->Instance, USART_FLAG_ORE);
|
||
|
|
}
|
||
|
|
if (USART_GetFlagStatus(uart->config->Instance, USART_FLAG_NE) != RESET)
|
||
|
|
{
|
||
|
|
USART_ClearFlag(uart->config->Instance, USART_FLAG_NE);
|
||
|
|
}
|
||
|
|
if (USART_GetFlagStatus(uart->config->Instance, USART_FLAG_FE) != RESET)
|
||
|
|
{
|
||
|
|
USART_ClearFlag(uart->config->Instance, USART_FLAG_FE);
|
||
|
|
}
|
||
|
|
if (USART_GetFlagStatus(uart->config->Instance, USART_FLAG_PE) != RESET)
|
||
|
|
{
|
||
|
|
USART_ClearFlag(uart->config->Instance, USART_FLAG_PE);
|
||
|
|
}
|
||
|
|
#if !defined(SOC_SERIES_FT32F0)
|
||
|
|
if (USART_GetFlagStatus(uart->config->Instance, USART_FLAG_LBD) != RESET)
|
||
|
|
{
|
||
|
|
UART_INSTANCE_CLEAR_FUNCTION(uart->config->Instance, USART_FLAG_LBD);
|
||
|
|
}
|
||
|
|
#endif
|
||
|
|
if (USART_GetFlagStatus(uart->config->Instance, USART_FLAG_CTS) != RESET)
|
||
|
|
{
|
||
|
|
UART_INSTANCE_CLEAR_FUNCTION(uart->config->Instance, USART_FLAG_CTS);
|
||
|
|
}
|
||
|
|
if (USART_GetFlagStatus(uart->config->Instance, USART_FLAG_TXE) != RESET)
|
||
|
|
{
|
||
|
|
UART_INSTANCE_CLEAR_FUNCTION(uart->config->Instance, USART_FLAG_TXE);
|
||
|
|
}
|
||
|
|
if (USART_GetFlagStatus(uart->config->Instance, USART_FLAG_TC) != RESET)
|
||
|
|
{
|
||
|
|
UART_INSTANCE_CLEAR_FUNCTION(uart->config->Instance, USART_FLAG_TC);
|
||
|
|
}
|
||
|
|
if (USART_GetFlagStatus(uart->config->Instance, USART_FLAG_RXNE) != RESET)
|
||
|
|
{
|
||
|
|
UART_INSTANCE_CLEAR_FUNCTION(uart->config->Instance, USART_FLAG_RXNE);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
#ifdef RT_SERIAL_USING_DMA
|
||
|
|
static void dma_isr(struct rt_serial_device *serial)
|
||
|
|
{
|
||
|
|
struct ft32_uart *uart;
|
||
|
|
rt_size_t recv_total_index, recv_len;
|
||
|
|
rt_base_t level;
|
||
|
|
|
||
|
|
RT_ASSERT(serial != RT_NULL);
|
||
|
|
uart = rt_container_of(serial, struct ft32_uart, serial);
|
||
|
|
|
||
|
|
if ((DMA_GetITStatus(uart->dma_rx.Instance, DMA_IT_TC) != RESET) ||
|
||
|
|
(DMA_GetITStatus(uart->dma_rx.Instance, DMA_IT_HT) != RESET))
|
||
|
|
{
|
||
|
|
level = rt_hw_interrupt_disable();
|
||
|
|
recv_total_index = serial->config.bufsz - DMA_GetCurrDataCounter(uart->dma_rx.Instance);
|
||
|
|
if (recv_total_index == 0)
|
||
|
|
{
|
||
|
|
recv_len = serial->config.bufsz - uart->dma_rx.last_index;
|
||
|
|
}
|
||
|
|
else
|
||
|
|
{
|
||
|
|
recv_len = recv_total_index - uart->dma_rx.last_index;
|
||
|
|
}
|
||
|
|
uart->dma_rx.last_index = recv_total_index;
|
||
|
|
rt_hw_interrupt_enable(level);
|
||
|
|
|
||
|
|
if (recv_len)
|
||
|
|
{
|
||
|
|
rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_DMADONE | (recv_len << 8));
|
||
|
|
}
|
||
|
|
}
|
||
|
|
}
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#if defined(BSP_USING_UART1)
|
||
|
|
void USART1_IRQHandler(void)
|
||
|
|
{
|
||
|
|
/* enter interrupt */
|
||
|
|
rt_interrupt_enter();
|
||
|
|
|
||
|
|
uart_isr(&(uart_obj[UART1_INDEX].serial));
|
||
|
|
|
||
|
|
/* leave interrupt */
|
||
|
|
rt_interrupt_leave();
|
||
|
|
}
|
||
|
|
#if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART1_RX_USING_DMA)
|
||
|
|
void UART1_DMA_RX_IRQHandler(void)
|
||
|
|
{
|
||
|
|
/* enter interrupt */
|
||
|
|
rt_interrupt_enter();
|
||
|
|
|
||
|
|
__DMA_IRQHandler(uart_obj[UART1_INDEX].dma_rx.Instance);
|
||
|
|
|
||
|
|
/* leave interrupt */
|
||
|
|
rt_interrupt_leave();
|
||
|
|
}
|
||
|
|
#endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART1_RX_USING_DMA) */
|
||
|
|
#if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART1_TX_USING_DMA)
|
||
|
|
void UART1_DMA_TX_IRQHandler(void)
|
||
|
|
{
|
||
|
|
/* enter interrupt */
|
||
|
|
rt_interrupt_enter();
|
||
|
|
|
||
|
|
__DMA_IRQHandler(uart_obj[UART1_INDEX].dma_tx.Instance);
|
||
|
|
|
||
|
|
/* leave interrupt */
|
||
|
|
rt_interrupt_leave();
|
||
|
|
}
|
||
|
|
#endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART1_TX_USING_DMA) */
|
||
|
|
#endif /* BSP_USING_UART1 */
|
||
|
|
|
||
|
|
#if defined(BSP_USING_UART2)
|
||
|
|
void USART2_IRQHandler(void)
|
||
|
|
{
|
||
|
|
/* enter interrupt */
|
||
|
|
rt_interrupt_enter();
|
||
|
|
|
||
|
|
uart_isr(&(uart_obj[UART2_INDEX].serial));
|
||
|
|
|
||
|
|
/* leave interrupt */
|
||
|
|
rt_interrupt_leave();
|
||
|
|
}
|
||
|
|
#if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART2_RX_USING_DMA)
|
||
|
|
void UART2_DMA_RX_IRQHandler(void)
|
||
|
|
{
|
||
|
|
/* enter interrupt */
|
||
|
|
rt_interrupt_enter();
|
||
|
|
|
||
|
|
__DMA_IRQHandler(uart_obj[UART2_INDEX].dma_rx.Instance);
|
||
|
|
|
||
|
|
/* leave interrupt */
|
||
|
|
rt_interrupt_leave();
|
||
|
|
}
|
||
|
|
#endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART2_RX_USING_DMA) */
|
||
|
|
#if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART2_TX_USING_DMA)
|
||
|
|
void UART2_DMA_TX_IRQHandler(void)
|
||
|
|
{
|
||
|
|
/* enter interrupt */
|
||
|
|
rt_interrupt_enter();
|
||
|
|
|
||
|
|
__DMA_IRQHandler(uart_obj[UART2_INDEX].dma_tx.Instance);
|
||
|
|
|
||
|
|
/* leave interrupt */
|
||
|
|
rt_interrupt_leave();
|
||
|
|
}
|
||
|
|
#endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART2_TX_USING_DMA) */
|
||
|
|
#endif /* BSP_USING_UART2 */
|
||
|
|
|
||
|
|
|
||
|
|
static void ft32_uart_get_dma_config(void)
|
||
|
|
{
|
||
|
|
#ifdef BSP_USING_UART1
|
||
|
|
uart_obj[UART1_INDEX].uart_dma_flag = 0;
|
||
|
|
#ifdef BSP_UART1_RX_USING_DMA
|
||
|
|
uart_obj[UART1_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_RX;
|
||
|
|
static struct dma_config uart1_dma_rx = UART1_DMA_RX_CONFIG;
|
||
|
|
uart_config[UART1_INDEX].dma_rx = &uart1_dma_rx;
|
||
|
|
#endif
|
||
|
|
#ifdef BSP_UART1_TX_USING_DMA
|
||
|
|
uart_obj[UART1_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_TX;
|
||
|
|
static struct dma_config uart1_dma_tx = UART1_DMA_TX_CONFIG;
|
||
|
|
uart_config[UART1_INDEX].dma_tx = &uart1_dma_tx;
|
||
|
|
#endif
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#ifdef BSP_USING_UART2
|
||
|
|
uart_obj[UART2_INDEX].uart_dma_flag = 0;
|
||
|
|
#ifdef BSP_UART2_RX_USING_DMA
|
||
|
|
uart_obj[UART2_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_RX;
|
||
|
|
static struct dma_config uart2_dma_rx = UART2_DMA_RX_CONFIG;
|
||
|
|
uart_config[UART2_INDEX].dma_rx = &uart2_dma_rx;
|
||
|
|
#endif
|
||
|
|
#ifdef BSP_UART2_TX_USING_DMA
|
||
|
|
uart_obj[UART2_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_TX;
|
||
|
|
static struct dma_config uart2_dma_tx = UART2_DMA_TX_CONFIG;
|
||
|
|
uart_config[UART2_INDEX].dma_tx = &uart2_dma_tx;
|
||
|
|
#endif
|
||
|
|
#endif
|
||
|
|
}
|
||
|
|
|
||
|
|
#ifdef RT_SERIAL_USING_DMA
|
||
|
|
static void ft32_dma_config(struct rt_serial_device *serial, rt_ubase_t flag)
|
||
|
|
{
|
||
|
|
struct rt_serial_rx_fifo *rx_fifo;
|
||
|
|
|
||
|
|
DMA_InitTypeDef Init;
|
||
|
|
struct dma_config *dma_config;
|
||
|
|
struct ft32_uart *uart;
|
||
|
|
|
||
|
|
RT_ASSERT(serial != RT_NULL);
|
||
|
|
RT_ASSERT(flag == RT_DEVICE_FLAG_DMA_TX || flag == RT_DEVICE_FLAG_DMA_RX);
|
||
|
|
uart = rt_container_of(serial, struct ft32_uart, serial);
|
||
|
|
|
||
|
|
if (RT_DEVICE_FLAG_DMA_RX == flag)
|
||
|
|
{
|
||
|
|
Init = &uart->dma_rx.Init;
|
||
|
|
dma_config = uart->config->dma_rx;
|
||
|
|
}
|
||
|
|
else /* RT_DEVICE_FLAG_DMA_TX == flag */
|
||
|
|
{
|
||
|
|
Init = &uart->dma_tx.Init;
|
||
|
|
dma_config = uart->config->dma_tx;
|
||
|
|
}
|
||
|
|
LOG_D("%s dma config start", uart->config->name);
|
||
|
|
|
||
|
|
{
|
||
|
|
rt_uint32_t tmpreg = 0x00U;
|
||
|
|
#if defined(SOC_SERIES_FT32F0)
|
||
|
|
/* enable DMA clock && Delay after an RCC peripheral clock enabling*/
|
||
|
|
SET_BIT(RCC->AHBENR, dma_config->dma_rcc);
|
||
|
|
tmpreg = READ_BIT(RCC->AHBENR, dma_config->dma_rcc);
|
||
|
|
#endif
|
||
|
|
|
||
|
|
(void)(tmpreg); /* To avoid compiler warnings */
|
||
|
|
}
|
||
|
|
|
||
|
|
if (RT_DEVICE_FLAG_DMA_RX == flag)
|
||
|
|
{
|
||
|
|
}
|
||
|
|
else if (RT_DEVICE_FLAG_DMA_TX == flag)
|
||
|
|
{
|
||
|
|
}
|
||
|
|
|
||
|
|
Init.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
|
||
|
|
Init.MemInc = DMA_MemoryInc_Enable;
|
||
|
|
Init.PeriphDataAlignment = DMA_PeripheralDataSize_Byte;
|
||
|
|
Init.MemDataAlignment = DMA_MemoryDataSize_Byte;
|
||
|
|
|
||
|
|
if (RT_DEVICE_FLAG_DMA_RX == flag)
|
||
|
|
{
|
||
|
|
Init.Direction = DMA_DIR_PeripheralSRC;
|
||
|
|
Init.Mode = DMA_Mode_Circular;
|
||
|
|
}
|
||
|
|
else if (RT_DEVICE_FLAG_DMA_TX == flag)
|
||
|
|
{
|
||
|
|
Init.Direction = DMA_DIR_PeripheralDST;
|
||
|
|
Init.Mode = DMA_Mode_Normal;
|
||
|
|
}
|
||
|
|
|
||
|
|
Init.Priority = DMA_Priority_Medium;
|
||
|
|
DMA_DeInit(dma_config->Instance);
|
||
|
|
DMA_Init(dma_config->Instance);
|
||
|
|
|
||
|
|
/* enable interrupt */
|
||
|
|
if (flag == RT_DEVICE_FLAG_DMA_RX)
|
||
|
|
{
|
||
|
|
rx_fifo = (struct rt_serial_rx_fifo *)serial->serial_rx;
|
||
|
|
/* Start DMA transfer */
|
||
|
|
UART_Receive_DMA(uart->config->Instance, rx_fifo->buffer, serial->config.bufsz);
|
||
|
|
CLEAR_BIT(uart->handle.Instance->CR3, USART_CR3_EIE);
|
||
|
|
USART_ITConfig(uart->config->Instance, USART_IT_IDLE, ENABLE);
|
||
|
|
}
|
||
|
|
|
||
|
|
/* DMA irq should set in DMA TX mode, or HAL_UART_TxCpltCallback function will not be called */
|
||
|
|
NVIC_SetPriority(dma_config->dma_irq, 0, 0);
|
||
|
|
NVIC_EnableIRQ(dma_config->dma_irq);
|
||
|
|
|
||
|
|
NVIC_SetPriority(uart->config->irq_type, 1, 0);
|
||
|
|
NVIC_EnableIRQ(uart->config->irq_type);
|
||
|
|
|
||
|
|
LOG_D("%s dma %s instance: %x", uart->config->name, flag == RT_DEVICE_FLAG_DMA_RX ? "RX" : "TX", DMA_Handle->Instance);
|
||
|
|
LOG_D("%s dma config done", uart->config->name);
|
||
|
|
}
|
||
|
|
|
||
|
|
static void _dma_tx_complete(struct rt_serial_device *serial)
|
||
|
|
{
|
||
|
|
struct ft32_uart *uart;
|
||
|
|
rt_size_t trans_total_index;
|
||
|
|
rt_base_t level;
|
||
|
|
|
||
|
|
RT_ASSERT(serial != RT_NULL);
|
||
|
|
uart = rt_container_of(serial, struct ft32_uart, serial);
|
||
|
|
|
||
|
|
level = rt_hw_interrupt_disable();
|
||
|
|
trans_total_index = DMA_GetCurrDataCounter(uart->dma_tx.Instance);
|
||
|
|
rt_hw_interrupt_enable(level);
|
||
|
|
|
||
|
|
if (trans_total_index == 0)
|
||
|
|
{
|
||
|
|
rt_hw_serial_isr(serial, RT_SERIAL_EVENT_TX_DMADONE);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
|
||
|
|
#endif /* RT_SERIAL_USING_DMA */
|
||
|
|
|
||
|
|
static const struct rt_uart_ops ft32_uart_ops =
|
||
|
|
{
|
||
|
|
.configure = ft32_configure,
|
||
|
|
.control = ft32_control,
|
||
|
|
.putc = ft32_putc,
|
||
|
|
.getc = ft32_getc,
|
||
|
|
.dma_transmit = ft32_dma_transmit
|
||
|
|
};
|
||
|
|
|
||
|
|
int rt_hw_usart_init(void)
|
||
|
|
{
|
||
|
|
rt_size_t obj_num = sizeof(uart_obj) / sizeof(struct ft32_uart);
|
||
|
|
struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
|
||
|
|
rt_err_t result = 0;
|
||
|
|
|
||
|
|
ft32_uart_get_dma_config();
|
||
|
|
|
||
|
|
for (int i = 0; i < obj_num; i++)
|
||
|
|
{
|
||
|
|
/* init UART object */
|
||
|
|
uart_obj[i].config = &uart_config[i];
|
||
|
|
uart_obj[i].serial.ops = &ft32_uart_ops;
|
||
|
|
uart_obj[i].serial.config = config;
|
||
|
|
|
||
|
|
/* register UART device */
|
||
|
|
result = rt_hw_serial_register(&uart_obj[i].serial, uart_obj[i].config->name,
|
||
|
|
RT_DEVICE_FLAG_RDWR
|
||
|
|
| RT_DEVICE_FLAG_INT_RX
|
||
|
|
| RT_DEVICE_FLAG_INT_TX
|
||
|
|
| uart_obj[i].uart_dma_flag
|
||
|
|
, NULL);
|
||
|
|
RT_ASSERT(result == RT_EOK);
|
||
|
|
}
|
||
|
|
|
||
|
|
return result;
|
||
|
|
}
|
||
|
|
|
||
|
|
#endif /* RT_USING_SERIAL */
|