2020-12-10 11:02:26 +08:00
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/*
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2021-01-21 16:08:06 +08:00
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* Copyright (c) 2020-2021, Bluetrum Development Team
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2021-03-11 13:26:54 +08:00
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*
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2020-12-10 11:02:26 +08:00
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2020-11-20 greedyhao first version
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*/
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#include "board.h"
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#include "drv_usart.h"
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2021-08-08 16:31:00 +08:00
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#include "api_huart.h"
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2020-12-10 11:02:26 +08:00
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#ifdef RT_USING_SERIAL
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//#define DRV_DEBUG
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#define LOG_TAG "drv.usart"
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#include <drv_log.h>
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#undef RT_SERIAL_USING_DMA
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enum
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{
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2021-03-18 13:49:01 +08:00
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#ifdef BSP_USING_UART0
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2020-12-10 11:02:26 +08:00
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UART0_INDEX,
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2021-03-18 13:49:01 +08:00
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#endif
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#ifdef BSP_USING_UART1
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2020-12-10 11:02:26 +08:00
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UART1_INDEX,
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2021-03-18 13:49:01 +08:00
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#endif
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#ifdef BSP_USING_UART2
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UART2_INDEX,
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#endif
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2020-12-10 11:02:26 +08:00
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};
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static struct ab32_uart_config uart_config[] =
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{
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2021-03-18 13:49:01 +08:00
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#ifdef BSP_USING_UART0
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2020-12-10 11:02:26 +08:00
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{
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.name = "uart0",
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.instance = UART0_BASE,
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2021-03-18 13:49:01 +08:00
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.mode = UART_MODE_TX_RX | UART_MODE_1LINE,
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2021-08-08 16:31:00 +08:00
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.fifo_size = BSP_UART0_FIFO_SIZE,
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2020-12-10 11:02:26 +08:00
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},
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2021-03-18 13:49:01 +08:00
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#endif
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#ifdef BSP_USING_UART1
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2020-12-10 11:02:26 +08:00
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{
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.name = "uart1",
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.instance = UART1_BASE,
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2021-03-18 13:49:01 +08:00
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.mode = UART_MODE_TX_RX,
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2021-08-08 16:31:00 +08:00
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.fifo_size = BSP_UART1_FIFO_SIZE,
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2021-03-18 13:49:01 +08:00
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},
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#endif
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#ifdef BSP_USING_UART2
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{
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.name = "uart2",
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.instance = UART2_BASE,
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.mode = UART_MODE_TX_RX,
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2021-08-08 16:31:00 +08:00
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.fifo_size = BSP_UART2_FIFO_SIZE,
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2020-12-10 11:02:26 +08:00
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}
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2021-03-18 13:49:01 +08:00
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#endif
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2020-12-10 11:02:26 +08:00
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};
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static struct ab32_uart uart_obj[sizeof(uart_config) / sizeof(uart_config[0])] = {0};
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2021-08-08 16:31:00 +08:00
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#ifdef HUART_ENABLE
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2021-10-11 15:56:02 +08:00
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static rt_uint8_t huart_dma[512];
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2021-08-08 16:31:00 +08:00
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#endif
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2020-12-10 11:02:26 +08:00
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static rt_err_t ab32_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
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{
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struct ab32_uart *uart;
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RT_ASSERT(serial != RT_NULL);
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RT_ASSERT(cfg != RT_NULL);
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uart = rt_container_of(serial, struct ab32_uart, serial);
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uart->handle.instance = uart->config->instance;
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uart->handle.init.baud = cfg->baud_rate;
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2021-03-18 13:49:01 +08:00
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uart->handle.init.mode = uart->config->mode;
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2020-12-10 11:02:26 +08:00
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switch (cfg->data_bits)
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{
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case DATA_BITS_8:
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uart->handle.init.word_len = UART_WORDLENGTH_8B;
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break;
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case DATA_BITS_9:
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uart->handle.init.word_len = UART_WORDLENGTH_9B;
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break;
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default:
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uart->handle.init.word_len = UART_WORDLENGTH_8B;
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break;
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}
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switch (cfg->stop_bits)
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{
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case STOP_BITS_1:
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uart->handle.init.stop_bits = UART_STOPBITS_1;
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break;
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case STOP_BITS_2:
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uart->handle.init.stop_bits = UART_STOPBITS_2;
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break;
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default:
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uart->handle.init.stop_bits = UART_STOPBITS_1;
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break;
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}
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#ifdef RT_SERIAL_USING_DMA
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uart->dma_rx.last_index = 0;
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#endif
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2021-08-08 16:31:00 +08:00
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if (!uart->uart_dma_flag) {
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hal_uart_init(&uart->handle);
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}
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#ifdef HUART_ENABLE
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else {
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huart_init_do(HUART_TR_PB3, HUART_TR_PB4, uart->handle.init.baud, huart_dma, 512);
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}
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#endif
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2020-12-10 11:02:26 +08:00
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return RT_EOK;
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}
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static rt_err_t ab32_control(struct rt_serial_device *serial, int cmd, void *arg)
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{
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struct ab32_uart *uart;
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#ifdef RT_SERIAL_USING_DMA
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rt_ubase_t ctrl_arg = (rt_ubase_t)arg;
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#endif
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RT_ASSERT(serial != RT_NULL);
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uart = rt_container_of(serial, struct ab32_uart, serial);
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switch (cmd)
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{
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/* disable interrupt */
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case RT_DEVICE_CTRL_CLR_INT:
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hal_uart_control(uart->handle.instance, UART_RXIT_ENABLE, HAL_DISABLE);
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break;
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/* enable interrupt */
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case RT_DEVICE_CTRL_SET_INT:
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hal_uart_clrflag(uart->handle.instance, UART_FLAG_RXPND);
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hal_uart_control(uart->handle.instance, UART_RXIT_ENABLE, HAL_ENABLE);
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break;
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case RT_DEVICE_CTRL_CLOSE:
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hal_uart_deinit(uart->handle.instance);
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break;
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}
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return RT_EOK;
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}
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static int ab32_putc(struct rt_serial_device *serial, char ch)
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{
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struct ab32_uart *uart;
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RT_ASSERT(serial != RT_NULL);
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uart = rt_container_of(serial, struct ab32_uart, serial);
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2021-08-08 16:31:00 +08:00
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if (!uart->uart_dma_flag) {
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hal_uart_clrflag(uart->handle.instance, UART_FLAG_TXPND);
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hal_uart_write(uart->handle.instance, ch);
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while(hal_uart_getflag(uart->handle.instance, UART_FLAG_TXPND) == 0);
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}
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#ifdef HUART_ENABLE
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else {
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huart_putchar(ch);
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}
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#endif
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2020-12-10 11:02:26 +08:00
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return 1;
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}
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static int ab32_getc(struct rt_serial_device *serial)
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{
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int ch;
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struct ab32_uart *uart;
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RT_ASSERT(serial != RT_NULL);
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2021-08-08 16:31:00 +08:00
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2020-12-10 11:02:26 +08:00
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uart = rt_container_of(serial, struct ab32_uart, serial);
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ch = -1;
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2021-10-11 15:56:02 +08:00
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switch ((rt_uint32_t)(uart->handle.instance)) {
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case (rt_uint32_t)UART0_BASE:
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2021-08-08 16:31:00 +08:00
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if (uart->rx_idx != uart->rx_idx_prev) {
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ch = (int)(uart->rx_buf[uart->rx_idx_prev++ % 10]);
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}
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break;
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2021-10-11 15:56:02 +08:00
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case (rt_uint32_t)UART1_BASE:
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2021-08-08 16:31:00 +08:00
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#ifdef HUART_ENABLE
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if ((uart->uart_dma_flag) && (huart_get_rxcnt())) {
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ch = huart_getchar();
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} else
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#endif
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{
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if (uart->rx_idx != uart->rx_idx_prev) {
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ch = (int)(uart->rx_buf[uart->rx_idx_prev++ % 10]);
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}
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}
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break;
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2021-10-11 15:56:02 +08:00
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case (rt_uint32_t)UART2_BASE:
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2021-08-08 16:31:00 +08:00
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if (uart->rx_idx != uart->rx_idx_prev) {
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ch = (int)(uart->rx_buf[uart->rx_idx_prev++ % 10]);
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}
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break;
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default:
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break;
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2020-12-10 11:02:26 +08:00
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}
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return ch;
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}
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static rt_size_t ab32_dma_transmit(struct rt_serial_device *serial, rt_uint8_t *buf, rt_size_t size, int direction)
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{
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return -1;
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}
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2021-08-08 16:31:00 +08:00
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void uart0_irq_process(void)
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2021-04-09 17:35:26 +08:00
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{
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2021-08-08 16:31:00 +08:00
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rt_hw_serial_isr(&(uart_obj[UART0_INDEX].serial), RT_SERIAL_EVENT_RX_IND);
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2021-04-09 17:35:26 +08:00
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}
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2021-08-08 16:31:00 +08:00
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#ifdef BSP_USING_UART1
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void uart1_irq_process(void)
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2021-04-09 17:35:26 +08:00
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{
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2021-08-08 16:31:00 +08:00
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rt_hw_serial_isr(&(uart_obj[UART1_INDEX].serial), RT_SERIAL_EVENT_RX_IND);
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}
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#endif
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2021-04-23 10:21:10 +08:00
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2021-08-08 16:31:00 +08:00
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#ifdef BSP_USING_UART2
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void uart2_irq_process(void)
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{
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rt_hw_serial_isr(&(uart_obj[UART2_INDEX].serial), RT_SERIAL_EVENT_RX_IND);
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2021-04-09 17:35:26 +08:00
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}
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2021-08-08 16:31:00 +08:00
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#endif
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2021-04-09 17:35:26 +08:00
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2022-12-12 02:12:03 +08:00
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rt_section(".irq.usart")
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2020-12-10 11:02:26 +08:00
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static void uart_isr(int vector, void *param)
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{
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rt_interrupt_enter();
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2021-03-18 13:49:01 +08:00
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#ifdef BSP_USING_UART0
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2020-12-10 11:02:26 +08:00
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if(hal_uart_getflag(UART0_BASE, UART_FLAG_RXPND)) //RX one byte finish
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{
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2021-08-08 16:31:00 +08:00
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uart_obj[0].rx_buf[uart_obj[0].rx_idx++ % 10] = hal_uart_read(UART0_BASE);
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hal_uart_clrflag(UART0_BASE, UART_FLAG_RXPND);
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uart0_irq_post();
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2020-12-10 11:02:26 +08:00
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}
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2021-03-18 13:49:01 +08:00
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#endif
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#ifdef BSP_USING_UART1
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if(hal_uart_getflag(UART1_BASE, UART_FLAG_RXPND)) //RX one byte finish
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{
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2021-08-08 16:31:00 +08:00
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uart_obj[1].rx_buf[uart_obj[1].rx_idx++ % 10] = hal_uart_read(UART1_BASE);
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hal_uart_clrflag(UART1_BASE, UART_FLAG_RXPND);
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uart1_irq_post();
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2021-03-18 13:49:01 +08:00
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}
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#endif
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#ifdef BSP_USING_UART2
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if(hal_uart_getflag(UART2_BASE, UART_FLAG_RXPND)) //RX one byte finish
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{
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2021-08-08 16:31:00 +08:00
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uart_obj[2].rx_buf[uart_obj[2].rx_idx++ % 10] = hal_uart_read(UART2_BASE);
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hal_uart_clrflag(UART2_BASE, UART_FLAG_RXPND);
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uart2_irq_post();
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2021-03-18 13:49:01 +08:00
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}
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#endif
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2020-12-10 11:02:26 +08:00
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rt_interrupt_leave();
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}
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2021-08-08 16:31:00 +08:00
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#ifdef HUART_ENABLE
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2022-12-12 02:12:03 +08:00
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rt_section(".irq.huart")
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2021-08-08 16:31:00 +08:00
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void huart_timer_isr(void)
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{
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huart_if_rx_ovflow();
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if (0 == huart_get_rxcnt()) {
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return;
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}
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uart1_irq_post();
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}
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#else
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2022-12-12 02:12:03 +08:00
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rt_section(".irq.huart")
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2021-08-08 16:31:00 +08:00
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void huart_timer_isr(void)
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{
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}
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#endif
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2020-12-10 11:02:26 +08:00
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static const struct rt_uart_ops ab32_uart_ops =
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{
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.configure = ab32_configure,
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.control = ab32_control,
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.putc = ab32_putc,
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.getc = ab32_getc,
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.dma_transmit = ab32_dma_transmit
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};
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int rt_hw_usart_init(void)
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{
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rt_size_t obj_num = sizeof(uart_obj) / sizeof(struct ab32_uart);
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struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
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rt_err_t result = 0;
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rt_hw_interrupt_install(IRQ_UART0_2_VECTOR, uart_isr, RT_NULL, "ut_isr");
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for (int i = 0; i < obj_num; i++)
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{
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/* init UART object */
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uart_obj[i].config = &uart_config[i];
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2021-08-08 16:31:00 +08:00
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uart_obj[i].rx_idx = 0;
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uart_obj[i].rx_idx_prev = 0;
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2020-12-10 11:02:26 +08:00
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uart_obj[i].serial.ops = &ab32_uart_ops;
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uart_obj[i].serial.config = config;
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2020-12-15 23:43:04 +08:00
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uart_obj[i].serial.config.baud_rate = 1500000;
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2021-08-08 16:31:00 +08:00
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uart_obj[i].rx_buf = rt_malloc(uart_config[i].fifo_size);
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if (uart_obj[i].rx_buf == RT_NULL) {
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LOG_E("uart%d malloc failed!", i);
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|
|
|
continue;
|
|
|
|
}
|
2020-12-10 11:02:26 +08:00
|
|
|
|
|
|
|
/* register UART device */
|
|
|
|
result = rt_hw_serial_register(&uart_obj[i].serial, uart_obj[i].config->name,
|
|
|
|
RT_DEVICE_FLAG_RDWR
|
|
|
|
| RT_DEVICE_FLAG_INT_RX
|
|
|
|
| RT_DEVICE_FLAG_INT_TX
|
|
|
|
| uart_obj[i].uart_dma_flag
|
2021-10-02 08:08:50 +08:00
|
|
|
, RT_NULL);
|
2020-12-10 11:02:26 +08:00
|
|
|
RT_ASSERT(result == RT_EOK);
|
|
|
|
}
|
|
|
|
|
2021-08-08 16:31:00 +08:00
|
|
|
return result;
|
2020-12-10 11:02:26 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
#endif
|