2022-07-11 11:17:03 +08:00
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/*
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2023-01-20 10:49:23 +08:00
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* Copyright (c) 2006-2023, RT-Thread Development Team
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2022-07-11 11:17:03 +08:00
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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2022-07-18 11:43:07 +08:00
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* 2022-07-08 Rbb666 first implementation.
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2022-07-11 11:17:03 +08:00
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*/
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#include "board.h"
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#if defined(RT_USING_I2C)
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#if defined(BSP_USING_HW_I2C3) || defined(BSP_USING_HW_I2C6)
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#include <rtdevice.h>
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#ifndef I2C3_CONFIG
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2022-08-31 14:03:08 +08:00
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#define I2C3_CONFIG \
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{ \
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.name = "i2c3", \
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.scl_pin = BSP_I2C3_SCL_PIN, \
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.sda_pin = BSP_I2C3_SDA_PIN, \
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2022-07-11 11:17:03 +08:00
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}
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#endif /* I2C3_CONFIG */
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#endif
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#ifndef I2C6_CONFIG
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2022-08-31 14:03:08 +08:00
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#define I2C6_CONFIG \
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{ \
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.name = "i2c6", \
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.scl_pin = BSP_I2C6_SCL_PIN, \
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.sda_pin = BSP_I2C6_SDA_PIN, \
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2022-07-11 11:17:03 +08:00
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}
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#endif /* I2C6_CONFIG */
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enum
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{
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#ifdef BSP_USING_HW_I2C3
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I2C3_INDEX,
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#endif
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#ifdef BSP_USING_HW_I2C6
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I2C6_INDEX,
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#endif
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};
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struct ifx_i2c_config
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{
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char *name;
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rt_uint32_t scl_pin;
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rt_uint32_t sda_pin;
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};
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struct ifx_i2c
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{
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cyhal_i2c_t mI2C;
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cyhal_i2c_cfg_t mI2C_cfg;
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2022-08-31 14:03:08 +08:00
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struct ifx_i2c_config *config;
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struct rt_i2c_bus_device i2c_bus;
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2022-07-11 11:17:03 +08:00
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};
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static struct ifx_i2c_config i2c_config[] =
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2022-08-31 14:03:08 +08:00
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{
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2022-07-11 11:17:03 +08:00
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#ifdef BSP_USING_HW_I2C3
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2022-08-31 14:03:08 +08:00
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I2C3_CONFIG,
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2022-07-11 11:17:03 +08:00
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#endif
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#ifdef BSP_USING_HW_I2C6
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2022-08-31 14:03:08 +08:00
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I2C6_CONFIG,
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2022-07-11 11:17:03 +08:00
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#endif
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};
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static struct ifx_i2c i2c_objs[sizeof(i2c_config) / sizeof(i2c_config[0])] = {0};
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static int ifx_i2c_read(struct ifx_i2c *hi2c, rt_uint16_t slave_address, rt_uint8_t *p_buffer, rt_uint16_t data_byte)
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{
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if (cyhal_i2c_master_read(&hi2c->mI2C, slave_address, p_buffer, data_byte, 10, true) != RT_EOK)
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{
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return -RT_ERROR;
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}
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return 0;
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}
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static int ifx_i2c_write(struct ifx_i2c *hi2c, uint16_t slave_address, uint8_t *p_buffer, uint16_t data_byte)
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{
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if (cyhal_i2c_master_write(&hi2c->mI2C, slave_address, p_buffer, data_byte, 10, true) != RT_EOK)
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{
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return -RT_ERROR;
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}
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return 0;
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}
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static rt_size_t _i2c_xfer(struct rt_i2c_bus_device *bus, struct rt_i2c_msg msgs[], rt_uint32_t num)
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{
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struct rt_i2c_msg *msg;
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rt_uint32_t i;
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struct ifx_i2c *i2c_obj;
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RT_ASSERT(bus != RT_NULL);
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RT_ASSERT(msgs != RT_NULL);
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i2c_obj = rt_container_of(bus, struct ifx_i2c, i2c_bus);
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for (i = 0; i < num; i++)
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{
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msg = &msgs[i];
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if (msg->flags & RT_I2C_RD)
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{
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if (ifx_i2c_read(i2c_obj, msg->addr, msg->buf, msg->len) != 0)
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{
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goto out;
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}
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}
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else
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{
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if (ifx_i2c_write(i2c_obj, msg->addr, msg->buf, msg->len) != 0)
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{
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goto out;
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}
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}
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}
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out:
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return i;
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}
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static const struct rt_i2c_bus_device_ops i2c_ops =
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2022-08-31 14:03:08 +08:00
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{
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_i2c_xfer,
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RT_NULL,
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RT_NULL};
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2022-07-11 11:17:03 +08:00
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void HAL_I2C_Init(struct ifx_i2c *obj)
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{
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rt_uint8_t result = RT_EOK;
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result = cyhal_i2c_init(&obj->mI2C, obj->config->sda_pin, obj->config->scl_pin, NULL);
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RT_ASSERT(result == RT_EOK);
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result = cyhal_i2c_configure(&obj->mI2C, &obj->mI2C_cfg);
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RT_ASSERT(result == RT_EOK);
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}
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int rt_hw_i2c_init(void)
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{
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rt_err_t result;
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cyhal_i2c_t mI2C;
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for (int i = 0; i < sizeof(i2c_config) / sizeof(i2c_config[0]); i++)
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{
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i2c_objs[i].config = &i2c_config[i];
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i2c_objs[i].i2c_bus.parent.user_data = &i2c_config[i];
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i2c_objs[i].mI2C_cfg.is_slave = false;
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i2c_objs[i].mI2C_cfg.address = 0;
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i2c_objs[i].mI2C_cfg.frequencyhal_hz = (400000UL);
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i2c_objs[i].mI2C = mI2C;
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i2c_objs[i].i2c_bus.ops = &i2c_ops;
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HAL_I2C_Init(&i2c_objs[i]);
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result = rt_i2c_bus_device_register(&i2c_objs[i].i2c_bus, i2c_config[i].name);
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RT_ASSERT(result == RT_EOK);
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}
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return 0;
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}
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INIT_DEVICE_EXPORT(rt_hw_i2c_init);
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#endif /* defined(BSP_USING_I2C1) || defined(BSP_USING_I2C2) */
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