2022-05-19 14:06:35 +08:00
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/*
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2022-08-13 15:22:12 +08:00
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* Copyright 2017-2020, 2022 NXP
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2022-05-19 14:06:35 +08:00
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* All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef _FSL_SEMA4_H_
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#define _FSL_SEMA4_H_
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#include "fsl_common.h"
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/*!
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* @addtogroup sema4
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* @{
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*/
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/******************************************************************************
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* Definitions
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*****************************************************************************/
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/*! @name Driver version */
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/*@{*/
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/*! @brief SEMA4 driver version */
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2022-08-13 15:22:12 +08:00
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#define FSL_SEMA4_DRIVER_VERSION (MAKE_VERSION(2, 0, 3))
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2022-05-19 14:06:35 +08:00
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/*@}*/
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/*! @brief The number to reset all SEMA4 gates. */
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#define SEMA4_GATE_NUM_RESET_ALL (64U)
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#if defined(SEMA4_GATE_COUNT)
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/*!
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* @brief SEMA4 gate n register address.
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*/
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#define SEMA4_GATEn(base, n) ((base)->GATE[(n)])
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#ifndef FSL_FEATURE_SEMA4_GATE_COUNT
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#define FSL_FEATURE_SEMA4_GATE_COUNT SEMA4_GATE_COUNT
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#endif
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#else
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/*!
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* @brief SEMA4 gate n register address.
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*/
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#define SEMA4_GATEn(base, n) (((volatile uint8_t *)(&((base)->Gate00)))[(n)])
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#endif
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/*******************************************************************************
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* API
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******************************************************************************/
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#if defined(__cplusplus)
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extern "C" {
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#endif
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/*!
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* @brief Initializes the SEMA4 module.
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*
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* This function initializes the SEMA4 module. It only enables the clock but does
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* not reset the gates because the module might be used by other processors
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* at the same time. To reset the gates, call either SEMA4_ResetGate or
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* SEMA4_ResetAllGates function.
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*
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* @param base SEMA4 peripheral base address.
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*/
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void SEMA4_Init(SEMA4_Type *base);
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/*!
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* @brief De-initializes the SEMA4 module.
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*
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* This function de-initializes the SEMA4 module. It only disables the clock.
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*
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* @param base SEMA4 peripheral base address.
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*/
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void SEMA4_Deinit(SEMA4_Type *base);
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/*!
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* @brief Tries to lock the SEMA4 gate.
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*
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* This function tries to lock the specific SEMA4 gate. If the gate has been
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* locked by another processor, this function returns an error code.
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*
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* @param base SEMA4 peripheral base address.
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* @param gateNum Gate number to lock.
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* @param procNum Current processor number.
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*
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* @retval kStatus_Success Lock the sema4 gate successfully.
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* @retval kStatus_Fail Sema4 gate has been locked by another processor.
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*/
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status_t SEMA4_TryLock(SEMA4_Type *base, uint8_t gateNum, uint8_t procNum);
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/*!
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* @brief Locks the SEMA4 gate.
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*
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* This function locks the specific SEMA4 gate. If the gate has been
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* locked by other processors, this function waits until it is unlocked and then
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* lock it.
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*
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* @param base SEMA4 peripheral base address.
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* @param gateNum Gate number to lock.
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* @param procNum Current processor number.
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*/
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void SEMA4_Lock(SEMA4_Type *base, uint8_t gateNum, uint8_t procNum);
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/*!
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* @brief Unlocks the SEMA4 gate.
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*
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* This function unlocks the specific SEMA4 gate. It only writes unlock value
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* to the SEMA4 gate register. However, it does not check whether the SEMA4 gate is locked
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* by the current processor or not. As a result, if the SEMA4 gate is not locked by the current
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* processor, this function has no effect.
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*
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* @param base SEMA4 peripheral base address.
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* @param gateNum Gate number to unlock.
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*/
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static inline void SEMA4_Unlock(SEMA4_Type *base, uint8_t gateNum)
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{
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assert(gateNum < (uint8_t)FSL_FEATURE_SEMA4_GATE_COUNT);
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SEMA4_GATEn(base, gateNum) = 0U;
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}
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/*!
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* @brief Gets the status of the SEMA4 gate.
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*
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* This function checks the lock status of a specific SEMA4 gate.
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*
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* @param base SEMA4 peripheral base address.
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* @param gateNum Gate number.
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*
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* @return Return -1 if the gate is unlocked, otherwise return the
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* processor number which has locked the gate.
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*/
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static inline int32_t SEMA4_GetLockProc(SEMA4_Type *base, uint8_t gateNum)
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{
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assert(gateNum < (uint8_t)FSL_FEATURE_SEMA4_GATE_COUNT);
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return (int32_t)(SEMA4_GATEn(base, gateNum)) - 1;
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}
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/*!
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* @brief Resets the SEMA4 gate to an unlocked status.
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*
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* This function resets a SEMA4 gate to an unlocked status.
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*
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* @param base SEMA4 peripheral base address.
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* @param gateNum Gate number.
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*
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* @retval kStatus_Success SEMA4 gate is reset successfully.
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* @retval kStatus_Fail Some other reset process is ongoing.
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*/
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status_t SEMA4_ResetGate(SEMA4_Type *base, uint8_t gateNum);
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/*!
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* @brief Resets all SEMA4 gates to an unlocked status.
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*
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* This function resets all SEMA4 gate to an unlocked status.
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*
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* @param base SEMA4 peripheral base address.
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*
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* @retval kStatus_Success SEMA4 is reset successfully.
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* @retval kStatus_Fail Some other reset process is ongoing.
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*/
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static inline status_t SEMA4_ResetAllGates(SEMA4_Type *base)
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{
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return SEMA4_ResetGate(base, SEMA4_GATE_NUM_RESET_ALL);
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}
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/*!
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* @brief Enable the gate notification interrupt.
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*
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* Gate notification provides such feature, when core tried to lock the gate
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* and failed, it could get notification when the gate is idle.
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*
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* @param base SEMA4 peripheral base address.
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* @param procNum Current processor number.
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* @param mask OR'ed value of the gate index, for example: (1<<0) | (1<<1) means
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* gate 0 and gate 1.
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*/
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static inline void SEMA4_EnableGateNotifyInterrupt(SEMA4_Type *base, uint8_t procNum, uint32_t mask)
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{
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mask = __REV(__RBIT(mask));
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base->CPINE[procNum].CPINE |= (uint16_t)mask;
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}
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/*!
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* @brief Disable the gate notification interrupt.
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*
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* Gate notification provides such feature, when core tried to lock the gate
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* and failed, it could get notification when the gate is idle.
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*
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* @param base SEMA4 peripheral base address.
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* @param procNum Current processor number.
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* @param mask OR'ed value of the gate index, for example: (1<<0) | (1<<1) means
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* gate 0 and gate 1.
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*/
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static inline void SEMA4_DisableGateNotifyInterrupt(SEMA4_Type *base, uint8_t procNum, uint32_t mask)
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{
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mask = __REV(__RBIT(mask));
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base->CPINE[procNum].CPINE &= (uint16_t)(~mask);
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}
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/*!
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* @brief Get the gate notification flags.
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*
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* Gate notification provides such feature, when core tried to lock the gate
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* and failed, it could get notification when the gate is idle. The status flags
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* are cleared automatically when the gate is locked by current core or locked
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* again before the other core.
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*
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* @param base SEMA4 peripheral base address.
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* @param procNum Current processor number.
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* @return OR'ed value of the gate index, for example: (1<<0) | (1<<1) means
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* gate 0 and gate 1 flags are pending.
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*/
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static inline uint32_t SEMA4_GetGateNotifyStatus(SEMA4_Type *base, uint8_t procNum)
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{
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return __REV(__RBIT(base->CPNTF[procNum].CPNTF));
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}
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/*!
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* @brief Resets the SEMA4 gate IRQ notification.
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*
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* This function resets a SEMA4 gate IRQ notification.
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*
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* @param base SEMA4 peripheral base address.
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* @param gateNum Gate number.
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*
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* @retval kStatus_Success Reset successfully.
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* @retval kStatus_Fail Some other reset process is ongoing.
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*/
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status_t SEMA4_ResetGateNotify(SEMA4_Type *base, uint8_t gateNum);
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/*!
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* @brief Resets all SEMA4 gates IRQ notification.
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*
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* This function resets all SEMA4 gate IRQ notifications.
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*
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* @param base SEMA4 peripheral base address.
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*
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* @retval kStatus_Success Reset successfully.
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* @retval kStatus_Fail Some other reset process is ongoing.
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*/
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static inline status_t SEMA4_ResetAllGateNotify(SEMA4_Type *base)
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{
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return SEMA4_ResetGateNotify(base, SEMA4_GATE_NUM_RESET_ALL);
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}
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#if defined(__cplusplus)
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}
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#endif
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/*!
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* @}
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*/
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#endif /* _FSL_SEMA4_H_ */
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