447 lines
12 KiB
C
447 lines
12 KiB
C
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#include <rthw.h>
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#include <rtthread.h>
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#include "stm32f10x.h"
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/*
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* WM8978 Driver
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*/
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/* WM8978 register definitions */
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#define WM8978_DAC 0x01
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#define WM8978_ADC 0x02
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#define WM8978_PCM 0x03
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#define WM8978_HIFI 0x04
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#define WM8978_IOCTL 0x05
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#define WM8978_SRATE1 0x06
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#define WM8978_SRATE2 0x07
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#define WM8978_LDAC 0x08
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#define WM8978_RDAC 0x09
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#define WM8978_BASS 0x0a
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#define WM8978_TREBLE 0x0b
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#define WM8978_ALC1 0x0c
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#define WM8978_ALC2 0x0d
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#define WM8978_ALC3 0x0e
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#define WM8978_NGATE 0x0f
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#define WM8978_LADC 0x10
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#define WM8978_RADC 0x11
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#define WM8978_ADCTL1 0x12
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#define WM8978_3D 0x13
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#define WM8978_PWR1 0x14
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#define WM8978_PWR2 0x15
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#define WM8978_PWR3 0x16
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#define WM8978_PWR4 0x17
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#define WM8978_ID 0x18
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#define WM8978_INTPOL 0x19
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#define WM8978_INTEN 0x1a
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#define WM8978_GPIO1 0x1b
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#define WM8978_GPIO2 0x1c
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#define WM8978_RESET 0x1f
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#define WM8978_RECMIX1 0x20
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#define WM8978_RECMIX2 0x21
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#define WM8978_LOUTM1 0x22
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#define WM8978_LOUTM2 0x23
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#define WM8978_ROUTM1 0x24
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#define WM8978_ROUTM2 0x25
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#define WM8978_MOUTM1 0x26
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#define WM8978_MOUTM2 0x27
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#define WM8978_LOUT1V 0x28
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#define WM8978_ROUT1V 0x29
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#define WM8978_LOUT2V 0x2a
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#define WM8978_ROUT2V 0x2b
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#define WM8978_MOUTV 0x2c
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#define WM8978_OUTCTL 0x2d
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#define WM8978_ADCIN 0x2e
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#define WM8978_INCTL1 0x2f
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#define WM8978_INCTL2 0x30
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#define WM8978_LINVOL 0x31
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#define WM8978_RINVOL 0x32
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#define WM8978_MICBIAS 0x33
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#define WM8978_CLOCK 0x34
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#define WM8978_PLL1CTL1 0x35
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#define WM8978_PLL1CTL2 0x36
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#define WM8978_PLL1CTL3 0x37
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#define WM8978_PLL1CTL4 0x38
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#define WM8978_PLL2CTL1 0x39
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#define WM8978_PLL2CTL2 0x3a
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#define WM8978_PLL2CTL3 0x3b
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#define WM8978_PLL2CTL4 0x3c
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#define WM8978_BIASCTL 0x3d
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#define WM8978_ADCTL2 0x3f
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/*
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SCLK PB7
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SDIN PB8
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CSB PB9
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*/
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#define wm_sclk_0 GPIO_ResetBits(GPIOB,GPIO_Pin_7)
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#define wm_sclk_1 GPIO_SetBits(GPIOB,GPIO_Pin_7)
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#define wm_sdin_0 GPIO_ResetBits(GPIOB,GPIO_Pin_8)
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#define wm_sdin_1 GPIO_SetBits(GPIOB,GPIO_Pin_8)
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#define wm_csb_0 GPIO_ResetBits(GPIOB,GPIO_Pin_9)
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#define wm_csb_1 GPIO_SetBits(GPIOB,GPIO_Pin_9)
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#define DATA_NODE_MAX 5
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/* data node for Tx Mode */
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struct wm8978_data_node
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{
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rt_uint16_t *data_ptr;
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rt_size_t data_size;
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};
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struct wm8978_device
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{
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/* inherit from rt_device */
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struct rt_device parent;
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/* pcm data list */
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struct wm8978_data_node data_list[DATA_NODE_MAX];
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rt_uint16_t read_index, put_index;
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/* transmitted offset of current data node */
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rt_size_t offset;
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};
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struct wm8978_device wm8978;
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static void NVIC_Configuration(void)
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{
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NVIC_InitTypeDef NVIC_InitStructure;
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NVIC_PriorityGroupConfig(NVIC_PriorityGroup_0);
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/* SPI3 IRQ Channel configuration */
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NVIC_InitStructure.NVIC_IRQChannel = SPI3_IRQn;
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NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
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NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
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NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
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NVIC_Init(&NVIC_InitStructure);
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/* DMA1 IRQ Channel configuration */
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NVIC_InitStructure.NVIC_IRQChannel = DMA2_Channel2_IRQn;
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NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
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NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
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NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
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NVIC_Init(&NVIC_InitStructure);
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}
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static void GPIO_Configuration(void)
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{
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GPIO_InitTypeDef GPIO_InitStructure;
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/* configure GPIO B 7, 8, 9 */
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
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GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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GPIO_Init(GPIOB,&GPIO_InitStructure);
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/* configure GPIO B 3, 5 */
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_3 | GPIO_Pin_5;
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GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_Init(GPIOB, &GPIO_InitStructure);
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/* configure GPIO A15 */
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_15;
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GPIO_Init(GPIOA, &GPIO_InitStructure);
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/* Disable the JTAG interface and enable the SWJ interface */
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GPIO_PinRemapConfig(GPIO_Remap_SWJ_JTAGDisable, ENABLE);
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}
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#define SPI3_DR_Address 0x40003C0C
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static void DMA_Configuration(rt_uint32_t addr, rt_size_t size)
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{
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DMA_InitTypeDef DMA_InitStructure;
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/* DMA2 Channel2 configuration ----------------------------------------------*/
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DMA_Cmd(DMA2_Channel2, DISABLE);
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DMA_InitStructure.DMA_PeripheralBaseAddr = (u32)SPI3_DR_Address;
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DMA_InitStructure.DMA_MemoryBaseAddr = (u32)addr;
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DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST;
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DMA_InitStructure.DMA_BufferSize = size;
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DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
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DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
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DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;
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DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;
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DMA_InitStructure.DMA_Priority = DMA_Priority_Medium;
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DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
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DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
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DMA_Init(DMA2_Channel2, &DMA_InitStructure);
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/* Enable SPI3 DMA Tx request */
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SPI_I2S_DMACmd(SPI3, SPI_I2S_DMAReq_Tx, ENABLE);
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DMA_ITConfig(DMA2_Channel2, DMA_IT_TC, ENABLE);
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DMA_Cmd(DMA2_Channel2, ENABLE);
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}
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static void I2S_Configuration(void)
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{
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I2S_InitTypeDef I2S_InitStructure;
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/* I2S peripheral configuration */
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I2S_InitStructure.I2S_Standard = I2S_Standard_Phillips;
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I2S_InitStructure.I2S_DataFormat = I2S_DataFormat_16b;
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I2S_InitStructure.I2S_MCLKOutput = I2S_MCLKOutput_Disable;
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I2S_InitStructure.I2S_AudioFreq = I2S_AudioFreq_44k;
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I2S_InitStructure.I2S_CPOL = I2S_CPOL_High;// I2S_CPOL_Low
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/* I2S2 Master Transmitter to I2S3 Slave Receiver communication -----------*/
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/* I2S2 configuration */
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I2S_InitStructure.I2S_Mode = I2S_Mode_SlaveTx;
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I2S_Init(SPI3, &I2S_InitStructure);
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}
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void wm_send(rt_uint16_t s_data)
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{
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u8 i;
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wm_csb_0;
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wm_sclk_0;
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for (i=0;i<16;i++)
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{
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if (s_data & 0x8000)
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{
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wm_sdin_1;
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}
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else
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{
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wm_sdin_0;
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}
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wm_sclk_1;
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s_data <<= 1;
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wm_sclk_0;
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}
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wm_csb_1;
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}
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static rt_err_t wm8978_init (rt_device_t dev)
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{
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wm_send(0<<9 | 0xFF); // reset
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/* POWER manager */
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wm_send(1<<9 | (0<<8) | (0<<7) | (0<<6) | (0<<5) | (1<<4) | (1<<3) | (1<<2) | 3 );
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wm_send(2<<9 | (1<<8) | (1<<7) | (1<<5) | (1<<4) );
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wm_send(3<<9 | (0<<8) | (0<<7) | (1<<6) | (1<<5) | (1<<3) | (1<<2) | (1<<1) | 1 );
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/* IIS DAC test */
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wm_send(4<<9 | 0 | (2<<3) );//IIS 16BIT
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#if 0
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wm_send(6<<9 | (3<<5) | (3<<2)| 1);//0: slave 1: master | (3<<5) | (3<<2)
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wm_send(43<<9 | (1<<4) );//INVROUT2
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#else
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// 12.288/3 = 4.096M 4.096M / 8 = 512K == (16K *2??)*16?
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wm_send(6<<9 | (3<<5) | (3<<2)| 1); //16K MCLK/3/8
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wm_send(6<<9 | (0<<5) | (3<<2)| 1); //48K MCLK/1/8
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#endif
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return RT_EOK;
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}
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#include <finsh.h>
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#if 0
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void vol(int v)
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{
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wm_send(40<<9 | 0<<8 | 1<<7 | v);
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wm_send(41<<9 | 1<<8 | 1<<7 | v);
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wm_send(42<<9 | 0<<8 | 1<<7 | v);
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wm_send(43<<9 | 1<<8 | 1<<7 | v);
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}
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FINSH_FUNCTION_EXPORT(vol, set volume)
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#endif
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static rt_err_t wm8978_open(rt_device_t dev, rt_uint16_t oflag)
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{
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/* enable I2S */
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I2S_Cmd(SPI3, ENABLE);
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return RT_EOK;
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}
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static rt_err_t wm8978_close(rt_device_t dev)
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{
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/* interrupt mode */
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if (dev->flag & RT_DEVICE_FLAG_INT_TX)
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{
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/* Disable the I2S2 */
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I2S_Cmd(SPI3, DISABLE);
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}
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/* remove all data node */
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return RT_EOK;
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}
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static rt_err_t wm8978_control(rt_device_t dev, rt_uint8_t cmd, void *args)
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{
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/* rate control */
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return RT_EOK;
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}
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static rt_size_t wm8978_write (rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
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{
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struct wm8978_device* device;
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struct wm8978_data_node* node;
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rt_uint32_t level;
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rt_uint16_t next_index;
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device = (struct wm8978_device*)dev;
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RT_ASSERT(device != RT_NULL);
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next_index = device->put_index + 1;
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if (next_index >= DATA_NODE_MAX) next_index = 0;
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/* check data_list full */
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if (next_index == device->read_index)
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{
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rt_set_errno(-RT_EFULL);
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return 0;
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}
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level = rt_hw_interrupt_disable();
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node = &device->data_list[device->put_index];
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device->put_index = next_index;
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// rt_kprintf("+\n");
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/* set node attribute */
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node->data_ptr = (rt_uint16_t*)buffer;
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node->data_size = size >> 1; /* size is byte unit, convert to half word unit */
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next_index = device->read_index + 1;
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if (next_index >= DATA_NODE_MAX) next_index = 0;
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/* check data list whether is empty */
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if (next_index == device->put_index)
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{
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if (dev->flag & RT_DEVICE_FLAG_INT_TX)
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{
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device->offset = 0;
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/* enable I2S interrupt */
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SPI_I2S_ITConfig(SPI3, SPI_I2S_IT_TXE, ENABLE);
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}
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else if (dev->flag & RT_DEVICE_FLAG_DMA_TX)
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{
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DMA_Configuration((rt_uint32_t)node->data_ptr, node->data_size);
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}
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}
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rt_hw_interrupt_enable(level);
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return size;
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}
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rt_err_t wm8978_hw_init(void)
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{
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rt_device_t dev;
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RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB, ENABLE);
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RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPI3, ENABLE);
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RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA2, ENABLE);
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NVIC_Configuration();
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GPIO_Configuration();
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I2S_Configuration();
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dev = (rt_device_t)&wm8978;
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dev->type = RT_Device_Class_Unknown;
|
||
|
|
dev->rx_indicate = RT_NULL;
|
||
|
|
dev->tx_complete = RT_NULL;
|
||
|
|
dev->init = wm8978_init;
|
||
|
|
dev->open = wm8978_open;
|
||
|
|
dev->close = wm8978_close;
|
||
|
|
dev->read = RT_NULL;
|
||
|
|
dev->write = wm8978_write;
|
||
|
|
dev->control = wm8978_control;
|
||
|
|
dev->private = RT_NULL;
|
||
|
|
|
||
|
|
/* set read_index and put index to 0 */
|
||
|
|
wm8978.read_index = 0;
|
||
|
|
wm8978.put_index = 0;
|
||
|
|
|
||
|
|
wm_sclk_0;
|
||
|
|
wm_sclk_1;
|
||
|
|
wm_sclk_0;
|
||
|
|
|
||
|
|
wm_sdin_0;
|
||
|
|
wm_sdin_1;
|
||
|
|
wm_sdin_0;
|
||
|
|
|
||
|
|
wm_csb_1;
|
||
|
|
wm_csb_0;
|
||
|
|
wm_csb_1;
|
||
|
|
|
||
|
|
/* register the device */
|
||
|
|
return rt_device_register(&wm8978.parent, "snd",
|
||
|
|
RT_DEVICE_FLAG_WRONLY | RT_DEVICE_FLAG_DMA_TX);
|
||
|
|
}
|
||
|
|
|
||
|
|
void wm8978_isr()
|
||
|
|
{
|
||
|
|
struct wm8978_data_node* node;
|
||
|
|
node = &wm8978.data_list[wm8978.read_index]; /* get current data node */
|
||
|
|
|
||
|
|
if (SPI_I2S_GetITStatus(SPI3, SPI_I2S_IT_TXE) == SET)
|
||
|
|
{
|
||
|
|
SPI_I2S_SendData(SPI3, node->data_ptr[wm8978.offset++]);
|
||
|
|
}
|
||
|
|
|
||
|
|
if (wm8978.offset == node->data_size)
|
||
|
|
{
|
||
|
|
/* move to next node */
|
||
|
|
rt_uint16_t next_index;
|
||
|
|
|
||
|
|
next_index = wm8978.read_index + 1;
|
||
|
|
if (next_index >= DATA_NODE_MAX) next_index = 0;
|
||
|
|
|
||
|
|
/* notify transmitted complete. */
|
||
|
|
if (wm8978.parent.tx_complete != RT_NULL)
|
||
|
|
{
|
||
|
|
wm8978.parent.tx_complete (&wm8978.parent, wm8978.data_list[wm8978.read_index].data_ptr);
|
||
|
|
rt_kprintf("-\n");
|
||
|
|
}
|
||
|
|
|
||
|
|
wm8978.offset = 0;
|
||
|
|
wm8978.read_index = next_index;
|
||
|
|
if (next_index == wm8978.put_index)
|
||
|
|
{
|
||
|
|
/* no data on the list, disable I2S interrupt */
|
||
|
|
SPI_I2S_ITConfig(SPI3, SPI_I2S_IT_TXE, DISABLE);
|
||
|
|
|
||
|
|
rt_kprintf("*\n");
|
||
|
|
}
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
void wm8978_dma_isr()
|
||
|
|
{
|
||
|
|
/* switch to next buffer */
|
||
|
|
rt_uint16_t next_index;
|
||
|
|
void* data_ptr;
|
||
|
|
|
||
|
|
next_index = wm8978.read_index + 1;
|
||
|
|
if (next_index >= DATA_NODE_MAX) next_index = 0;
|
||
|
|
|
||
|
|
/* save current data pointer */
|
||
|
|
data_ptr = wm8978.data_list[wm8978.read_index].data_ptr;
|
||
|
|
|
||
|
|
wm8978.read_index = next_index;
|
||
|
|
if (next_index != wm8978.put_index)
|
||
|
|
{
|
||
|
|
/* enable next dma request */
|
||
|
|
DMA_Configuration((rt_uint32_t)wm8978.data_list[wm8978.read_index].data_ptr,
|
||
|
|
wm8978.data_list[wm8978.read_index].data_size);
|
||
|
|
}
|
||
|
|
else
|
||
|
|
{
|
||
|
|
rt_kprintf("*\n");
|
||
|
|
}
|
||
|
|
|
||
|
|
/* notify transmitted complete. */
|
||
|
|
if (wm8978.parent.tx_complete != RT_NULL)
|
||
|
|
{
|
||
|
|
wm8978.parent.tx_complete (&wm8978.parent, data_ptr);
|
||
|
|
// rt_kprintf("-\n");
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|