2019-12-05 11:44:39 +08:00
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/*
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2021-03-14 15:33:55 +08:00
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* Copyright (c) 2006-2021, RT-Thread Development Team
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2019-12-05 11:44:39 +08:00
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2018-11-5 SummerGift first version
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2021-03-14 15:33:55 +08:00
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* 2019-04-09 jhb
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2019-12-05 11:44:39 +08:00
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*/
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#ifndef __BOARD_H__
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#define __BOARD_H__
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#include <stm32l4xx.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define STM32_FLASH_START_ADRESS ((uint32_t)0x08000000)
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#define STM32_FLASH_SIZE (2048 * 1024)
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#define STM32_FLASH_END_ADDRESS ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE))
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#define STM32_SRAM3_SIZE (384)
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#define STM32_SRAM3_START (0x20040000)
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#define STM32_SRAM3_END (STM32_SRAM3_START + STM32_SRAM3_SIZE * 1024)
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#define HEAP_BEGIN STM32_SRAM3_START
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#define HEAP_END STM32_SRAM3_END
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void SystemClock_Config(void);
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void SystemClock_ReConfig(int run_mode);
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#ifdef __cplusplus
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}
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#endif
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#endif
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