588 lines
14 KiB
C
588 lines
14 KiB
C
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/*
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* Copyright (c) 2006-2021, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2021-08-10 charlown first version
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*/
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#include <rtthread.h>
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#include <rtdevice.h>
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#include <rthw.h>
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#include "board.h"
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#include "ch32f10x_gpio.h"
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#ifdef RT_USING_PIN
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#ifndef ITEM_NUM
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#define ITEM_NUM(items) sizeof(items) / sizeof(items[0])
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#endif
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struct pin_info
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{
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rt_base_t pin;
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rt_uint32_t gpio_pin;
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rt_uint32_t portsource;
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rt_uint32_t pinsource;
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GPIO_TypeDef *gpio;
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};
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/*
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*pin: assign number, start 0
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*group: such GPIOA, use 'A'
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*gpio_pin: such GPIO_PIN_0, use '0'
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*/
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#define ASSIGN_PIN(pin, group, gpio_pin) \
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{ \
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pin, GPIO_Pin_##gpio_pin, GPIO_PortSourceGPIO##group, GPIO_PinSource##gpio_pin, GPIO##group \
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}
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#define NOT_USE_PIN \
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{ \
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-1, 0, 0, 0, 0 \
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}
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static const struct pin_info pin_info_list[] = {
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#if defined(GPIOA)
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ASSIGN_PIN(0, A, 0),
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ASSIGN_PIN(1, A, 1),
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ASSIGN_PIN(2, A, 2),
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ASSIGN_PIN(3, A, 3),
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ASSIGN_PIN(4, A, 4),
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ASSIGN_PIN(5, A, 5),
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ASSIGN_PIN(6, A, 6),
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ASSIGN_PIN(7, A, 7),
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ASSIGN_PIN(8, A, 8),
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ASSIGN_PIN(9, A, 9),
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ASSIGN_PIN(10, A, 10),
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ASSIGN_PIN(11, A, 11),
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ASSIGN_PIN(12, A, 12),
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ASSIGN_PIN(13, A, 13),
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ASSIGN_PIN(14, A, 14),
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ASSIGN_PIN(15, A, 15),
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#endif
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#if defined(GPIOB)
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ASSIGN_PIN(16, B, 0),
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ASSIGN_PIN(17, B, 1),
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ASSIGN_PIN(18, B, 2),
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ASSIGN_PIN(19, B, 3),
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ASSIGN_PIN(20, B, 4),
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ASSIGN_PIN(21, B, 5),
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ASSIGN_PIN(22, B, 6),
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ASSIGN_PIN(23, B, 7),
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ASSIGN_PIN(24, B, 8),
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ASSIGN_PIN(25, B, 9),
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ASSIGN_PIN(26, B, 10),
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ASSIGN_PIN(27, B, 11),
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ASSIGN_PIN(28, B, 12),
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ASSIGN_PIN(29, B, 13),
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ASSIGN_PIN(30, B, 14),
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ASSIGN_PIN(31, B, 15),
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#endif
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#if defined(GPIOC)
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ASSIGN_PIN(32, C, 0),
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ASSIGN_PIN(33, C, 1),
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ASSIGN_PIN(34, C, 2),
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ASSIGN_PIN(35, C, 3),
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ASSIGN_PIN(36, C, 4),
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ASSIGN_PIN(37, C, 5),
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ASSIGN_PIN(38, C, 6),
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ASSIGN_PIN(39, C, 7),
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ASSIGN_PIN(40, C, 8),
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ASSIGN_PIN(41, C, 9),
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ASSIGN_PIN(42, C, 10),
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ASSIGN_PIN(43, C, 11),
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ASSIGN_PIN(44, C, 12),
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ASSIGN_PIN(45, C, 13),
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ASSIGN_PIN(46, C, 14),
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ASSIGN_PIN(47, C, 15),
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#endif
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#if defined(GPIOD)
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ASSIGN_PIN(48, D, 0),
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ASSIGN_PIN(49, D, 1),
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ASSIGN_PIN(50, D, 2)
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#endif
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};
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static const struct pin_info *pin_info_list_find(rt_base_t pin)
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{
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const struct pin_info *item = RT_NULL;
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if ((pin != -1) && (pin < ITEM_NUM(pin_info_list)))
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{
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item = pin_info_list[pin].pin == -1 ? RT_NULL : &pin_info_list[pin];
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}
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return item;
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}
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static rt_base_t pin_info_list_find_pin(rt_uint16_t portsource, rt_uint16_t pinsource)
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{
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rt_base_t pin = -1;
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int index;
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for (index = 0; index < ITEM_NUM(pin_info_list); index++)
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{
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if (pin_info_list[index].portsource == portsource && pin_info_list[index].pinsource == pinsource)
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{
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pin = pin_info_list[index].pin;
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break;
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}
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}
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return pin;
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}
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/*
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*use: 0 using the exti line, -1 do not using
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*/
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struct exti_line_irq
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{
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rt_uint16_t nvic_priority;
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rt_uint16_t nvic_subpriority;
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rt_uint32_t exit_line;
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IRQn_Type irqn;
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int use;
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struct rt_pin_irq_hdr bind_irq_hdr;
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};
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static struct exti_line_irq exti_line_irq_list[] = {
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{5, 0, EXTI_Line0, EXTI0_IRQn, 0, {
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.pin = -1,
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}},
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{5, 0, EXTI_Line1, EXTI1_IRQn, 0, {
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.pin = -1,
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}},
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{5, 0, EXTI_Line2, EXTI2_IRQn, 0, {
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.pin = -1,
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}},
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{5, 0, EXTI_Line3, EXTI3_IRQn, 0, {
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.pin = -1,
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}},
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{5, 0, EXTI_Line4, EXTI4_IRQn, 0, {
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.pin = -1,
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}},
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{5, 0, EXTI_Line5, EXTI9_5_IRQn, 0, {
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.pin = -1,
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}},
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{5, 0, EXTI_Line6, EXTI9_5_IRQn, 0, {
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.pin = -1,
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}},
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{5, 0, EXTI_Line7, EXTI9_5_IRQn, 0, {
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.pin = -1,
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}},
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{5, 0, EXTI_Line8, EXTI9_5_IRQn, 0, {
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.pin = -1,
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}},
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{5, 0, EXTI_Line9, EXTI9_5_IRQn, 0, {
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.pin = -1,
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}},
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{5, 0, EXTI_Line10, EXTI15_10_IRQn, 0, {
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.pin = -1,
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}},
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{5, 0, EXTI_Line11, EXTI15_10_IRQn, 0, {
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.pin = -1,
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}},
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{5, 0, EXTI_Line12, EXTI15_10_IRQn, 0, {
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.pin = -1,
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}},
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{5, 0, EXTI_Line13, EXTI15_10_IRQn, 0, {
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.pin = -1,
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}},
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{5, 0, EXTI_Line14, EXTI15_10_IRQn, 0, {
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.pin = -1,
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}},
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{5, 0, EXTI_Line15, EXTI15_10_IRQn, 0, {
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.pin = -1,
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}},
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};
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static struct exti_line_irq *exti_line_irq_list_find(rt_int16_t pin)
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{
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struct exti_line_irq *item = RT_NULL;
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int index;
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for (index = 0; index < ITEM_NUM(exti_line_irq_list); index++)
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{
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if (exti_line_irq_list[index].bind_irq_hdr.pin == pin)
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{
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item = &exti_line_irq_list[index];
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break;
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}
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}
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return item;
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}
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static rt_err_t exti_line_irq_list_bind(struct rt_pin_irq_hdr *irq_hdr)
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{
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rt_err_t ret = RT_EFULL;
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rt_base_t level;
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struct exti_line_irq *item;
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int index;
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for (index = 0; index < ITEM_NUM(exti_line_irq_list); index++)
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{
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if (exti_line_irq_list[index].bind_irq_hdr.pin == -1 && exti_line_irq_list[index].use != -1)
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{
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item = &exti_line_irq_list[index];
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break;
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}
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}
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if (item != RT_NULL)
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{
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level = rt_hw_interrupt_disable();
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item->bind_irq_hdr.pin = irq_hdr->pin;
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item->bind_irq_hdr.mode = irq_hdr->mode;
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item->bind_irq_hdr.hdr = irq_hdr->hdr;
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item->bind_irq_hdr.args = irq_hdr->args;
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rt_hw_interrupt_enable(level);
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ret = RT_EOK;
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}
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return ret;
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}
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static rt_err_t exti_line_irq_list_unbind(rt_int16_t pin)
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{
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rt_err_t ret = RT_EEMPTY;
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rt_base_t level;
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struct exti_line_irq *item;
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item = exti_line_irq_list_find(pin);
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if (item != RT_NULL)
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{
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level = rt_hw_interrupt_disable();
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item->bind_irq_hdr.pin = -1;
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rt_hw_interrupt_enable(level);
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ret = RT_EOK;
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}
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return ret;
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}
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void ch32f1_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode)
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{
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const struct pin_info *item;
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GPIO_InitTypeDef gpio_initstruct;
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item = pin_info_list_find(pin);
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if (item == RT_NULL)
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{
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return;
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}
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gpio_initstruct.GPIO_Pin = item->gpio_pin;
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gpio_initstruct.GPIO_Mode = GPIO_Mode_Out_PP;
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gpio_initstruct.GPIO_Speed = GPIO_Speed_50MHz;
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if (mode == PIN_MODE_OUTPUT)
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{
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gpio_initstruct.GPIO_Mode = GPIO_Mode_Out_PP;
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}
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else if (mode == PIN_MODE_INPUT)
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{
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gpio_initstruct.GPIO_Mode = GPIO_Mode_IN_FLOATING;
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}
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else if (mode == PIN_MODE_INPUT_PULLUP)
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{
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gpio_initstruct.GPIO_Mode = GPIO_Mode_IPU;
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}
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else if (mode == PIN_MODE_INPUT_PULLDOWN)
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{
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gpio_initstruct.GPIO_Mode = GPIO_Mode_IPD;
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}
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else if (mode == PIN_MODE_OUTPUT_OD)
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{
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gpio_initstruct.GPIO_Mode = GPIO_Mode_Out_OD;
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}
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GPIO_Init(item->gpio, &gpio_initstruct);
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}
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void ch32f1_pin_write(rt_device_t dev, rt_base_t pin, rt_base_t value)
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{
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const struct pin_info *item;
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item = pin_info_list_find(pin);
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if (item == RT_NULL)
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{
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return;
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}
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GPIO_WriteBit(item->gpio, item->gpio_pin, (BitAction)value);
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}
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int ch32f1_pin_read(rt_device_t dev, rt_base_t pin)
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{
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const struct pin_info *item;
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item = pin_info_list_find(pin);
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if (item == RT_NULL)
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{
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return PIN_LOW;
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}
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return GPIO_ReadInputDataBit(item->gpio, item->gpio_pin);
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}
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rt_err_t ch32f1_pin_attach_irq(struct rt_device *device, rt_int32_t pin, rt_uint32_t mode, void (*hdr)(void *args),
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void *args)
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{
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struct rt_pin_irq_hdr bind_item;
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bind_item.pin = pin;
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bind_item.mode = mode;
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bind_item.hdr = hdr;
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bind_item.args = args;
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return exti_line_irq_list_bind(&bind_item);
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}
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rt_err_t ch32f1_pin_detach_irq(struct rt_device *device, rt_int32_t pin)
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{
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return exti_line_irq_list_unbind(pin);
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}
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rt_err_t ch32f1_pin_irq_enable(struct rt_device *device, rt_base_t pin, rt_uint32_t enabled)
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{
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struct exti_line_irq *find;
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const struct pin_info *item;
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rt_base_t level;
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EXTI_InitTypeDef EXTI_InitStructure;
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NVIC_InitTypeDef NVIC_InitStructure;
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find = exti_line_irq_list_find(pin);
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if (find == RT_NULL)
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return RT_EINVAL;
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item = pin_info_list_find(pin);
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if (item == RT_NULL)
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return RT_EINVAL;
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if (enabled == PIN_IRQ_ENABLE)
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{
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level = rt_hw_interrupt_disable();
|
||
|
|
|
||
|
|
GPIO_EXTILineConfig(item->portsource, item->pinsource);
|
||
|
|
EXTI_InitStructure.EXTI_Line = find->exit_line;
|
||
|
|
EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt;
|
||
|
|
|
||
|
|
switch (find->bind_irq_hdr.mode)
|
||
|
|
{
|
||
|
|
case PIN_IRQ_MODE_RISING:
|
||
|
|
{
|
||
|
|
EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Rising;
|
||
|
|
break;
|
||
|
|
}
|
||
|
|
case PIN_IRQ_MODE_FALLING:
|
||
|
|
{
|
||
|
|
EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Falling;
|
||
|
|
break;
|
||
|
|
}
|
||
|
|
case PIN_IRQ_MODE_RISING_FALLING:
|
||
|
|
{
|
||
|
|
EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Rising_Falling;
|
||
|
|
break;
|
||
|
|
}
|
||
|
|
default:
|
||
|
|
break;
|
||
|
|
}
|
||
|
|
|
||
|
|
EXTI_InitStructure.EXTI_LineCmd = ENABLE;
|
||
|
|
EXTI_Init(&EXTI_InitStructure);
|
||
|
|
|
||
|
|
NVIC_InitStructure.NVIC_IRQChannel = find->irqn;
|
||
|
|
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = find->nvic_priority;
|
||
|
|
NVIC_InitStructure.NVIC_IRQChannelSubPriority = find->nvic_subpriority;
|
||
|
|
|
||
|
|
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
|
||
|
|
NVIC_Init(&NVIC_InitStructure);
|
||
|
|
|
||
|
|
rt_hw_interrupt_enable(level);
|
||
|
|
}
|
||
|
|
else
|
||
|
|
{
|
||
|
|
level = rt_hw_interrupt_disable();
|
||
|
|
|
||
|
|
EXTI_InitStructure.EXTI_Line = find->exit_line;
|
||
|
|
EXTI_InitStructure.EXTI_LineCmd = DISABLE;
|
||
|
|
EXTI_Init(&EXTI_InitStructure);
|
||
|
|
|
||
|
|
NVIC_InitStructure.NVIC_IRQChannelCmd = DISABLE;
|
||
|
|
NVIC_Init(&NVIC_InitStructure);
|
||
|
|
|
||
|
|
rt_hw_interrupt_enable(level);
|
||
|
|
}
|
||
|
|
|
||
|
|
return RT_EOK;
|
||
|
|
}
|
||
|
|
|
||
|
|
/*PX.XX*/
|
||
|
|
rt_base_t ch32f1_pin_get(const char *name)
|
||
|
|
{
|
||
|
|
rt_uint16_t portsource, pinsource;
|
||
|
|
int sz;
|
||
|
|
|
||
|
|
sz = rt_strlen(name);
|
||
|
|
|
||
|
|
if (sz == 4)
|
||
|
|
{
|
||
|
|
portsource = name[1] - 0x41;
|
||
|
|
pinsource = name[3] - 0x30;
|
||
|
|
return pin_info_list_find_pin(portsource, pinsource);
|
||
|
|
}
|
||
|
|
|
||
|
|
if (sz == 5)
|
||
|
|
{
|
||
|
|
portsource = name[1];
|
||
|
|
pinsource = (name[3] - 0x30) * 10 + (name[4] - 0x30);
|
||
|
|
return pin_info_list_find_pin(portsource, pinsource);
|
||
|
|
}
|
||
|
|
|
||
|
|
return -1;
|
||
|
|
}
|
||
|
|
|
||
|
|
const static struct rt_pin_ops pin_ops = {
|
||
|
|
.pin_mode = ch32f1_pin_mode,
|
||
|
|
.pin_write = ch32f1_pin_write,
|
||
|
|
.pin_read = ch32f1_pin_read,
|
||
|
|
.pin_attach_irq = ch32f1_pin_attach_irq,
|
||
|
|
.pin_detach_irq = ch32f1_pin_detach_irq,
|
||
|
|
.pin_irq_enable = ch32f1_pin_irq_enable,
|
||
|
|
.pin_get = ch32f1_pin_get,
|
||
|
|
};
|
||
|
|
|
||
|
|
int rt_hw_pin_init(void)
|
||
|
|
{
|
||
|
|
|
||
|
|
#ifdef GPIOA
|
||
|
|
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE);
|
||
|
|
#endif
|
||
|
|
#ifdef GPIOB
|
||
|
|
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE);
|
||
|
|
#endif
|
||
|
|
#ifdef GPIOC
|
||
|
|
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC, ENABLE);
|
||
|
|
#endif
|
||
|
|
#ifdef GPIOD
|
||
|
|
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOD, ENABLE);
|
||
|
|
#endif
|
||
|
|
RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE);
|
||
|
|
|
||
|
|
return rt_device_pin_register("pin", &pin_ops, RT_NULL);
|
||
|
|
}
|
||
|
|
|
||
|
|
rt_inline void exti_irq_handler(rt_uint16_t seq)
|
||
|
|
{
|
||
|
|
if (EXTI_GetITStatus(exti_line_irq_list[seq].exit_line) == SET)
|
||
|
|
{
|
||
|
|
EXTI_ClearITPendingBit(exti_line_irq_list[seq].exit_line);
|
||
|
|
|
||
|
|
if (exti_line_irq_list[seq].use != -1 &&
|
||
|
|
exti_line_irq_list[seq].bind_irq_hdr.pin != -1 &&
|
||
|
|
exti_line_irq_list[seq].bind_irq_hdr.hdr != RT_NULL)
|
||
|
|
{
|
||
|
|
exti_line_irq_list[seq].bind_irq_hdr.hdr(exti_line_irq_list[seq].bind_irq_hdr.args);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
void EXTI0_IRQHandler(void)
|
||
|
|
{
|
||
|
|
rt_interrupt_enter();
|
||
|
|
|
||
|
|
exti_irq_handler(0);
|
||
|
|
|
||
|
|
rt_interrupt_leave();
|
||
|
|
}
|
||
|
|
|
||
|
|
void EXTI1_IRQHandler(void)
|
||
|
|
{
|
||
|
|
rt_interrupt_enter();
|
||
|
|
|
||
|
|
exti_irq_handler(1);
|
||
|
|
|
||
|
|
rt_interrupt_leave();
|
||
|
|
}
|
||
|
|
|
||
|
|
void EXTI2_IRQHandler(void)
|
||
|
|
{
|
||
|
|
rt_interrupt_enter();
|
||
|
|
|
||
|
|
exti_irq_handler(2);
|
||
|
|
|
||
|
|
rt_interrupt_leave();
|
||
|
|
}
|
||
|
|
|
||
|
|
void EXTI3_IRQHandler(void)
|
||
|
|
{
|
||
|
|
rt_interrupt_enter();
|
||
|
|
|
||
|
|
exti_irq_handler(3);
|
||
|
|
|
||
|
|
rt_interrupt_leave();
|
||
|
|
}
|
||
|
|
|
||
|
|
void EXTI4_IRQHandler(void)
|
||
|
|
{
|
||
|
|
rt_interrupt_enter();
|
||
|
|
|
||
|
|
exti_irq_handler(4);
|
||
|
|
|
||
|
|
rt_interrupt_leave();
|
||
|
|
}
|
||
|
|
|
||
|
|
void EXTI9_5_IRQHandler(void)
|
||
|
|
{
|
||
|
|
rt_interrupt_enter();
|
||
|
|
|
||
|
|
exti_irq_handler(5);
|
||
|
|
|
||
|
|
exti_irq_handler(6);
|
||
|
|
|
||
|
|
exti_irq_handler(7);
|
||
|
|
|
||
|
|
exti_irq_handler(8);
|
||
|
|
|
||
|
|
exti_irq_handler(9);
|
||
|
|
|
||
|
|
rt_interrupt_leave();
|
||
|
|
}
|
||
|
|
|
||
|
|
void EXTI15_10_IRQHandler(void)
|
||
|
|
{
|
||
|
|
rt_interrupt_enter();
|
||
|
|
|
||
|
|
exti_irq_handler(10);
|
||
|
|
|
||
|
|
exti_irq_handler(11);
|
||
|
|
|
||
|
|
exti_irq_handler(12);
|
||
|
|
|
||
|
|
exti_irq_handler(13);
|
||
|
|
|
||
|
|
exti_irq_handler(14);
|
||
|
|
|
||
|
|
exti_irq_handler(15);
|
||
|
|
|
||
|
|
rt_interrupt_leave();
|
||
|
|
}
|
||
|
|
|
||
|
|
#endif /* RT_USING_PIN */
|