2018-12-18 21:01:03 +08:00
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/*
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2021-03-27 17:51:56 +08:00
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* Copyright (c) 2006-2021, RT-Thread Development Team
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2018-12-18 21:01:03 +08:00
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2018/10/28 Bernard The unify RISC-V porting code.
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*/
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#include <rthw.h>
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#include <rtthread.h>
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#include <encoding.h>
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#include <clint.h>
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#include <sysctl.h>
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static volatile unsigned long tick_cycles = 0;
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2024-01-28 13:39:39 +08:00
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int rt_hw_tick_isr(void)
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2018-12-18 21:01:03 +08:00
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{
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uint64_t core_id = current_coreid();
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clint->mtimecmp[core_id] += tick_cycles;
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rt_tick_increase();
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return 0;
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}
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/* Sets and enable the timer interrupt */
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int rt_hw_tick_init(void)
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{
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/* Read core id */
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unsigned long core_id = current_coreid();
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unsigned long interval = 1000/RT_TICK_PER_SECOND;
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/* Clear the Machine-Timer bit in MIE */
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clear_csr(mie, MIP_MTIP);
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/* calculate the tick cycles */
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tick_cycles = interval * sysctl_clock_get_freq(SYSCTL_CLOCK_CPU) / CLINT_CLOCK_DIV / 1000ULL - 1;
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/* Set mtimecmp by core id */
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clint->mtimecmp[core_id] = clint->mtime + tick_cycles;
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/* Enable the Machine-Timer bit in MIE */
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set_csr(mie, MIP_MTIP);
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return 0;
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}
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