750 lines
31 KiB
C
750 lines
31 KiB
C
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/*!
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*******************************************************************************
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**
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** \file gh_crypto.h
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**
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** \brief Cryptography Engine.
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**
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** Copyright: 2012 - 2013 (C) GoKe Microelectronics ShangHai Branch
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**
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** \attention THIS SAMPLE CODE IS PROVIDED AS IS. GOKE MICROELECTRONICS
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** ACCEPTS NO RESPONSIBILITY OR LIABILITY FOR ANY ERRORS OR
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** OMMISSIONS.
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**
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** \note Do not modify this file as it is generated automatically.
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**
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******************************************************************************/
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#ifndef _GH_CRYPTO_H
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#define _GH_CRYPTO_H
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#ifdef __LINUX__
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#include "reg4linux.h"
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#else
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#define FIO_ADDRESS(block,address) (address)
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#define FIO_MOFFSET(block,moffset) (moffset)
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#endif
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#ifndef __LINUX__
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#include "gtypes.h" /* global type definitions */
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#include "gh_lib_cfg.h" /* configuration */
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#endif
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#define GH_CRYPTO_ENABLE_DEBUG_PRINT 0
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#ifdef __LINUX__
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#define GH_CRYPTO_DEBUG_PRINT_FUNCTION printk
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#else
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#define GH_CRYPTO_DEBUG_PRINT_FUNCTION printf
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#endif
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#ifndef __LINUX__
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#if GH_CRYPTO_ENABLE_DEBUG_PRINT
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#include <stdio.h>
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#endif
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#endif
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/* check configuration */
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#ifndef GH_INLINE_LEVEL
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#error "GH_INLINE_LEVEL is not defined!"
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#endif
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#if GH_INLINE_LEVEL > 2
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#error "GH_INLINE_LEVEL must be set 0, 1 or 2!"
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#endif
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#ifndef GH_INLINE
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#error "GH_INLINE is not defined!"
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#endif
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/* disable inlining for debugging */
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#ifdef DEBUG
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#undef GH_INLINE_LEVEL
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#define GH_INLINE_LEVEL 0
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#endif
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/*----------------------------------------------------------------------------*/
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/* registers */
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/*----------------------------------------------------------------------------*/
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#define REG_CRYPTO_DES_KEY FIO_ADDRESS(CRYPTO,0x9000500C) /* read/write */
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#define REG_CRYPTO_DES_INPUT FIO_ADDRESS(CRYPTO,0x90005014) /* read/write */
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#define REG_CRYPTO_DES_OPCODE FIO_ADDRESS(CRYPTO,0x90005004) /* read/write */
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#define REG_CRYPTO_DES_OUTPUT_RDY FIO_ADDRESS(CRYPTO,0x90005018) /* read */
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#define REG_CRYPTO_DES_OUTPUT FIO_ADDRESS(CRYPTO,0x90005020) /* read */
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#define REG_CRYPTO_DES_INTERRUPT FIO_ADDRESS(CRYPTO,0x90005000) /* read/write */
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#define REG_CRYPTO_AES_128_KEY FIO_ADDRESS(CRYPTO,0x90005074) /* read/write */
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#define REG_CRYPTO_AES_192_KEY FIO_ADDRESS(CRYPTO,0x90005064) /* read/write */
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#define REG_CRYPTO_AES_256_KEY FIO_ADDRESS(CRYPTO,0x9000504C) /* read/write */
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#define REG_CRYPTO_AES_INPUT FIO_ADDRESS(CRYPTO,0x90005084) /* read/write */
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#define REG_CRYPTO_AES_OPCODE FIO_ADDRESS(CRYPTO,0x9000502C) /* read/write */
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#define REG_CRYPTO_AES_OUTPUT_RDY FIO_ADDRESS(CRYPTO,0x90005088) /* read */
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#define REG_CRYPTO_AES_OUTPUT FIO_ADDRESS(CRYPTO,0x90005098) /* read */
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#define REG_CRYPTO_AES_INTERRUPT FIO_ADDRESS(CRYPTO,0x90005028) /* read/write */
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#define REG_CRYPTO_EFUSE_BOOT_SW_DIS FIO_ADDRESS(CRYPTO,0x90005024) /* read/write */
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/*----------------------------------------------------------------------------*/
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/* bit group structures */
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/*----------------------------------------------------------------------------*/
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typedef union { /* CRYPTO_DES_Opcode */
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U32 all;
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struct {
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U32 mode : 1;
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U32 : 31;
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} bitc;
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} GH_CRYPTO_DES_OPCODE_S;
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typedef union { /* CRYPTO_DES_Output_Rdy */
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U32 all;
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struct {
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U32 rdy : 1;
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U32 : 31;
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} bitc;
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} GH_CRYPTO_DES_OUTPUT_RDY_S;
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typedef union { /* CRYPTO_DES_Interrupt */
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U32 all;
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struct {
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U32 en : 1;
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U32 : 31;
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} bitc;
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} GH_CRYPTO_DES_INTERRUPT_S;
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typedef union { /* CRYPTO_AES_Opcode */
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U32 all;
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struct {
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U32 mode : 1;
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U32 : 31;
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} bitc;
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} GH_CRYPTO_AES_OPCODE_S;
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typedef union { /* CRYPTO_AES_Output_Rdy */
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U32 all;
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struct {
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U32 rdy : 1;
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U32 : 31;
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} bitc;
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} GH_CRYPTO_AES_OUTPUT_RDY_S;
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typedef union { /* CRYPTO_AES_Interrupt */
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U32 all;
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struct {
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U32 en : 1;
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U32 : 31;
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} bitc;
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} GH_CRYPTO_AES_INTERRUPT_S;
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typedef union { /* CRYPTO_EFUSE_BOOT_SW_DIS */
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U32 all;
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struct {
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U32 efuse_boot_dis : 1;
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U32 efuse_boot_sw : 1;
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U32 : 30;
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} bitc;
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} GH_CRYPTO_EFUSE_BOOT_SW_DIS_S;
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/*----------------------------------------------------------------------------*/
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/* mirror variables */
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/*----------------------------------------------------------------------------*/
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#ifdef __cplusplus
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extern "C" {
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#endif
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/*----------------------------------------------------------------------------*/
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/* register CRYPTO_DES_Key (read/write) */
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/*----------------------------------------------------------------------------*/
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#if GH_INLINE_LEVEL == 0
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/*! \brief Writes the register 'CRYPTO_DES_Key'. */
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void GH_CRYPTO_set_DES_Key(U8 index, U32 data);
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/*! \brief Reads the register 'CRYPTO_DES_Key'. */
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U32 GH_CRYPTO_get_DES_Key(U8 index);
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#else /* GH_INLINE_LEVEL == 0 */
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GH_INLINE void GH_CRYPTO_set_DES_Key(U8 index, U32 data)
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{
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*(volatile U32 *)(REG_CRYPTO_DES_KEY - index * FIO_MOFFSET(CRYPTO,0x00000004)) = data;
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#if GH_CRYPTO_ENABLE_DEBUG_PRINT
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GH_CRYPTO_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_CRYPTO_set_DES_Key] <-- 0x%08x\n",
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(REG_CRYPTO_DES_KEY - index * FIO_MOFFSET(CRYPTO,0x00000004)),data,data);
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#endif
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}
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GH_INLINE U32 GH_CRYPTO_get_DES_Key(U8 index)
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{
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U32 value = (*(volatile U32 *)(REG_CRYPTO_DES_KEY - index * FIO_MOFFSET(CRYPTO,0x00000004)));
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#if GH_CRYPTO_ENABLE_DEBUG_PRINT
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GH_CRYPTO_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_CRYPTO_get_DES_Key] --> 0x%08x\n",
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(REG_CRYPTO_DES_KEY - index * FIO_MOFFSET(CRYPTO,0x00000004)),value);
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#endif
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return value;
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}
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#endif /* GH_INLINE_LEVEL == 0 */
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/*----------------------------------------------------------------------------*/
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/* register CRYPTO_DES_Input (read/write) */
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/*----------------------------------------------------------------------------*/
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#if GH_INLINE_LEVEL == 0
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/*! \brief Writes the register 'CRYPTO_DES_Input'. */
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void GH_CRYPTO_set_DES_Input(U8 index, U32 data);
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/*! \brief Reads the register 'CRYPTO_DES_Input'. */
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U32 GH_CRYPTO_get_DES_Input(U8 index);
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#else /* GH_INLINE_LEVEL == 0 */
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GH_INLINE void GH_CRYPTO_set_DES_Input(U8 index, U32 data)
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{
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*(volatile U32 *)(REG_CRYPTO_DES_INPUT - index * FIO_MOFFSET(CRYPTO,0x00000004)) = data;
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#if GH_CRYPTO_ENABLE_DEBUG_PRINT
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GH_CRYPTO_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_CRYPTO_set_DES_Input] <-- 0x%08x\n",
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(REG_CRYPTO_DES_INPUT - index * FIO_MOFFSET(CRYPTO,0x00000004)),data,data);
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#endif
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}
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GH_INLINE U32 GH_CRYPTO_get_DES_Input(U8 index)
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{
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U32 value = (*(volatile U32 *)(REG_CRYPTO_DES_INPUT - index * FIO_MOFFSET(CRYPTO,0x00000004)));
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#if GH_CRYPTO_ENABLE_DEBUG_PRINT
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GH_CRYPTO_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_CRYPTO_get_DES_Input] --> 0x%08x\n",
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(REG_CRYPTO_DES_INPUT - index * FIO_MOFFSET(CRYPTO,0x00000004)),value);
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#endif
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return value;
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}
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#endif /* GH_INLINE_LEVEL == 0 */
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/*----------------------------------------------------------------------------*/
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/* register CRYPTO_DES_Opcode (read/write) */
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/*----------------------------------------------------------------------------*/
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#if GH_INLINE_LEVEL == 0
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/*! \brief Writes the register 'CRYPTO_DES_Opcode'. */
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void GH_CRYPTO_set_DES_Opcode(U32 data);
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/*! \brief Reads the register 'CRYPTO_DES_Opcode'. */
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U32 GH_CRYPTO_get_DES_Opcode(void);
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/*! \brief Writes the bit group 'mode' of register 'CRYPTO_DES_Opcode'. */
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void GH_CRYPTO_set_DES_Opcode_mode(U8 data);
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/*! \brief Reads the bit group 'mode' of register 'CRYPTO_DES_Opcode'. */
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U8 GH_CRYPTO_get_DES_Opcode_mode(void);
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#else /* GH_INLINE_LEVEL == 0 */
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GH_INLINE void GH_CRYPTO_set_DES_Opcode(U32 data)
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{
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*(volatile U32 *)REG_CRYPTO_DES_OPCODE = data;
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#if GH_CRYPTO_ENABLE_DEBUG_PRINT
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GH_CRYPTO_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_CRYPTO_set_DES_Opcode] <-- 0x%08x\n",
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REG_CRYPTO_DES_OPCODE,data,data);
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#endif
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}
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GH_INLINE U32 GH_CRYPTO_get_DES_Opcode(void)
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{
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U32 value = (*(volatile U32 *)REG_CRYPTO_DES_OPCODE);
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#if GH_CRYPTO_ENABLE_DEBUG_PRINT
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GH_CRYPTO_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_CRYPTO_get_DES_Opcode] --> 0x%08x\n",
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REG_CRYPTO_DES_OPCODE,value);
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#endif
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return value;
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}
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GH_INLINE void GH_CRYPTO_set_DES_Opcode_mode(U8 data)
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{
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GH_CRYPTO_DES_OPCODE_S d;
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d.all = *(volatile U32 *)REG_CRYPTO_DES_OPCODE;
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d.bitc.mode = data;
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*(volatile U32 *)REG_CRYPTO_DES_OPCODE = d.all;
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#if GH_CRYPTO_ENABLE_DEBUG_PRINT
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GH_CRYPTO_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_CRYPTO_set_DES_Opcode_mode] <-- 0x%08x\n",
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REG_CRYPTO_DES_OPCODE,d.all,d.all);
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#endif
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}
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GH_INLINE U8 GH_CRYPTO_get_DES_Opcode_mode(void)
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{
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GH_CRYPTO_DES_OPCODE_S tmp_value;
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U32 value = (*(volatile U32 *)REG_CRYPTO_DES_OPCODE);
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tmp_value.all = value;
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#if GH_CRYPTO_ENABLE_DEBUG_PRINT
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GH_CRYPTO_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_CRYPTO_get_DES_Opcode_mode] --> 0x%08x\n",
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REG_CRYPTO_DES_OPCODE,value);
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#endif
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return tmp_value.bitc.mode;
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}
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#endif /* GH_INLINE_LEVEL == 0 */
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/*----------------------------------------------------------------------------*/
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/* register CRYPTO_DES_Output_Rdy (read) */
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/*----------------------------------------------------------------------------*/
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#if GH_INLINE_LEVEL == 0
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/*! \brief Reads the register 'CRYPTO_DES_Output_Rdy'. */
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U32 GH_CRYPTO_get_DES_Output_Rdy(void);
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/*! \brief Reads the bit group 'Rdy' of register 'CRYPTO_DES_Output_Rdy'. */
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U8 GH_CRYPTO_get_DES_Output_Rdy_Rdy(void);
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#else /* GH_INLINE_LEVEL == 0 */
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GH_INLINE U32 GH_CRYPTO_get_DES_Output_Rdy(void)
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{
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U32 value = (*(volatile U32 *)REG_CRYPTO_DES_OUTPUT_RDY);
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#if GH_CRYPTO_ENABLE_DEBUG_PRINT
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GH_CRYPTO_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_CRYPTO_get_DES_Output_Rdy] --> 0x%08x\n",
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REG_CRYPTO_DES_OUTPUT_RDY,value);
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#endif
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return value;
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}
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GH_INLINE U8 GH_CRYPTO_get_DES_Output_Rdy_Rdy(void)
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{
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GH_CRYPTO_DES_OUTPUT_RDY_S tmp_value;
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U32 value = (*(volatile U32 *)REG_CRYPTO_DES_OUTPUT_RDY);
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tmp_value.all = value;
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#if GH_CRYPTO_ENABLE_DEBUG_PRINT
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GH_CRYPTO_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_CRYPTO_get_DES_Output_Rdy_Rdy] --> 0x%08x\n",
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REG_CRYPTO_DES_OUTPUT_RDY,value);
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#endif
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return tmp_value.bitc.rdy;
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}
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#endif /* GH_INLINE_LEVEL == 0 */
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/*----------------------------------------------------------------------------*/
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/* register CRYPTO_DES_Output (read) */
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/*----------------------------------------------------------------------------*/
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#if GH_INLINE_LEVEL == 0
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/*! \brief Reads the register 'CRYPTO_DES_Output'. */
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U32 GH_CRYPTO_get_DES_Output(U8 index);
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#else /* GH_INLINE_LEVEL == 0 */
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GH_INLINE U32 GH_CRYPTO_get_DES_Output(U8 index)
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{
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U32 value = (*(volatile U32 *)(REG_CRYPTO_DES_OUTPUT - index * FIO_MOFFSET(CRYPTO,0x00000004)));
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#if GH_CRYPTO_ENABLE_DEBUG_PRINT
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GH_CRYPTO_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_CRYPTO_get_DES_Output] --> 0x%08x\n",
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(REG_CRYPTO_DES_OUTPUT - index * FIO_MOFFSET(CRYPTO,0x00000004)),value);
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#endif
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return value;
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}
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#endif /* GH_INLINE_LEVEL == 0 */
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/*----------------------------------------------------------------------------*/
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/* register CRYPTO_DES_Interrupt (read/write) */
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/*----------------------------------------------------------------------------*/
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#if GH_INLINE_LEVEL == 0
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/*! \brief Writes the register 'CRYPTO_DES_Interrupt'. */
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void GH_CRYPTO_set_DES_Interrupt(U32 data);
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/*! \brief Reads the register 'CRYPTO_DES_Interrupt'. */
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U32 GH_CRYPTO_get_DES_Interrupt(void);
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/*! \brief Writes the bit group 'En' of register 'CRYPTO_DES_Interrupt'. */
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void GH_CRYPTO_set_DES_Interrupt_En(U8 data);
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/*! \brief Reads the bit group 'En' of register 'CRYPTO_DES_Interrupt'. */
|
||
|
|
U8 GH_CRYPTO_get_DES_Interrupt_En(void);
|
||
|
|
#else /* GH_INLINE_LEVEL == 0 */
|
||
|
|
GH_INLINE void GH_CRYPTO_set_DES_Interrupt(U32 data)
|
||
|
|
{
|
||
|
|
*(volatile U32 *)REG_CRYPTO_DES_INTERRUPT = data;
|
||
|
|
#if GH_CRYPTO_ENABLE_DEBUG_PRINT
|
||
|
|
GH_CRYPTO_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_CRYPTO_set_DES_Interrupt] <-- 0x%08x\n",
|
||
|
|
REG_CRYPTO_DES_INTERRUPT,data,data);
|
||
|
|
#endif
|
||
|
|
}
|
||
|
|
GH_INLINE U32 GH_CRYPTO_get_DES_Interrupt(void)
|
||
|
|
{
|
||
|
|
U32 value = (*(volatile U32 *)REG_CRYPTO_DES_INTERRUPT);
|
||
|
|
|
||
|
|
#if GH_CRYPTO_ENABLE_DEBUG_PRINT
|
||
|
|
GH_CRYPTO_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_CRYPTO_get_DES_Interrupt] --> 0x%08x\n",
|
||
|
|
REG_CRYPTO_DES_INTERRUPT,value);
|
||
|
|
#endif
|
||
|
|
return value;
|
||
|
|
}
|
||
|
|
GH_INLINE void GH_CRYPTO_set_DES_Interrupt_En(U8 data)
|
||
|
|
{
|
||
|
|
GH_CRYPTO_DES_INTERRUPT_S d;
|
||
|
|
d.all = *(volatile U32 *)REG_CRYPTO_DES_INTERRUPT;
|
||
|
|
d.bitc.en = data;
|
||
|
|
*(volatile U32 *)REG_CRYPTO_DES_INTERRUPT = d.all;
|
||
|
|
#if GH_CRYPTO_ENABLE_DEBUG_PRINT
|
||
|
|
GH_CRYPTO_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_CRYPTO_set_DES_Interrupt_En] <-- 0x%08x\n",
|
||
|
|
REG_CRYPTO_DES_INTERRUPT,d.all,d.all);
|
||
|
|
#endif
|
||
|
|
}
|
||
|
|
GH_INLINE U8 GH_CRYPTO_get_DES_Interrupt_En(void)
|
||
|
|
{
|
||
|
|
GH_CRYPTO_DES_INTERRUPT_S tmp_value;
|
||
|
|
U32 value = (*(volatile U32 *)REG_CRYPTO_DES_INTERRUPT);
|
||
|
|
|
||
|
|
tmp_value.all = value;
|
||
|
|
#if GH_CRYPTO_ENABLE_DEBUG_PRINT
|
||
|
|
GH_CRYPTO_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_CRYPTO_get_DES_Interrupt_En] --> 0x%08x\n",
|
||
|
|
REG_CRYPTO_DES_INTERRUPT,value);
|
||
|
|
#endif
|
||
|
|
return tmp_value.bitc.en;
|
||
|
|
}
|
||
|
|
#endif /* GH_INLINE_LEVEL == 0 */
|
||
|
|
|
||
|
|
/*----------------------------------------------------------------------------*/
|
||
|
|
/* register CRYPTO_AES_128_Key (read/write) */
|
||
|
|
/*----------------------------------------------------------------------------*/
|
||
|
|
#if GH_INLINE_LEVEL == 0
|
||
|
|
/*! \brief Writes the register 'CRYPTO_AES_128_Key'. */
|
||
|
|
void GH_CRYPTO_set_AES_128_Key(U8 index, U32 data);
|
||
|
|
/*! \brief Reads the register 'CRYPTO_AES_128_Key'. */
|
||
|
|
U32 GH_CRYPTO_get_AES_128_Key(U8 index);
|
||
|
|
#else /* GH_INLINE_LEVEL == 0 */
|
||
|
|
GH_INLINE void GH_CRYPTO_set_AES_128_Key(U8 index, U32 data)
|
||
|
|
{
|
||
|
|
*(volatile U32 *)(REG_CRYPTO_AES_128_KEY - index * FIO_MOFFSET(CRYPTO,0x00000004)) = data;
|
||
|
|
#if GH_CRYPTO_ENABLE_DEBUG_PRINT
|
||
|
|
GH_CRYPTO_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_CRYPTO_set_AES_128_Key] <-- 0x%08x\n",
|
||
|
|
(REG_CRYPTO_AES_128_KEY - index * FIO_MOFFSET(CRYPTO,0x00000004)),data,data);
|
||
|
|
#endif
|
||
|
|
}
|
||
|
|
GH_INLINE U32 GH_CRYPTO_get_AES_128_Key(U8 index)
|
||
|
|
{
|
||
|
|
U32 value = (*(volatile U32 *)(REG_CRYPTO_AES_128_KEY - index * FIO_MOFFSET(CRYPTO,0x00000004)));
|
||
|
|
|
||
|
|
#if GH_CRYPTO_ENABLE_DEBUG_PRINT
|
||
|
|
GH_CRYPTO_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_CRYPTO_get_AES_128_Key] --> 0x%08x\n",
|
||
|
|
(REG_CRYPTO_AES_128_KEY - index * FIO_MOFFSET(CRYPTO,0x00000004)),value);
|
||
|
|
#endif
|
||
|
|
return value;
|
||
|
|
}
|
||
|
|
#endif /* GH_INLINE_LEVEL == 0 */
|
||
|
|
|
||
|
|
/*----------------------------------------------------------------------------*/
|
||
|
|
/* register CRYPTO_AES_192_Key (read/write) */
|
||
|
|
/*----------------------------------------------------------------------------*/
|
||
|
|
#if GH_INLINE_LEVEL == 0
|
||
|
|
/*! \brief Writes the register 'CRYPTO_AES_192_Key'. */
|
||
|
|
void GH_CRYPTO_set_AES_192_Key(U8 index, U32 data);
|
||
|
|
/*! \brief Reads the register 'CRYPTO_AES_192_Key'. */
|
||
|
|
U32 GH_CRYPTO_get_AES_192_Key(U8 index);
|
||
|
|
#else /* GH_INLINE_LEVEL == 0 */
|
||
|
|
GH_INLINE void GH_CRYPTO_set_AES_192_Key(U8 index, U32 data)
|
||
|
|
{
|
||
|
|
*(volatile U32 *)(REG_CRYPTO_AES_192_KEY - index * FIO_MOFFSET(CRYPTO,0x00000004)) = data;
|
||
|
|
#if GH_CRYPTO_ENABLE_DEBUG_PRINT
|
||
|
|
GH_CRYPTO_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_CRYPTO_set_AES_192_Key] <-- 0x%08x\n",
|
||
|
|
(REG_CRYPTO_AES_192_KEY - index * FIO_MOFFSET(CRYPTO,0x00000004)),data,data);
|
||
|
|
#endif
|
||
|
|
}
|
||
|
|
GH_INLINE U32 GH_CRYPTO_get_AES_192_Key(U8 index)
|
||
|
|
{
|
||
|
|
U32 value = (*(volatile U32 *)(REG_CRYPTO_AES_192_KEY - index * FIO_MOFFSET(CRYPTO,0x00000004)));
|
||
|
|
|
||
|
|
#if GH_CRYPTO_ENABLE_DEBUG_PRINT
|
||
|
|
GH_CRYPTO_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_CRYPTO_get_AES_192_Key] --> 0x%08x\n",
|
||
|
|
(REG_CRYPTO_AES_192_KEY - index * FIO_MOFFSET(CRYPTO,0x00000004)),value);
|
||
|
|
#endif
|
||
|
|
return value;
|
||
|
|
}
|
||
|
|
#endif /* GH_INLINE_LEVEL == 0 */
|
||
|
|
|
||
|
|
/*----------------------------------------------------------------------------*/
|
||
|
|
/* register CRYPTO_AES_256_Key (read/write) */
|
||
|
|
/*----------------------------------------------------------------------------*/
|
||
|
|
#if GH_INLINE_LEVEL == 0
|
||
|
|
/*! \brief Writes the register 'CRYPTO_AES_256_Key'. */
|
||
|
|
void GH_CRYPTO_set_AES_256_Key(U8 index, U32 data);
|
||
|
|
/*! \brief Reads the register 'CRYPTO_AES_256_Key'. */
|
||
|
|
U32 GH_CRYPTO_get_AES_256_Key(U8 index);
|
||
|
|
#else /* GH_INLINE_LEVEL == 0 */
|
||
|
|
GH_INLINE void GH_CRYPTO_set_AES_256_Key(U8 index, U32 data)
|
||
|
|
{
|
||
|
|
*(volatile U32 *)(REG_CRYPTO_AES_256_KEY - index * FIO_MOFFSET(CRYPTO,0x00000004)) = data;
|
||
|
|
#if GH_CRYPTO_ENABLE_DEBUG_PRINT
|
||
|
|
GH_CRYPTO_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_CRYPTO_set_AES_256_Key] <-- 0x%08x\n",
|
||
|
|
(REG_CRYPTO_AES_256_KEY - index * FIO_MOFFSET(CRYPTO,0x00000004)),data,data);
|
||
|
|
#endif
|
||
|
|
}
|
||
|
|
GH_INLINE U32 GH_CRYPTO_get_AES_256_Key(U8 index)
|
||
|
|
{
|
||
|
|
U32 value = (*(volatile U32 *)(REG_CRYPTO_AES_256_KEY - index * FIO_MOFFSET(CRYPTO,0x00000004)));
|
||
|
|
|
||
|
|
#if GH_CRYPTO_ENABLE_DEBUG_PRINT
|
||
|
|
GH_CRYPTO_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_CRYPTO_get_AES_256_Key] --> 0x%08x\n",
|
||
|
|
(REG_CRYPTO_AES_256_KEY - index * FIO_MOFFSET(CRYPTO,0x00000004)),value);
|
||
|
|
#endif
|
||
|
|
return value;
|
||
|
|
}
|
||
|
|
#endif /* GH_INLINE_LEVEL == 0 */
|
||
|
|
|
||
|
|
/*----------------------------------------------------------------------------*/
|
||
|
|
/* register CRYPTO_AES_Input (read/write) */
|
||
|
|
/*----------------------------------------------------------------------------*/
|
||
|
|
#if GH_INLINE_LEVEL == 0
|
||
|
|
/*! \brief Writes the register 'CRYPTO_AES_Input'. */
|
||
|
|
void GH_CRYPTO_set_AES_Input(U8 index, U32 data);
|
||
|
|
/*! \brief Reads the register 'CRYPTO_AES_Input'. */
|
||
|
|
U32 GH_CRYPTO_get_AES_Input(U8 index);
|
||
|
|
#else /* GH_INLINE_LEVEL == 0 */
|
||
|
|
GH_INLINE void GH_CRYPTO_set_AES_Input(U8 index, U32 data)
|
||
|
|
{
|
||
|
|
*(volatile U32 *)(REG_CRYPTO_AES_INPUT - index * FIO_MOFFSET(CRYPTO,0x00000004)) = data;
|
||
|
|
#if GH_CRYPTO_ENABLE_DEBUG_PRINT
|
||
|
|
GH_CRYPTO_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_CRYPTO_set_AES_Input] <-- 0x%08x\n",
|
||
|
|
(REG_CRYPTO_AES_INPUT - index * FIO_MOFFSET(CRYPTO,0x00000004)),data,data);
|
||
|
|
#endif
|
||
|
|
}
|
||
|
|
GH_INLINE U32 GH_CRYPTO_get_AES_Input(U8 index)
|
||
|
|
{
|
||
|
|
U32 value = (*(volatile U32 *)(REG_CRYPTO_AES_INPUT - index * FIO_MOFFSET(CRYPTO,0x00000004)));
|
||
|
|
|
||
|
|
#if GH_CRYPTO_ENABLE_DEBUG_PRINT
|
||
|
|
GH_CRYPTO_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_CRYPTO_get_AES_Input] --> 0x%08x\n",
|
||
|
|
(REG_CRYPTO_AES_INPUT - index * FIO_MOFFSET(CRYPTO,0x00000004)),value);
|
||
|
|
#endif
|
||
|
|
return value;
|
||
|
|
}
|
||
|
|
#endif /* GH_INLINE_LEVEL == 0 */
|
||
|
|
|
||
|
|
/*----------------------------------------------------------------------------*/
|
||
|
|
/* register CRYPTO_AES_Opcode (read/write) */
|
||
|
|
/*----------------------------------------------------------------------------*/
|
||
|
|
#if GH_INLINE_LEVEL == 0
|
||
|
|
/*! \brief Writes the register 'CRYPTO_AES_Opcode'. */
|
||
|
|
void GH_CRYPTO_set_AES_Opcode(U32 data);
|
||
|
|
/*! \brief Reads the register 'CRYPTO_AES_Opcode'. */
|
||
|
|
U32 GH_CRYPTO_get_AES_Opcode(void);
|
||
|
|
/*! \brief Writes the bit group 'mode' of register 'CRYPTO_AES_Opcode'. */
|
||
|
|
void GH_CRYPTO_set_AES_Opcode_mode(U8 data);
|
||
|
|
/*! \brief Reads the bit group 'mode' of register 'CRYPTO_AES_Opcode'. */
|
||
|
|
U8 GH_CRYPTO_get_AES_Opcode_mode(void);
|
||
|
|
#else /* GH_INLINE_LEVEL == 0 */
|
||
|
|
GH_INLINE void GH_CRYPTO_set_AES_Opcode(U32 data)
|
||
|
|
{
|
||
|
|
*(volatile U32 *)REG_CRYPTO_AES_OPCODE = data;
|
||
|
|
#if GH_CRYPTO_ENABLE_DEBUG_PRINT
|
||
|
|
GH_CRYPTO_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_CRYPTO_set_AES_Opcode] <-- 0x%08x\n",
|
||
|
|
REG_CRYPTO_AES_OPCODE,data,data);
|
||
|
|
#endif
|
||
|
|
}
|
||
|
|
GH_INLINE U32 GH_CRYPTO_get_AES_Opcode(void)
|
||
|
|
{
|
||
|
|
U32 value = (*(volatile U32 *)REG_CRYPTO_AES_OPCODE);
|
||
|
|
|
||
|
|
#if GH_CRYPTO_ENABLE_DEBUG_PRINT
|
||
|
|
GH_CRYPTO_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_CRYPTO_get_AES_Opcode] --> 0x%08x\n",
|
||
|
|
REG_CRYPTO_AES_OPCODE,value);
|
||
|
|
#endif
|
||
|
|
return value;
|
||
|
|
}
|
||
|
|
GH_INLINE void GH_CRYPTO_set_AES_Opcode_mode(U8 data)
|
||
|
|
{
|
||
|
|
GH_CRYPTO_AES_OPCODE_S d;
|
||
|
|
d.all = *(volatile U32 *)REG_CRYPTO_AES_OPCODE;
|
||
|
|
d.bitc.mode = data;
|
||
|
|
*(volatile U32 *)REG_CRYPTO_AES_OPCODE = d.all;
|
||
|
|
#if GH_CRYPTO_ENABLE_DEBUG_PRINT
|
||
|
|
GH_CRYPTO_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_CRYPTO_set_AES_Opcode_mode] <-- 0x%08x\n",
|
||
|
|
REG_CRYPTO_AES_OPCODE,d.all,d.all);
|
||
|
|
#endif
|
||
|
|
}
|
||
|
|
GH_INLINE U8 GH_CRYPTO_get_AES_Opcode_mode(void)
|
||
|
|
{
|
||
|
|
GH_CRYPTO_AES_OPCODE_S tmp_value;
|
||
|
|
U32 value = (*(volatile U32 *)REG_CRYPTO_AES_OPCODE);
|
||
|
|
|
||
|
|
tmp_value.all = value;
|
||
|
|
#if GH_CRYPTO_ENABLE_DEBUG_PRINT
|
||
|
|
GH_CRYPTO_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_CRYPTO_get_AES_Opcode_mode] --> 0x%08x\n",
|
||
|
|
REG_CRYPTO_AES_OPCODE,value);
|
||
|
|
#endif
|
||
|
|
return tmp_value.bitc.mode;
|
||
|
|
}
|
||
|
|
#endif /* GH_INLINE_LEVEL == 0 */
|
||
|
|
|
||
|
|
/*----------------------------------------------------------------------------*/
|
||
|
|
/* register CRYPTO_AES_Output_Rdy (read) */
|
||
|
|
/*----------------------------------------------------------------------------*/
|
||
|
|
#if GH_INLINE_LEVEL == 0
|
||
|
|
/*! \brief Reads the register 'CRYPTO_AES_Output_Rdy'. */
|
||
|
|
U32 GH_CRYPTO_get_AES_Output_Rdy(void);
|
||
|
|
/*! \brief Reads the bit group 'Rdy' of register 'CRYPTO_AES_Output_Rdy'. */
|
||
|
|
U8 GH_CRYPTO_get_AES_Output_Rdy_Rdy(void);
|
||
|
|
#else /* GH_INLINE_LEVEL == 0 */
|
||
|
|
GH_INLINE U32 GH_CRYPTO_get_AES_Output_Rdy(void)
|
||
|
|
{
|
||
|
|
U32 value = (*(volatile U32 *)REG_CRYPTO_AES_OUTPUT_RDY);
|
||
|
|
|
||
|
|
#if GH_CRYPTO_ENABLE_DEBUG_PRINT
|
||
|
|
GH_CRYPTO_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_CRYPTO_get_AES_Output_Rdy] --> 0x%08x\n",
|
||
|
|
REG_CRYPTO_AES_OUTPUT_RDY,value);
|
||
|
|
#endif
|
||
|
|
return value;
|
||
|
|
}
|
||
|
|
GH_INLINE U8 GH_CRYPTO_get_AES_Output_Rdy_Rdy(void)
|
||
|
|
{
|
||
|
|
GH_CRYPTO_AES_OUTPUT_RDY_S tmp_value;
|
||
|
|
U32 value = (*(volatile U32 *)REG_CRYPTO_AES_OUTPUT_RDY);
|
||
|
|
|
||
|
|
tmp_value.all = value;
|
||
|
|
#if GH_CRYPTO_ENABLE_DEBUG_PRINT
|
||
|
|
GH_CRYPTO_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_CRYPTO_get_AES_Output_Rdy_Rdy] --> 0x%08x\n",
|
||
|
|
REG_CRYPTO_AES_OUTPUT_RDY,value);
|
||
|
|
#endif
|
||
|
|
return tmp_value.bitc.rdy;
|
||
|
|
}
|
||
|
|
#endif /* GH_INLINE_LEVEL == 0 */
|
||
|
|
|
||
|
|
/*----------------------------------------------------------------------------*/
|
||
|
|
/* register CRYPTO_AES_Output (read) */
|
||
|
|
/*----------------------------------------------------------------------------*/
|
||
|
|
#if GH_INLINE_LEVEL == 0
|
||
|
|
/*! \brief Reads the register 'CRYPTO_AES_Output'. */
|
||
|
|
U32 GH_CRYPTO_get_AES_Output(U8 index);
|
||
|
|
#else /* GH_INLINE_LEVEL == 0 */
|
||
|
|
GH_INLINE U32 GH_CRYPTO_get_AES_Output(U8 index)
|
||
|
|
{
|
||
|
|
U32 value = (*(volatile U32 *)(REG_CRYPTO_AES_OUTPUT - index * FIO_MOFFSET(CRYPTO,0x00000004)));
|
||
|
|
|
||
|
|
#if GH_CRYPTO_ENABLE_DEBUG_PRINT
|
||
|
|
GH_CRYPTO_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_CRYPTO_get_AES_Output] --> 0x%08x\n",
|
||
|
|
(REG_CRYPTO_AES_OUTPUT - index * FIO_MOFFSET(CRYPTO,0x00000004)),value);
|
||
|
|
#endif
|
||
|
|
return value;
|
||
|
|
}
|
||
|
|
#endif /* GH_INLINE_LEVEL == 0 */
|
||
|
|
|
||
|
|
/*----------------------------------------------------------------------------*/
|
||
|
|
/* register CRYPTO_AES_Interrupt (read/write) */
|
||
|
|
/*----------------------------------------------------------------------------*/
|
||
|
|
#if GH_INLINE_LEVEL == 0
|
||
|
|
/*! \brief Writes the register 'CRYPTO_AES_Interrupt'. */
|
||
|
|
void GH_CRYPTO_set_AES_Interrupt(U32 data);
|
||
|
|
/*! \brief Reads the register 'CRYPTO_AES_Interrupt'. */
|
||
|
|
U32 GH_CRYPTO_get_AES_Interrupt(void);
|
||
|
|
/*! \brief Writes the bit group 'En' of register 'CRYPTO_AES_Interrupt'. */
|
||
|
|
void GH_CRYPTO_set_AES_Interrupt_En(U8 data);
|
||
|
|
/*! \brief Reads the bit group 'En' of register 'CRYPTO_AES_Interrupt'. */
|
||
|
|
U8 GH_CRYPTO_get_AES_Interrupt_En(void);
|
||
|
|
#else /* GH_INLINE_LEVEL == 0 */
|
||
|
|
GH_INLINE void GH_CRYPTO_set_AES_Interrupt(U32 data)
|
||
|
|
{
|
||
|
|
*(volatile U32 *)REG_CRYPTO_AES_INTERRUPT = data;
|
||
|
|
#if GH_CRYPTO_ENABLE_DEBUG_PRINT
|
||
|
|
GH_CRYPTO_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_CRYPTO_set_AES_Interrupt] <-- 0x%08x\n",
|
||
|
|
REG_CRYPTO_AES_INTERRUPT,data,data);
|
||
|
|
#endif
|
||
|
|
}
|
||
|
|
GH_INLINE U32 GH_CRYPTO_get_AES_Interrupt(void)
|
||
|
|
{
|
||
|
|
U32 value = (*(volatile U32 *)REG_CRYPTO_AES_INTERRUPT);
|
||
|
|
|
||
|
|
#if GH_CRYPTO_ENABLE_DEBUG_PRINT
|
||
|
|
GH_CRYPTO_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_CRYPTO_get_AES_Interrupt] --> 0x%08x\n",
|
||
|
|
REG_CRYPTO_AES_INTERRUPT,value);
|
||
|
|
#endif
|
||
|
|
return value;
|
||
|
|
}
|
||
|
|
GH_INLINE void GH_CRYPTO_set_AES_Interrupt_En(U8 data)
|
||
|
|
{
|
||
|
|
GH_CRYPTO_AES_INTERRUPT_S d;
|
||
|
|
d.all = *(volatile U32 *)REG_CRYPTO_AES_INTERRUPT;
|
||
|
|
d.bitc.en = data;
|
||
|
|
*(volatile U32 *)REG_CRYPTO_AES_INTERRUPT = d.all;
|
||
|
|
#if GH_CRYPTO_ENABLE_DEBUG_PRINT
|
||
|
|
GH_CRYPTO_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_CRYPTO_set_AES_Interrupt_En] <-- 0x%08x\n",
|
||
|
|
REG_CRYPTO_AES_INTERRUPT,d.all,d.all);
|
||
|
|
#endif
|
||
|
|
}
|
||
|
|
GH_INLINE U8 GH_CRYPTO_get_AES_Interrupt_En(void)
|
||
|
|
{
|
||
|
|
GH_CRYPTO_AES_INTERRUPT_S tmp_value;
|
||
|
|
U32 value = (*(volatile U32 *)REG_CRYPTO_AES_INTERRUPT);
|
||
|
|
|
||
|
|
tmp_value.all = value;
|
||
|
|
#if GH_CRYPTO_ENABLE_DEBUG_PRINT
|
||
|
|
GH_CRYPTO_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_CRYPTO_get_AES_Interrupt_En] --> 0x%08x\n",
|
||
|
|
REG_CRYPTO_AES_INTERRUPT,value);
|
||
|
|
#endif
|
||
|
|
return tmp_value.bitc.en;
|
||
|
|
}
|
||
|
|
#endif /* GH_INLINE_LEVEL == 0 */
|
||
|
|
|
||
|
|
/*----------------------------------------------------------------------------*/
|
||
|
|
/* register CRYPTO_EFUSE_BOOT_SW_DIS (read/write) */
|
||
|
|
/*----------------------------------------------------------------------------*/
|
||
|
|
#if GH_INLINE_LEVEL == 0
|
||
|
|
/*! \brief Writes the register 'CRYPTO_EFUSE_BOOT_SW_DIS'. */
|
||
|
|
void GH_CRYPTO_set_EFUSE_BOOT_SW_DIS(U32 data);
|
||
|
|
/*! \brief Reads the register 'CRYPTO_EFUSE_BOOT_SW_DIS'. */
|
||
|
|
U32 GH_CRYPTO_get_EFUSE_BOOT_SW_DIS(void);
|
||
|
|
/*! \brief Writes the bit group 'Efuse_boot_dis' of register 'CRYPTO_EFUSE_BOOT_SW_DIS'. */
|
||
|
|
void GH_CRYPTO_set_EFUSE_BOOT_SW_DIS_Efuse_boot_dis(U8 data);
|
||
|
|
/*! \brief Reads the bit group 'Efuse_boot_dis' of register 'CRYPTO_EFUSE_BOOT_SW_DIS'. */
|
||
|
|
U8 GH_CRYPTO_get_EFUSE_BOOT_SW_DIS_Efuse_boot_dis(void);
|
||
|
|
/*! \brief Writes the bit group 'Efuse_boot_sw' of register 'CRYPTO_EFUSE_BOOT_SW_DIS'. */
|
||
|
|
void GH_CRYPTO_set_EFUSE_BOOT_SW_DIS_Efuse_boot_sw(U8 data);
|
||
|
|
/*! \brief Reads the bit group 'Efuse_boot_sw' of register 'CRYPTO_EFUSE_BOOT_SW_DIS'. */
|
||
|
|
U8 GH_CRYPTO_get_EFUSE_BOOT_SW_DIS_Efuse_boot_sw(void);
|
||
|
|
#else /* GH_INLINE_LEVEL == 0 */
|
||
|
|
GH_INLINE void GH_CRYPTO_set_EFUSE_BOOT_SW_DIS(U32 data)
|
||
|
|
{
|
||
|
|
*(volatile U32 *)REG_CRYPTO_EFUSE_BOOT_SW_DIS = data;
|
||
|
|
#if GH_CRYPTO_ENABLE_DEBUG_PRINT
|
||
|
|
GH_CRYPTO_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_CRYPTO_set_EFUSE_BOOT_SW_DIS] <-- 0x%08x\n",
|
||
|
|
REG_CRYPTO_EFUSE_BOOT_SW_DIS,data,data);
|
||
|
|
#endif
|
||
|
|
}
|
||
|
|
GH_INLINE U32 GH_CRYPTO_get_EFUSE_BOOT_SW_DIS(void)
|
||
|
|
{
|
||
|
|
U32 value = (*(volatile U32 *)REG_CRYPTO_EFUSE_BOOT_SW_DIS);
|
||
|
|
|
||
|
|
#if GH_CRYPTO_ENABLE_DEBUG_PRINT
|
||
|
|
GH_CRYPTO_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_CRYPTO_get_EFUSE_BOOT_SW_DIS] --> 0x%08x\n",
|
||
|
|
REG_CRYPTO_EFUSE_BOOT_SW_DIS,value);
|
||
|
|
#endif
|
||
|
|
return value;
|
||
|
|
}
|
||
|
|
GH_INLINE void GH_CRYPTO_set_EFUSE_BOOT_SW_DIS_Efuse_boot_dis(U8 data)
|
||
|
|
{
|
||
|
|
GH_CRYPTO_EFUSE_BOOT_SW_DIS_S d;
|
||
|
|
d.all = *(volatile U32 *)REG_CRYPTO_EFUSE_BOOT_SW_DIS;
|
||
|
|
d.bitc.efuse_boot_dis = data;
|
||
|
|
*(volatile U32 *)REG_CRYPTO_EFUSE_BOOT_SW_DIS = d.all;
|
||
|
|
#if GH_CRYPTO_ENABLE_DEBUG_PRINT
|
||
|
|
GH_CRYPTO_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_CRYPTO_set_EFUSE_BOOT_SW_DIS_Efuse_boot_dis] <-- 0x%08x\n",
|
||
|
|
REG_CRYPTO_EFUSE_BOOT_SW_DIS,d.all,d.all);
|
||
|
|
#endif
|
||
|
|
}
|
||
|
|
GH_INLINE U8 GH_CRYPTO_get_EFUSE_BOOT_SW_DIS_Efuse_boot_dis(void)
|
||
|
|
{
|
||
|
|
GH_CRYPTO_EFUSE_BOOT_SW_DIS_S tmp_value;
|
||
|
|
U32 value = (*(volatile U32 *)REG_CRYPTO_EFUSE_BOOT_SW_DIS);
|
||
|
|
|
||
|
|
tmp_value.all = value;
|
||
|
|
#if GH_CRYPTO_ENABLE_DEBUG_PRINT
|
||
|
|
GH_CRYPTO_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_CRYPTO_get_EFUSE_BOOT_SW_DIS_Efuse_boot_dis] --> 0x%08x\n",
|
||
|
|
REG_CRYPTO_EFUSE_BOOT_SW_DIS,value);
|
||
|
|
#endif
|
||
|
|
return tmp_value.bitc.efuse_boot_dis;
|
||
|
|
}
|
||
|
|
GH_INLINE void GH_CRYPTO_set_EFUSE_BOOT_SW_DIS_Efuse_boot_sw(U8 data)
|
||
|
|
{
|
||
|
|
GH_CRYPTO_EFUSE_BOOT_SW_DIS_S d;
|
||
|
|
d.all = *(volatile U32 *)REG_CRYPTO_EFUSE_BOOT_SW_DIS;
|
||
|
|
d.bitc.efuse_boot_sw = data;
|
||
|
|
*(volatile U32 *)REG_CRYPTO_EFUSE_BOOT_SW_DIS = d.all;
|
||
|
|
#if GH_CRYPTO_ENABLE_DEBUG_PRINT
|
||
|
|
GH_CRYPTO_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_CRYPTO_set_EFUSE_BOOT_SW_DIS_Efuse_boot_sw] <-- 0x%08x\n",
|
||
|
|
REG_CRYPTO_EFUSE_BOOT_SW_DIS,d.all,d.all);
|
||
|
|
#endif
|
||
|
|
}
|
||
|
|
GH_INLINE U8 GH_CRYPTO_get_EFUSE_BOOT_SW_DIS_Efuse_boot_sw(void)
|
||
|
|
{
|
||
|
|
GH_CRYPTO_EFUSE_BOOT_SW_DIS_S tmp_value;
|
||
|
|
U32 value = (*(volatile U32 *)REG_CRYPTO_EFUSE_BOOT_SW_DIS);
|
||
|
|
|
||
|
|
tmp_value.all = value;
|
||
|
|
#if GH_CRYPTO_ENABLE_DEBUG_PRINT
|
||
|
|
GH_CRYPTO_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_CRYPTO_get_EFUSE_BOOT_SW_DIS_Efuse_boot_sw] --> 0x%08x\n",
|
||
|
|
REG_CRYPTO_EFUSE_BOOT_SW_DIS,value);
|
||
|
|
#endif
|
||
|
|
return tmp_value.bitc.efuse_boot_sw;
|
||
|
|
}
|
||
|
|
#endif /* GH_INLINE_LEVEL == 0 */
|
||
|
|
|
||
|
|
/*----------------------------------------------------------------------------*/
|
||
|
|
/* init function */
|
||
|
|
/*----------------------------------------------------------------------------*/
|
||
|
|
/*! \brief Initialises the registers and mirror variables. */
|
||
|
|
void GH_CRYPTO_init(void);
|
||
|
|
|
||
|
|
#ifdef __cplusplus
|
||
|
|
}
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#endif /* _GH_CRYPTO_H */
|
||
|
|
|
||
|
|
/*----------------------------------------------------------------------------*/
|
||
|
|
/* end of file */
|
||
|
|
/*----------------------------------------------------------------------------*/
|
||
|
|
|