60 lines
2.2 KiB
C
60 lines
2.2 KiB
C
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#ifndef __AM33XX_H__
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#define __AM33XX_H__
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/*
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* COPYRIGHT (C) 2013-2014, Shanghai Real-Thread Technology Co., Ltd
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*
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* All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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*/
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#include "armv7.h"
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#define __REG32(x) (*((volatile unsigned int *)(x)))
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#define __REG16(x) (*((volatile unsigned short *)(x)))
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#define Zynq7000_UART0_BASE 0xE0000000
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#define Zynq7000_UART1_BASE 0xE0001000
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#define Zynq7000_SLCR_BASE 0xF8000000
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#define Zynq7000_SLCR_LOCK 0x004
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#define Zynq7000_SLCR_UNLOCK 0x008
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#define Zynq7000_SLCR_APER_CLK_CTRL 0x12C
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#define Zynq7000_SLCR_UART_CLK_CTRL 0x154
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#define Zynq7000_SLCR_UART_RST_CTRL 0x228
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#define Zynq7000_SLCR_MIO_LOOPBACK 0x804
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#define Zynq7000_SLCR_MIO_MST_TRI0 0x80C
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#define Zynq7000_SLCR_MIO_MST_TRI1 0x810
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#define Zynq7000_SCTL_BASE 0xF8F00000 /* System Controller */
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#define Zynq7000_TIMER_GLOBAL_BASE 0xF8F00200 /* Global 64bit timer */
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#define Zynq7000_GIC_CPU_BASE 0xF8F00100 /* Generic interrupt controller CPU interface */
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#define Zynq7000_GIC_DIST_BASE 0xF8F01000 /* Generic interrupt controller distributor */
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/* zynq on-board gic irq sources */
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#define IRQ_Zynq7000_GTIMER 27
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#define IRQ_Zynq7000_PTIMER 29
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#define IRQ_Zynq7000_AWDT 30
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#define IRQ_Zynq7000_UART0 59
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#define IRQ_Zynq7000_UART1 82
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#define IRQ_Zynq7000_MAXNR 94
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#define ARM_GIC_NR_IRQS IRQ_Zynq7000_MAXNR
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/* only one GIC available */
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#define ARM_GIC_MAX_NR 1
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#endif
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