2022-02-08 15:03:05 +08:00
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#ifndef RT_CONFIG_H__
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#define RT_CONFIG_H__
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/* Automatically generated file; DO NOT EDIT. */
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/* RT-Thread Configuration */
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/* RT-Thread Kernel */
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#define RT_NAME_MAX 8
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#define RT_ALIGN_SIZE 4
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#define RT_THREAD_PRIORITY_32
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#define RT_THREAD_PRIORITY_MAX 32
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#define RT_TICK_PER_SECOND 1000
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#define RT_USING_OVERFLOW_CHECK
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#define RT_USING_HOOK
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#define RT_HOOK_USING_FUNC_PTR
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#define RT_USING_IDLE_HOOK
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#define RT_IDLE_HOOK_LIST_SIZE 4
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#define IDLE_THREAD_STACK_SIZE 1024
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/* kservice optimization */
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#define RT_DEBUG
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#define RT_DEBUG_COLOR
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/* Inter-Thread communication */
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#define RT_USING_SEMAPHORE
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#define RT_USING_MUTEX
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#define RT_USING_EVENT
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#define RT_USING_MAILBOX
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#define RT_USING_MESSAGEQUEUE
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#define RT_USING_SIGNALS
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/* Memory Management */
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#define RT_USING_MEMPOOL
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#define RT_USING_SMALL_MEM
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#define RT_USING_SMALL_MEM_AS_HEAP
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#define RT_USING_HEAP
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/* Kernel Device Object */
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#define RT_USING_DEVICE
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#define RT_USING_CONSOLE
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#define RT_CONSOLEBUF_SIZE 256
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#define RT_CONSOLE_DEVICE_NAME "uart0"
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#define RT_VER_NUM 0x40100
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#define ARCH_ARM
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#define RT_USING_CPU_FFS
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#define ARCH_ARM_CORTEX_M
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#define ARCH_ARM_CORTEX_M4
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/* RT-Thread Components */
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#define RT_USING_COMPONENTS_INIT
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#define RT_USING_USER_MAIN
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#define RT_MAIN_THREAD_STACK_SIZE 2048
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#define RT_MAIN_THREAD_PRIORITY 10
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#define RT_USING_MSH
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2022-03-29 07:10:35 +08:00
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#define RT_USING_FINSH
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2022-02-08 15:03:05 +08:00
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#define FINSH_USING_MSH
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#define FINSH_THREAD_NAME "tshell"
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#define FINSH_THREAD_PRIORITY 20
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#define FINSH_THREAD_STACK_SIZE 2048
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#define FINSH_USING_HISTORY
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#define FINSH_HISTORY_LINES 5
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#define FINSH_USING_SYMTAB
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#define FINSH_CMD_SIZE 80
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#define MSH_USING_BUILT_IN_COMMANDS
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#define FINSH_USING_DESCRIPTION
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#define FINSH_ARG_MAX 10
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#define RT_USING_DFS
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#define DFS_USING_POSIX
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#define DFS_USING_WORKDIR
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#define DFS_FILESYSTEMS_MAX 8
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#define DFS_FILESYSTEM_TYPES_MAX 4
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#define DFS_FD_MAX 32
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#define RT_USING_DFS_ELMFAT
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/* elm-chan's FatFs, Generic FAT Filesystem Module */
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#define RT_DFS_ELM_CODE_PAGE 437
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#define RT_DFS_ELM_WORD_ACCESS
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#define RT_DFS_ELM_USE_LFN_3
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#define RT_DFS_ELM_USE_LFN 3
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#define RT_DFS_ELM_LFN_UNICODE_0
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#define RT_DFS_ELM_LFN_UNICODE 0
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#define RT_DFS_ELM_MAX_LFN 255
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#define RT_DFS_ELM_DRIVES 8
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#define RT_DFS_ELM_MAX_SECTOR_SIZE 4096
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#define RT_DFS_ELM_REENTRANT
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#define RT_DFS_ELM_MUTEX_TIMEOUT 3000
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#define RT_USING_DFS_DEVFS
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2022-03-29 07:10:35 +08:00
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#define RT_USING_FAL
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#define FAL_DEBUG_CONFIG
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#define FAL_DEBUG 1
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#define FAL_PART_HAS_TABLE_CFG
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2022-02-08 15:03:05 +08:00
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/* Device Drivers */
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#define RT_USING_DEVICE_IPC
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#define RT_USING_SYSTEM_WORKQUEUE
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#define RT_SYSTEM_WORKQUEUE_STACKSIZE 2048
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#define RT_SYSTEM_WORKQUEUE_PRIORITY 23
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#define RT_USING_SERIAL
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#define RT_USING_SERIAL_V1
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#define RT_SERIAL_USING_DMA
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#define RT_SERIAL_RB_BUFSZ 2048
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#define RT_USING_CAN
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#define RT_USING_HWTIMER
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#define RT_USING_I2C
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#define RT_USING_I2C_BITOPS
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#define RT_USING_PIN
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#define RT_USING_ADC
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#define RT_USING_PWM
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#define RT_USING_PM
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#define PM_TICKLESS_THRESHOLD_TIME 2
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#define RT_USING_RTC
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#define RT_USING_SPI
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#define RT_USING_QSPI
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#define RT_USING_SFUD
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#define RT_SFUD_USING_SFDP
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#define RT_SFUD_USING_FLASH_INFO_TABLE
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#define RT_SFUD_SPI_MAX_HZ 50000000
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#define RT_USING_WDT
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#define RT_USING_AUDIO
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#define RT_AUDIO_REPLAY_MP_BLOCK_SIZE 4096
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#define RT_AUDIO_REPLAY_MP_BLOCK_COUNT 2
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#define RT_AUDIO_RECORD_PIPE_SIZE 2048
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#define RT_USING_SENSOR
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#define RT_USING_SENSOR_CMD
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#define RT_USING_HWCRYPTO
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#define RT_HWCRYPTO_DEFAULT_NAME "hwcryto"
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#define RT_HWCRYPTO_IV_MAX_SIZE 16
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#define RT_HWCRYPTO_KEYBIT_MAX_SIZE 256
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#define RT_HWCRYPTO_USING_AES
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#define RT_HWCRYPTO_USING_AES_ECB
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#define RT_HWCRYPTO_USING_AES_CBC
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#define RT_HWCRYPTO_USING_AES_CFB
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#define RT_HWCRYPTO_USING_AES_CTR
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#define RT_HWCRYPTO_USING_AES_OFB
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#define RT_HWCRYPTO_USING_DES
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#define RT_HWCRYPTO_USING_DES_ECB
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#define RT_HWCRYPTO_USING_DES_CBC
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#define RT_HWCRYPTO_USING_3DES
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#define RT_HWCRYPTO_USING_3DES_ECB
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#define RT_HWCRYPTO_USING_3DES_CBC
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#define RT_HWCRYPTO_USING_SHA1
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#define RT_HWCRYPTO_USING_SHA2
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#define RT_HWCRYPTO_USING_SHA2_224
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#define RT_HWCRYPTO_USING_SHA2_256
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#define RT_HWCRYPTO_USING_SHA2_384
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#define RT_HWCRYPTO_USING_SHA2_512
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#define RT_HWCRYPTO_USING_RNG
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#define RT_HWCRYPTO_USING_CRC
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#define RT_HWCRYPTO_USING_CRC_07
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#define RT_HWCRYPTO_USING_CRC_8005
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#define RT_HWCRYPTO_USING_CRC_1021
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#define RT_HWCRYPTO_USING_CRC_04C11DB7
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/* Using USB */
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#define RT_USING_USB
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#define RT_USING_USB_HOST
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#define RT_USBH_MSTORAGE
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#define UDISK_MOUNTPOINT "/mnt/udisk/"
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#define RT_USING_USB_DEVICE
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#define RT_USBD_THREAD_STACK_SZ 4096
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#define USB_VENDOR_ID 0x0FFE
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#define USB_PRODUCT_ID 0x0001
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#define _RT_USB_DEVICE_HID
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#define RT_USB_DEVICE_HID
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#define RT_USB_DEVICE_HID_MOUSE
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2022-03-29 07:10:35 +08:00
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/* C/C++ and POSIX layer */
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2022-02-08 15:03:05 +08:00
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#define RT_LIBC_DEFAULT_TIMEZONE 8
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/* POSIX (Portable Operating System Interface) layer */
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#define RT_USING_POSIX_FS
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#define RT_USING_POSIX_DEVIO
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#define RT_USING_POSIX_POLL
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#define RT_USING_POSIX_SELECT
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/* Interprocess Communication (IPC) */
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/* Socket is in the 'Network' category */
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2022-03-29 07:10:35 +08:00
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/* Network */
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2022-02-08 15:03:05 +08:00
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#define RT_USING_SAL
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#define SAL_INTERNET_CHECK
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/* protocol stack implement */
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#define SAL_USING_AT
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#define SAL_USING_POSIX
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#define RT_USING_NETDEV
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#define NETDEV_USING_IFCONFIG
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#define NETDEV_USING_PING
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#define NETDEV_USING_NETSTAT
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#define NETDEV_USING_AUTO_DEFAULT
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#define NETDEV_IPV4 1
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#define NETDEV_IPV6 0
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#define RT_USING_AT
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#define AT_USING_CLIENT
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#define AT_CLIENT_NUM_MAX 1
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#define AT_USING_SOCKET
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#define AT_USING_CLI
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#define AT_CMD_MAX_LEN 512
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#define AT_SW_VERSION_NUM 0x10301
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/* Utilities */
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#define RT_USING_UTEST
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#define UTEST_THR_STACK_SIZE 4096
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#define UTEST_THR_PRIORITY 20
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/* RT-Thread Utestcases */
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/* RT-Thread online packages */
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/* IoT - internet of things */
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/* Wi-Fi */
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/* Marvell WiFi */
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/* Wiced WiFi */
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#define PKG_USING_AT_DEVICE
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#define AT_DEVICE_USING_ESP8266
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#define AT_DEVICE_ESP8266_INIT_ASYN
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#define AT_DEVICE_ESP8266_SOCKET
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#define PKG_USING_AT_DEVICE_LATEST_VERSION
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#define PKG_AT_DEVICE_VER_NUM 0x99999
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/* IoT Cloud */
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/* security packages */
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/* language packages */
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2022-03-29 07:10:35 +08:00
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/* JSON: JavaScript Object Notation, a lightweight data-interchange format */
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/* XML: Extensible Markup Language */
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2022-02-08 15:03:05 +08:00
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/* multimedia packages */
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/* LVGL: powerful and easy-to-use embedded GUI library */
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/* u8g2: a monochrome graphic library */
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/* PainterEngine: A cross-platform graphics application framework written in C language */
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/* tools packages */
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/* system packages */
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/* enhanced kernel services */
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/* POSIX extension functions */
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/* acceleration: Assembly language or algorithmic acceleration packages */
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/* CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */
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/* Micrium: Micrium software products porting for RT-Thread */
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/* peripheral libraries and drivers */
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/* AI packages */
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/* miscellaneous packages */
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2022-03-29 07:10:35 +08:00
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/* project laboratory */
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2022-02-08 15:03:05 +08:00
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/* samples: kernel and components samples */
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/* entertainment: terminal games and other interesting software packages */
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/* Hardware Drivers Config */
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/* On-chip Peripheral Drivers */
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#define SOC_SERIES_M480
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#define BSP_USE_STDDRIVER_SOURCE
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#define BSP_USING_PDMA
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#define NU_PDMA_MEMFUN_ACTOR_MAX 2
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#define NU_PDMA_SGTBL_POOL_SIZE 16
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#define BSP_USING_FMC
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#define BSP_USING_GPIO
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#define BSP_USING_CLK
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#define NU_CLK_INVOKE_WKTMR
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#define BSP_USING_RTC
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#define NU_RTC_SUPPORT_MSH_CMD
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#define BSP_USING_TMR
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#define BSP_USING_UART
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#define BSP_USING_UART0
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#define BSP_USING_UART1
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#define BSP_USING_UART1_TX_DMA
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#define BSP_USING_UART1_RX_DMA
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#define BSP_USING_UART2
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#define BSP_USING_UART2_TX_DMA
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#define BSP_USING_UART2_RX_DMA
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#define BSP_USING_I2C
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#define BSP_USING_I2C0
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#define BSP_USING_I2C1
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#define BSP_USING_I2C2
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#define BSP_USING_USCI
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#define BSP_USING_UUART
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#define BSP_USING_USCI0
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#define BSP_USING_UUART0
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#define BSP_USING_UUART0_TX_DMA
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#define BSP_USING_UUART0_RX_DMA
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#define BSP_USING_SDH
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#define BSP_USING_SDH0
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#define NU_SDH_USING_PDMA
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#define NU_SDH_HOTPLUG
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#define BSP_USING_SPI
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#define BSP_USING_SPI_PDMA
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#define BSP_USING_SPI0_NONE
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#define BSP_USING_SPI1
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#define BSP_USING_SPI1_PDMA
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#define BSP_USING_SPI2
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#define BSP_USING_SPI3_NONE
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#define BSP_USING_I2S
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#define NU_I2S_DMA_FIFO_SIZE 2048
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#define BSP_USING_QSPI
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#define BSP_USING_QSPI0
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#define BSP_USING_CRYPTO
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#define BSP_USING_CRC
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#define NU_CRC_USE_PDMA
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#define BSP_USING_WDT
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#define BSP_USING_USBD
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#define BSP_USING_HSUSBH
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#define NU_USBHOST_HUB_POLLING_INTERVAL 100
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/* On-board Peripheral Drivers */
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#define BSP_USING_NULINKME
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#define BOARD_USING_ESP8266
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#define BOARD_USING_BMX055
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#define BOARD_USING_NAU88L25
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#define BOARD_USING_STORAGE_SDCARD
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#define BOARD_USING_STORAGE_SPIFLASH
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#define BOARD_USING_USB_D_H
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#define BOARD_USING_HSUSBH_USBD
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/* Board extended module drivers */
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/* Nuvoton Packages Config */
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#define NU_PKG_USING_UTILS
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#define NU_PKG_USING_DEMO
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#define NU_PKG_USING_BMX055
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#define NU_PKG_USING_NAU88L25
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#endif
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