375 lines
7.9 KiB
ArmAsm
375 lines
7.9 KiB
ArmAsm
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/*
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* File : start.S
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2006, RT-Thread Development Team
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http:/*openlab.rt-thread.com/license/LICENSE
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*
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* Change Logs:
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* Date Author Notes
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* 2013-07-13 Peng Fan First implementation
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*/
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#define CONFIG_STACKSIZE 1024
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#define S_FRAME_SIZE 132
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#define S_OLD_R0 132
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#define S_PSR 128
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#define S_PC 124
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#define S_LR 120
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#define S_SP 116
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#define S_IP 112
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#define S_FP 108
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#define S_R26 104
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#define S_R25 100
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#define S_R24 96
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#define S_R23 92
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#define S_R22 88
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#define S_R21 84
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#define S_R20 80
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#define S_R19 76
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#define S_R18 72
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#define S_R17 68
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#define S_R16 64
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#define S_R15 60
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#define S_R14 56
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#define S_R13 52
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#define S_R12 48
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#define S_R11 44
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#define S_R10 40
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#define S_R9 36
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#define S_R8 32
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#define S_R7 28
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#define S_R6 24
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#define S_R5 20
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#define S_R4 16
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#define S_R3 12
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#define S_R2 8
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#define S_R1 4
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#define S_R0 0
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.equ USERMODE, 0x10
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.equ REALMODE, 0x11
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.equ IRQMODE, 0x12
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.equ PRIVMODE, 0x13
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.equ TRAPMODE, 0x17
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.equ EXTNMODE, 0x1b
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.equ MODEMASK, 0x1f
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.equ NOINT, 0xc0
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.equ RAM_BASE, 0x00000000 /*Start address of RAM */
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/*
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*************************************************************************
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*
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* Jump vector table
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*
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*************************************************************************
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*/
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.section .init, "ax"
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.code 32
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.globl _start
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_start:
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b reset
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ldw pc, _extend_handle
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ldw pc, _swi_handle
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ldw pc, _iabort_handle
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ldw pc, _dabort_handle
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ldw pc, _reserve_handle
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ldw pc, _IRQ_handle
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ldw pc, _FIQ_handle
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_extend_handle: .word extend_handle
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_swi_handle: .word swi_handle
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_iabort_handle: .word iabort_handle
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_dabort_handle: .word dabort_handle
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_reserve_handle: .word reserve_handle
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_IRQ_handle: .word IRQ_handle
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_FIQ_handle: .word FIQ_handle
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.balignl 16,0xdeadbeef
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/*
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*************************************************************************
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*
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* Startup Code (reset vector)
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* relocate armboot to ram
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* setup stack
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* jump to second stage
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*
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*************************************************************************
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*/
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.global _TEXT_BASE
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_TEXT_BASE:
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.word TEXT_BASE
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.globl _rtthread_start
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_rtthread_start:
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.word _start
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.globl _rtthread_end
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_rtthread_end:
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.word _end
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.globl _bss_start
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_bss_start:
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.word __bss_start @ load end address
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.globl _bss_end
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_bss_end:
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.word __bss_end
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.globl IRQ_STACK_START
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IRQ_STACK_START:
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.word _irq_stack_start + 10240 - 4
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.globl FIQ_STACK_START
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FIQ_STACK_START:
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.word _fiq_stack_start +1024
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/*peng not sure*/
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.globl UNDEFINED_STACK_START
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UNDEFINED_STACK_START:
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.word _undefined_stack_start + CONFIG_STACKSIZE
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.globl ABORT_STACK_START
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ABORT_STACK_START:
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.word _abort_stack_start + CONFIG_STACKSIZE
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.globl _STACK_START
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_STACK_START:
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.word _priv_stack_start + 40960 - 4
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.equ SEP6200_VIC_BASE, 0xb0000000
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.equ SEP6200_SYSCTL_BASE, 0xb0008000
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/* ----------------------------------entry------------------------------*/
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reset:
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/* set the cpu to PRIV mode and disable cpu interrupt */
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mov r0, asr
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andn r0, r0, #0xff
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or r0, r0, #PRIVMODE|NOINT
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mov.a asr, r0
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/* mask all IRQs by clearing all bits in the INTMRs */
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ldw r1, =SEP6200_VIC_BASE
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ldw r0, =0xffffffff
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stw r0, [r1+], #0x20 /*interrupt enable clear*/
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stw r0, [r1+], #0x24
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/*remap ddr to 0x00000000 address*/
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ldw r1, =SEP6200_SYSCTL_BASE
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ldw r0, [r1+]
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ldw r2, =0x80000000
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or r0, r0, r2
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stw r2, [r1+]
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/* set interrupt vector */
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/*do nothing here for vector*/
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/* setup stack */
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b.l stack_setup
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ldw r12, =0x100
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ldw r0, = 0x40000000
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ldw r1, = 0x00000000
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copy_vetor:
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ldw r2, [r0]
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stw r2, [r1]
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add r0, r0, #4
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add r1, r1, #4
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sub r12, r12, #4
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cmpsub.a r12, #0
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bne copy_vetor
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/* clear .bss */
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ldw r0, _bss_start /* bss start */
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ldw r1, _bss_end /* bss end */
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mov r2,#0 /* get a zero */
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bss_loop:
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stw r2, [r0] @ clear loop...
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add r0, r0, #4
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cmpsub.a r0, r1
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bel bss_loop
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/* call C++ constructors of global objects */
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ldw r0, =__ctors_start__
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ldw r1, =__ctors_end__
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ctor_loop:
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cmpsub.a r0, r1
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beq ctor_end
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ldw.w r2, [r0]+, #4
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stm.w (r0, r1), [sp-]
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add lr, pc, #4
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mov pc, r2
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ldm.w (r0, r1), [sp]+
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b ctor_loop
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ctor_end:
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/*enable interrupt*/
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mov r0, asr
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andn r1, r0, #NOINT
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mov.a asr, r1
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/* start RT-Thread Kernel */
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ldw pc, _rtthread_startup
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_rtthread_startup:
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.word rtthread_startup
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/*
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*************************************************************************
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*
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* Interrupt handling
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*
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*************************************************************************
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*/
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/* exception handlers */
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/*Just simple implementation here peng*/
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.align 5
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extend_handle:
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b extend_handle
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swi_handle:
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b swi_handle
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iabort_handle:
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b iabort_handle
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dabort_handle:
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b dabort_handle
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reserve_handle:
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b reserve_handle
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.globl rt_interrupt_enter
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.globl rt_interrupt_leave
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.globl rt_thread_switch_interrupt_flag
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.globl rt_interrupt_from_thread
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.globl rt_interrupt_to_thread
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IRQ_handle:
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stm.w (lr), [sp-]
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stm.w (r16 - r28), [sp-]
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stm.w (r0 - r15), [sp-]
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b.l rt_interrupt_enter
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b.l rt_hw_trap_irq
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b.l rt_interrupt_leave
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/* if rt_thread_switch_interrupt_flag set, jump to _interrupt_thread_switch and don't return */
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ldw r0, =rt_thread_switch_interrupt_flag
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ldw r1, [r0+]
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cmpsub.a r1, #1
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beq _interrupt_thread_switch
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ldm.w (r0 - r15), [sp]+
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ldm.w (r16 - r28), [sp]+
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ldm.w (lr), [sp]+
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mov.a pc, lr
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.align 5
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FIQ_handle:
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mov r0, #0x44
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b.l printhex
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mov pc, lr
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_interrupt_thread_switch:
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mov r1, #0 /* clear rt_thread_switch_interrupt_flag*/
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stw r1, [r0+]
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/*reload register*/
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ldm.w (r0 - r15), [sp]+
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ldm.w (r16 - r28), [sp]+
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ldm.w (lr), [sp]+
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stm.w (r0-r3), [sp-] /*save r0-r3*/
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mov r1, sp
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add sp, sp, #16 /* restore sp */
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mov r2, lr /* save old task's pc to r2 */
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#if 0
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mov r3, bsr /* disable interrupt */
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/*or r0, r3, #NOINT*/
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mov.a bsr, r3
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ldw r0, =.+8 /* switch to interrupted task's stack */
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mov.a pc, r0 /*switch bsr to asr, irq to priv mode*/
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#endif
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mov r3, bsr
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mov r0, #0xd3 /*I:F:0:PRIV*/
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mov.a asr, r0
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stm.w (r2), [sp-] /* push old task's pc */
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/* push old task's registers */
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stm.w (r16, r17, r18, r19, r20, r21, r22, r23, r24, r25, r26, r27, r28, lr), [sp-]
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stm.w (r4, r5, r6, r7, r8, r9, r10, r11, r12, r13, r14, r15), [sp-]
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mov r4, r1 /* Special optimised code below */
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mov r5, r3 /*pengpengpengpeng*/
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ldm.w (r0,r1, r2, r3), [r4]+
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stm.w (r0, r1, r2, r3), [sp-] /*push old task's r3-r0*/
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stm.w (r5), [sp-] /* push old task's asr */
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mov r4, bsr
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stm.w (r4), [sp-] /* push old task's bsr I am not sure peng*/
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ldw r4, =rt_interrupt_from_thread
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ldw r5, [r4+]
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stw sp, [r5+] /* store sp in preempted tasks's TCB*/
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ldw r6, =rt_interrupt_to_thread
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ldw r6, [r6+]
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ldw sp, [r6+] /* get new task's stack pointer */
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ldm.w (r4), [sp]+ /* pop new task's spsr */
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mov.a bsr, r4
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ldm.w (r4), [sp]+ /* pop new task's psr */
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mov.a asr, r4
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/* pop new task's r0-r28,lr & pc */
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ldm.w (r0 - r15), [sp]+
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ldm.w (r16 - r28), [sp]+
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ldm.w (lr), [sp]+
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/*peng*/
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ldm.w (pc), [sp]+
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#if 0
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mov r0, lr
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b.l printhex
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ldm.w (r0), [sp]+
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b.l printhex
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#endif
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stack_setup:
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/*irq*/
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mov ip, lr
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mov r0, asr
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andn r0, r0, #0x1f
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or r0, r0, #IRQMODE|NOINT
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mov.a asr, r0 /*IRQMODE*/
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ldw r0, =IRQ_STACK_START
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ldw sp, [r0+]
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/*ldw sp, IRQ_STACK_START*/
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/*priv*/
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mov r0, asr
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andn r0, r0, #0x1f
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or r0, r0, #PRIVMODE|NOINT
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mov.a asr, r0 /*PRIVMODE*/
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ldw r0, =_STACK_START
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ldw sp, [r0+]
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/*ldw sp, _STACK_START*/
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mov lr, ip
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/*fiq and other mode is not implemented in code here*/
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mov pc, lr /*lr may not be valid for the mode changes*/
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/*/*}*/
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