2018-02-08 15:27:53 +08:00
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/*
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* File : drv_uart.h
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2017, RT-Thread Development Team
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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*
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* Change Logs:
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* Date Author Notes
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* 2018-02-08 RT-Thread the first version
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*/
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#ifndef __DRV_UART_H__
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#define __DRV_UART_H__
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#define UART0_BASE_ADDR (0x01C25000)
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#define UART1_BASE_ADDR (0x01C25400)
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#define UART2_BASE_ADDR (0x01C25800)
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#define UART_THR (0X00)
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#define UART_RHB (0X00)
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#define UART_DLL (0X00)
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#define UART_DLH (0X04)
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#define UART_IER (0X04)
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#define UART_IIR (0X08)
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#define UART_FCR (0X08)
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#define UART_LCR (0X0C)
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#define UART_MCR (0X10)
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#define UART_LSR (0X14)
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#define UART_MSR (0X18)
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#define UART_SCH (0X1C)
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#define UART_USR (0X7C)
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#define UART_TFL (0X80)
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#define UART_RFL (0X84)
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#define UART_HSK (0X88)
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#define UART_HALT (0XA4)
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#define UART_DBG_DLL (0XB0)
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#define UART_DBG_DLH (0XB4)
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struct tina_uart
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{
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volatile rt_uint32_t rx_tx_dll; /* 0x00 */
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volatile rt_uint32_t dlh_ier; /* 0x04 */
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volatile rt_uint32_t iir_fcr; /* 0x08 */
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volatile rt_uint32_t lcr; /* 0x0C */
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volatile rt_uint32_t mcr; /* 0x10 */
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volatile rt_uint32_t lsr; /* 0x14 */
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volatile rt_uint32_t msr; /* 0x18 */
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volatile rt_uint32_t sch; /* 0x1C */
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volatile rt_uint32_t reserved0[23];
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volatile rt_uint32_t usr; /* 0x7c */
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volatile rt_uint32_t tfl; /* 0x80 */
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volatile rt_uint32_t rfl; /* 0x84 */
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volatile rt_uint32_t hsk; /* 0x88 */
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volatile rt_uint32_t reserved1[6];
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volatile rt_uint32_t halt; /* 0xa4 */
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volatile rt_uint32_t reserved2[2];
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volatile rt_uint32_t dbg_dll; /* 0xb0 */
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volatile rt_uint32_t dbg_dlh; /* 0xb4 */
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};
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typedef struct tina_uart *tina_uart_t;
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2018-02-27 10:47:49 +08:00
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#define UART0 ((tina_uart_t)UART0_BASE_ADDR)
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#define UART1 ((tina_uart_t)UART1_BASE_ADDR)
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#define UART2 ((tina_uart_t)UART2_BASE_ADDR)
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2018-02-08 15:27:53 +08:00
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int rt_hw_uart_init(void);
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#endif /* __DRV_UART_H__ */
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