2023-05-11 10:25:21 +08:00
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/*
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* Copyright (c) 2006-2023, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Email: opensource_embedded@phytium.com.cn
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*
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* Change Logs:
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* Date Author Notes
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* 2023-04-27 huanghe first version
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2023-08-02 13:27:09 +08:00
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* 2023-07-27 zhangyan add qspi io space
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2023-05-11 10:25:21 +08:00
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*
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*/
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#include "rtconfig.h"
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#include <board.h>
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#include <mmu.h>
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/* mmu config */
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#ifdef RT_USING_SMART
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#if defined(TARGET_ARMV8_AARCH64)
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struct mem_desc platform_mem_desc[] =
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{
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{ KERNEL_VADDR_START,
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KERNEL_VADDR_START + 0x0fffffff,
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(rt_size_t)ARCH_MAP_FAILED,
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NORMAL_MEM
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}
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};
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#else
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struct mem_desc platform_mem_desc[] =
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{
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{ KERNEL_VADDR_START,
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KERNEL_VADDR_START + 0x10000000,
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(rt_size_t)ARCH_MAP_FAILED,
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NORMAL_MEM
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}
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};
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#endif
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#else
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#if defined(TARGET_ARMV8_AARCH64)
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struct mem_desc platform_mem_desc[] = {
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{KERNEL_VADDR_START, DDR_END_ADDRESS , KERNEL_VADDR_START, NORMAL_MEM},
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{
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0x28000000U,
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0x32B36FFFU,
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0x28000000U,
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DEVICE_MEM
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},
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2023-08-02 13:27:09 +08:00
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{
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0x00001000U,
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0x0FFFFFFFU,
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0x00001000U,
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DEVICE_MEM
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},
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2023-05-11 10:25:21 +08:00
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};
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#else
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struct mem_desc platform_mem_desc[] =
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{
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{
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0x00U,
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0x00U + 0x40000000U,
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0x00U,
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DEVICE_MEM
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},
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{
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0x40000000U,
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0x40000000U + 0x10000000U,
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0x40000000U,
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DEVICE_MEM
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},
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{
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0x50000000U,
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0x50000000U + 0x30000000U,
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0x50000000U,
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DEVICE_MEM
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},
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{
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0x80000000U,
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0xffffffffU,
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0x80000000U,
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NORMAL_MEM
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},
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#if defined(TARGET_ARMV8_AARCH64)
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{
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0x1000000000,
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0x1000000000 + 0x1000000000,
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0x1000000000,
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DEVICE_MEM
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},
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{
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0x2000000000,
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0x2000000000 + 0x2000000000,
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0x2000000000,
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NORMAL_MEM
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},
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#endif
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};
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#endif
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#endif
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const rt_uint32_t platform_mem_desc_size = sizeof(platform_mem_desc) / sizeof(platform_mem_desc[0]);
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