299 lines
7.2 KiB
C
299 lines
7.2 KiB
C
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/**************************************************************************//**
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*
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* @copyright (C) 2020 Nuvoton Technology Corp. All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2022-3-15 Wayne First version
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*
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******************************************************************************/
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#include <rtconfig.h>
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#if defined(BSP_USING_TIMER) && defined(RT_USING_HWTIMER)
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#include <rtdevice.h>
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#include "NuMicro.h"
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/* Private define ---------------------------------------------------------------*/
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#define NU_TIMER_DEVICE(timer) (nu_timer_t)(timer)
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enum
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{
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TIMER_START = -1,
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#if defined(BSP_USING_TIMER0)
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TIMER0_IDX,
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#endif
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#if defined(BSP_USING_TIMER1)
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TIMER1_IDX,
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#endif
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#if defined(BSP_USING_TIMER2)
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TIMER2_IDX,
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#endif
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#if defined(BSP_USING_TIMER3)
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TIMER3_IDX,
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#endif
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TIMER_CNT
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};
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/* Private typedef --------------------------------------------------------------*/
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struct nu_timer
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{
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rt_hwtimer_t parent;
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char *name;
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TIMER_T *base;
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IRQn_Type irqn;
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uint32_t rstidx;
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uint32_t modid;
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};
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typedef struct nu_timer *nu_timer_t;
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/* Private functions ------------------------------------------------------------*/
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static void nu_timer_init(rt_hwtimer_t *timer, rt_uint32_t state);
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static rt_err_t nu_timer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hwtimer_mode_t opmode);
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static void nu_timer_stop(rt_hwtimer_t *timer);
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static rt_uint32_t nu_timer_count_get(rt_hwtimer_t *timer);
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static rt_err_t nu_timer_control(rt_hwtimer_t *timer, rt_uint32_t cmd, void *args);
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/* Public functions -------------------------------------------------------------*/
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/* Private variables ------------------------------------------------------------*/
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static struct nu_timer nu_timer_arr [] =
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{
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#if defined(BSP_USING_TIMER0)
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{ .name = "timer0", .base = TIMER0, .irqn = TMR0_IRQn, .rstidx = TMR0_RST, .modid = TMR0_MODULE },
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#endif
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#if defined(BSP_USING_TIMER1)
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{ .name = "timer1", .base = TIMER1, .irqn = TMR1_IRQn, .rstidx = TMR1_RST, .modid = TMR1_MODULE },
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#endif
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#if defined(BSP_USING_TIMER2)
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{ .name = "timer2", .base = TIMER2, .irqn = TMR2_IRQn, .rstidx = TMR2_RST, .modid = TMR2_MODULE },
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#endif
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#if defined(BSP_USING_TIMER3)
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{ .name = "timer3", .base = TIMER3, .irqn = TMR3_IRQn, .rstidx = TMR3_RST, .modid = TMR3_MODULE },
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#endif
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};
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static struct rt_hwtimer_info nu_timer_info =
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{
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12000000, /* maximum count frequency */
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46875, /* minimum count frequency */
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0xFFFFFF, /* the maximum counter value */
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HWTIMER_CNTMODE_UP, /* Increment or Decreasing count mode */
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};
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static struct rt_hwtimer_ops nu_timer_ops =
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{
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nu_timer_init,
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nu_timer_start,
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nu_timer_stop,
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nu_timer_count_get,
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nu_timer_control
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};
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/* Functions define ------------------------------------------------------------*/
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static void nu_timer_init(rt_hwtimer_t *timer, rt_uint32_t state)
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{
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nu_timer_t psNuTmr = NU_TIMER_DEVICE(timer);
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RT_ASSERT(psNuTmr != RT_NULL);
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if (1 == state)
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{
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uint32_t timer_clk;
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struct rt_hwtimer_info *info = &nu_timer_info;
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timer_clk = TIMER_GetModuleClock(psNuTmr->base);
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info->maxfreq = timer_clk;
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info->minfreq = timer_clk / 256;
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TIMER_Open(psNuTmr->base, TIMER_ONESHOT_MODE, 1);
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TIMER_EnableInt(psNuTmr->base);
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NVIC_EnableIRQ(psNuTmr->irqn);
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}
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else
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{
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NVIC_DisableIRQ(psNuTmr->irqn);
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TIMER_DisableInt(psNuTmr->base);
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TIMER_Close(psNuTmr->base);
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}
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}
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static rt_err_t nu_timer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hwtimer_mode_t opmode)
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{
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rt_err_t ret = RT_EINVAL;
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rt_uint32_t u32OpMode;
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nu_timer_t psNuTmr = NU_TIMER_DEVICE(timer);
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RT_ASSERT(psNuTmr != RT_NULL);
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if (cnt <= 1 || cnt > 0xFFFFFF)
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{
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goto exit_nu_timer_start;
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}
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switch (opmode)
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{
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case HWTIMER_MODE_PERIOD:
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u32OpMode = TIMER_PERIODIC_MODE;
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break;
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case HWTIMER_MODE_ONESHOT:
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u32OpMode = TIMER_ONESHOT_MODE;
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break;
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default:
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goto exit_nu_timer_start;
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}
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TIMER_SET_CMP_VALUE(psNuTmr->base, cnt);
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TIMER_SET_OPMODE(psNuTmr->base, u32OpMode);
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TIMER_EnableInt(psNuTmr->base);
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NVIC_EnableIRQ(psNuTmr->irqn);
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TIMER_Start(psNuTmr->base);
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ret = RT_EOK;
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exit_nu_timer_start:
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return -(ret);
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}
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static void nu_timer_stop(rt_hwtimer_t *timer)
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{
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nu_timer_t psNuTmr = NU_TIMER_DEVICE(timer);
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RT_ASSERT(psNuTmr != RT_NULL);
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NVIC_DisableIRQ(psNuTmr->irqn);
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TIMER_DisableInt(psNuTmr->base);
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TIMER_Stop(psNuTmr->base);
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TIMER_ResetCounter(psNuTmr->base);
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}
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static rt_uint32_t nu_timer_count_get(rt_hwtimer_t *timer)
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{
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nu_timer_t psNuTmr = NU_TIMER_DEVICE(timer);
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RT_ASSERT(psNuTmr != RT_NULL);
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return TIMER_GetCounter(psNuTmr->base);
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}
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static rt_err_t nu_timer_control(rt_hwtimer_t *timer, rt_uint32_t cmd, void *args)
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{
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rt_err_t ret = RT_EOK;
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nu_timer_t psNuTmr = NU_TIMER_DEVICE(timer);
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RT_ASSERT(psNuTmr != RT_NULL);
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switch (cmd)
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{
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case HWTIMER_CTRL_FREQ_SET:
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{
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uint32_t clk;
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uint32_t pre;
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clk = TIMER_GetModuleClock(psNuTmr->base);
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pre = clk / *((uint32_t *)args) - 1;
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TIMER_SET_PRESCALE_VALUE(psNuTmr->base, pre);
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*((uint32_t *)args) = clk / (pre + 1) ;
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}
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break;
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case HWTIMER_CTRL_STOP:
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TIMER_Stop(psNuTmr->base);
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break;
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default:
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ret = RT_EINVAL;
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break;
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}
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return -(ret);
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}
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/**
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* All UART interrupt service routine
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*/
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static void nu_timer_isr(nu_timer_t psNuTmr)
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{
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RT_ASSERT(psNuTmr != RT_NULL);
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if (TIMER_GetIntFlag(psNuTmr->base))
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{
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TIMER_ClearIntFlag(psNuTmr->base);
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rt_device_hwtimer_isr(&psNuTmr->parent);
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}
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}
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int rt_hw_timer_init(void)
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{
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int i;
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rt_err_t ret = RT_EOK;
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for (i = (TIMER_START + 1); i < TIMER_CNT; i++)
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{
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CLK_EnableModuleClock(nu_timer_arr[i].modid);
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SYS_ResetModule(nu_timer_arr[i].rstidx);
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/* Register Timer information. */
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nu_timer_arr[i].parent.info = &nu_timer_info;
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/* Register Timer operation. */
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nu_timer_arr[i].parent.ops = &nu_timer_ops;
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/* Register RT hwtimer device. */
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ret = rt_device_hwtimer_register(&nu_timer_arr[i].parent, nu_timer_arr[i].name, &nu_timer_arr[i]);
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RT_ASSERT(ret == RT_EOK);
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}
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return 0;
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}
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INIT_BOARD_EXPORT(rt_hw_timer_init);
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#if defined(BSP_USING_TIMER0)
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void TMR0_IRQHandler(void)
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{
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rt_interrupt_enter();
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nu_timer_isr((void *)&nu_timer_arr[TIMER0_IDX]);
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rt_interrupt_leave();
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}
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#endif
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#if defined(BSP_USING_TIMER1)
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void TMR1_IRQHandler(void)
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{
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rt_interrupt_enter();
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nu_timer_isr((void *)&nu_timer_arr[TIMER1_IDX]);
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rt_interrupt_leave();
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}
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#endif
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#if defined(BSP_USING_TIMER2)
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void TMR2_IRQHandler(void)
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{
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rt_interrupt_enter();
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nu_timer_isr((void *)&nu_timer_arr[TIMER2_IDX]);
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rt_interrupt_leave();
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}
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#endif
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#if defined(BSP_USING_TIMER3)
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void TMR3_IRQHandler(void)
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{
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rt_interrupt_enter();
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nu_timer_isr((void *)&nu_timer_arr[TIMER3_IDX]);
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rt_interrupt_leave();
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}
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#endif
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#endif //#if (defined(BSP_USING_TIMER) && defined(RT_USING_HWTIMER))
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