361 lines
19 KiB
C
361 lines
19 KiB
C
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/*
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* Copyright (c) 2013-2017 ARM Limited. All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the License); you may
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* not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an AS IS BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*
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* $Date: 2. Feb 2017
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* $Revision: V2.3
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*
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* Project: MCI (Memory Card Interface) Driver definitions
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*/
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/* History:
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* Version 2.3
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* ARM_MCI_STATUS made volatile
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* Version 2.2
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* Added timeout and error flags to ARM_MCI_STATUS
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* Added support for controlling optional RST_n pin (eMMC)
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* Removed explicit Clock Control (ARM_MCI_CONTROL_CLOCK)
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* Removed event ARM_MCI_EVENT_BOOT_ACK_TIMEOUT
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* Version 2.1
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* Decoupled SPI mode from MCI driver
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* Replaced function ARM_MCI_CardSwitchRead with ARM_MCI_ReadCD and ARM_MCI_ReadWP
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* Version 2.0
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* Added support for:
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* SD UHS-I (Ultra High Speed)
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* SD I/O Interrupt
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* Read Wait (SD I/O)
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* Suspend/Resume (SD I/O)
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* MMC Interrupt
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* MMC Boot
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* Stream Data transfer (MMC)
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* VCCQ Power Supply Control (eMMC)
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* Command Completion Signal (CCS) for CE-ATA
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* Added ARM_MCI_Control function
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* Added ARM_MCI_GetStatus function
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* Removed ARM_MCI_BusMode, ARM_MCI_BusDataWidth, ARM_MCI_BusSingaling functions
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* (replaced by ARM_MCI_Control)
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* Changed ARM_MCI_CardPower function (voltage parameter)
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* Changed ARM_MCI_SendCommnad function (flags parameter)
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* Changed ARM_MCI_SetupTransfer function (mode parameter)
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* Removed ARM_MCI_ReadTransfer and ARM_MCI_WriteTransfer functions
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* Changed prefix ARM_DRV -> ARM_DRIVER
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* Changed return values of some functions to int32_t
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* Version 1.10
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* Namespace prefix ARM_ added
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* Version 1.00
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* Initial release
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*/
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#ifndef DRIVER_MCI_H_
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#define DRIVER_MCI_H_
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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#include "Driver_Common.h"
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#define ARM_MCI_API_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(2,3) /* API version */
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/****** MCI Send Command Flags *****/
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#define ARM_MCI_RESPONSE_Pos 0
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#define ARM_MCI_RESPONSE_Msk (3UL << ARM_MCI_RESPONSE_Pos)
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#define ARM_MCI_RESPONSE_NONE (0UL << ARM_MCI_RESPONSE_Pos) ///< No response expected (default)
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#define ARM_MCI_RESPONSE_SHORT (1UL << ARM_MCI_RESPONSE_Pos) ///< Short response (48-bit)
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#define ARM_MCI_RESPONSE_SHORT_BUSY (2UL << ARM_MCI_RESPONSE_Pos) ///< Short response with busy signal (48-bit)
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#define ARM_MCI_RESPONSE_LONG (3UL << ARM_MCI_RESPONSE_Pos) ///< Long response (136-bit)
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#define ARM_MCI_RESPONSE_INDEX (1UL << 2) ///< Check command index in response
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#define ARM_MCI_RESPONSE_CRC (1UL << 3) ///< Check CRC in response
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#define ARM_MCI_WAIT_BUSY (1UL << 4) ///< Wait until busy before sending the command
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#define ARM_MCI_TRANSFER_DATA (1UL << 5) ///< Activate Data transfer
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#define ARM_MCI_CARD_INITIALIZE (1UL << 6) ///< Execute Memory Card initialization sequence
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#define ARM_MCI_INTERRUPT_COMMAND (1UL << 7) ///< Send Interrupt command (CMD40 - MMC only)
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#define ARM_MCI_INTERRUPT_RESPONSE (1UL << 8) ///< Send Interrupt response (CMD40 - MMC only)
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#define ARM_MCI_BOOT_OPERATION (1UL << 9) ///< Execute Boot operation (MMC only)
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#define ARM_MCI_BOOT_ALTERNATIVE (1UL << 10) ///< Execute Alternative Boot operation (MMC only)
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#define ARM_MCI_BOOT_ACK (1UL << 11) ///< Expect Boot Acknowledge (MMC only)
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#define ARM_MCI_CCSD (1UL << 12) ///< Send Command Completion Signal Disable (CCSD) for CE-ATA device
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#define ARM_MCI_CCS (1UL << 13) ///< Expect Command Completion Signal (CCS) for CE-ATA device
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/****** MCI Setup Transfer Mode *****/
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#define ARM_MCI_TRANSFER_READ (0UL << 0) ///< Data Read Transfer (from MCI)
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#define ARM_MCI_TRANSFER_WRITE (1UL << 0) ///< Data Write Transfer (to MCI)
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#define ARM_MCI_TRANSFER_BLOCK (0UL << 1) ///< Block Data transfer (default)
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#define ARM_MCI_TRANSFER_STREAM (1UL << 1) ///< Stream Data transfer (MMC only)
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/****** MCI Control Codes *****/
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#define ARM_MCI_BUS_SPEED (0x01) ///< Set Bus Speed; arg = requested speed in bits/s; returns configured speed in bits/s
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#define ARM_MCI_BUS_SPEED_MODE (0x02) ///< Set Bus Speed Mode as specified with arg
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#define ARM_MCI_BUS_CMD_MODE (0x03) ///< Set CMD Line Mode as specified with arg
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#define ARM_MCI_BUS_DATA_WIDTH (0x04) ///< Set Bus Data Width as specified with arg
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#define ARM_MCI_DRIVER_STRENGTH (0x05) ///< Set SD UHS-I Driver Strength as specified with arg
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#define ARM_MCI_CONTROL_RESET (0x06) ///< Control optional RST_n Pin (eMMC); arg: 0=inactive, 1=active
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#define ARM_MCI_CONTROL_CLOCK_IDLE (0x07) ///< Control Clock generation on CLK Pin when idle; arg: 0=disabled, 1=enabled
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#define ARM_MCI_UHS_TUNING_OPERATION (0x08) ///< Sampling clock Tuning operation (SD UHS-I); arg: 0=reset, 1=execute
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#define ARM_MCI_UHS_TUNING_RESULT (0x09) ///< Sampling clock Tuning result (SD UHS-I); returns: 0=done, 1=in progress, -1=error
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#define ARM_MCI_DATA_TIMEOUT (0x0A) ///< Set Data timeout; arg = timeout in bus cycles
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#define ARM_MCI_CSS_TIMEOUT (0x0B) ///< Set Command Completion Signal (CCS) timeout; arg = timeout in bus cycles
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#define ARM_MCI_MONITOR_SDIO_INTERRUPT (0x0C) ///< Monitor SD I/O interrupt: arg: 0=disabled, 1=enabled
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#define ARM_MCI_CONTROL_READ_WAIT (0x0D) ///< Control Read/Wait for SD I/O; arg: 0=disabled, 1=enabled
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#define ARM_MCI_SUSPEND_TRANSFER (0x0E) ///< Suspend Data transfer (SD I/O); returns number of remaining bytes to transfer
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#define ARM_MCI_RESUME_TRANSFER (0x0F) ///< Resume Data transfer (SD I/O)
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/*----- MCI Bus Speed Mode -----*/
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#define ARM_MCI_BUS_DEFAULT_SPEED (0x00) ///< SD/MMC: Default Speed mode up to 25/26MHz
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#define ARM_MCI_BUS_HIGH_SPEED (0x01) ///< SD/MMC: High Speed mode up to 50/52MHz
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#define ARM_MCI_BUS_UHS_SDR12 (0x02) ///< SD: SDR12 (Single Data Rate) up to 25MHz, 12.5MB/s: UHS-I (Ultra High Speed) 1.8V signaling
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#define ARM_MCI_BUS_UHS_SDR25 (0x03) ///< SD: SDR25 (Single Data Rate) up to 50MHz, 25 MB/s: UHS-I (Ultra High Speed) 1.8V signaling
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#define ARM_MCI_BUS_UHS_SDR50 (0x04) ///< SD: SDR50 (Single Data Rate) up to 100MHz, 50 MB/s: UHS-I (Ultra High Speed) 1.8V signaling
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#define ARM_MCI_BUS_UHS_SDR104 (0x05) ///< SD: SDR104 (Single Data Rate) up to 208MHz, 104 MB/s: UHS-I (Ultra High Speed) 1.8V signaling
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#define ARM_MCI_BUS_UHS_DDR50 (0x06) ///< SD: DDR50 (Dual Data Rate) up to 50MHz, 50 MB/s: UHS-I (Ultra High Speed) 1.8V signaling
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/*----- MCI CMD Line Mode -----*/
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#define ARM_MCI_BUS_CMD_PUSH_PULL (0x00) ///< Push-Pull CMD line (default)
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#define ARM_MCI_BUS_CMD_OPEN_DRAIN (0x01) ///< Open Drain CMD line (MMC only)
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/*----- MCI Bus Data Width -----*/
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#define ARM_MCI_BUS_DATA_WIDTH_1 (0x00) ///< Bus data width: 1 bit (default)
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#define ARM_MCI_BUS_DATA_WIDTH_4 (0x01) ///< Bus data width: 4 bits
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#define ARM_MCI_BUS_DATA_WIDTH_8 (0x02) ///< Bus data width: 8 bits
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#define ARM_MCI_BUS_DATA_WIDTH_4_DDR (0x03) ///< Bus data width: 4 bits, DDR (Dual Data Rate) - MMC only
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#define ARM_MCI_BUS_DATA_WIDTH_8_DDR (0x04) ///< Bus data width: 8 bits, DDR (Dual Data Rate) - MMC only
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/*----- MCI Driver Strength -----*/
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#define ARM_MCI_DRIVER_TYPE_A (0x01) ///< SD UHS-I Driver Type A
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#define ARM_MCI_DRIVER_TYPE_B (0x00) ///< SD UHS-I Driver Type B (default)
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#define ARM_MCI_DRIVER_TYPE_C (0x02) ///< SD UHS-I Driver Type C
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#define ARM_MCI_DRIVER_TYPE_D (0x03) ///< SD UHS-I Driver Type D
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/****** MCI Card Power *****/
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#define ARM_MCI_POWER_VDD_Pos 0
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#define ARM_MCI_POWER_VDD_Msk (0x0FUL << ARM_MCI_POWER_VDD_Pos)
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#define ARM_MCI_POWER_VDD_OFF (0x01UL << ARM_MCI_POWER_VDD_Pos) ///< VDD (VCC) turned off
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#define ARM_MCI_POWER_VDD_3V3 (0x02UL << ARM_MCI_POWER_VDD_Pos) ///< VDD (VCC) = 3.3V
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#define ARM_MCI_POWER_VDD_1V8 (0x03UL << ARM_MCI_POWER_VDD_Pos) ///< VDD (VCC) = 1.8V
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#define ARM_MCI_POWER_VCCQ_Pos 4
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#define ARM_MCI_POWER_VCCQ_Msk (0x0FUL << ARM_MCI_POWER_VCCQ_Pos)
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#define ARM_MCI_POWER_VCCQ_OFF (0x01UL << ARM_MCI_POWER_VCCQ_Pos) ///< eMMC VCCQ turned off
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#define ARM_MCI_POWER_VCCQ_3V3 (0x02UL << ARM_MCI_POWER_VCCQ_Pos) ///< eMMC VCCQ = 3.3V
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#define ARM_MCI_POWER_VCCQ_1V8 (0x03UL << ARM_MCI_POWER_VCCQ_Pos) ///< eMMC VCCQ = 1.8V
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#define ARM_MCI_POWER_VCCQ_1V2 (0x04UL << ARM_MCI_POWER_VCCQ_Pos) ///< eMMC VCCQ = 1.2V
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/**
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\brief MCI Status
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*/
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typedef volatile struct _ARM_MCI_STATUS {
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uint32_t command_active : 1; ///< Command active flag
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uint32_t command_timeout : 1; ///< Command timeout flag (cleared on start of next command)
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uint32_t command_error : 1; ///< Command error flag (cleared on start of next command)
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uint32_t transfer_active : 1; ///< Transfer active flag
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uint32_t transfer_timeout : 1; ///< Transfer timeout flag (cleared on start of next command)
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uint32_t transfer_error : 1; ///< Transfer error flag (cleared on start of next command)
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uint32_t sdio_interrupt : 1; ///< SD I/O Interrupt flag (cleared on start of monitoring)
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uint32_t ccs : 1; ///< CCS flag (cleared on start of next command)
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uint32_t reserved : 24;
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} ARM_MCI_STATUS;
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/****** MCI Card Event *****/
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#define ARM_MCI_EVENT_CARD_INSERTED (1UL << 0) ///< Memory Card inserted
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#define ARM_MCI_EVENT_CARD_REMOVED (1UL << 1) ///< Memory Card removed
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#define ARM_MCI_EVENT_COMMAND_COMPLETE (1UL << 2) ///< Command completed
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#define ARM_MCI_EVENT_COMMAND_TIMEOUT (1UL << 3) ///< Command timeout
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#define ARM_MCI_EVENT_COMMAND_ERROR (1UL << 4) ///< Command response error (CRC error or invalid response)
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#define ARM_MCI_EVENT_TRANSFER_COMPLETE (1UL << 5) ///< Data transfer completed
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#define ARM_MCI_EVENT_TRANSFER_TIMEOUT (1UL << 6) ///< Data transfer timeout
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#define ARM_MCI_EVENT_TRANSFER_ERROR (1UL << 7) ///< Data transfer CRC failed
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#define ARM_MCI_EVENT_SDIO_INTERRUPT (1UL << 8) ///< SD I/O Interrupt
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#define ARM_MCI_EVENT_CCS (1UL << 9) ///< Command Completion Signal (CCS)
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#define ARM_MCI_EVENT_CCS_TIMEOUT (1UL << 10) ///< Command Completion Signal (CCS) Timeout
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// Function documentation
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/**
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\fn ARM_DRIVER_VERSION ARM_MCI_GetVersion (void)
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\brief Get driver version.
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\return \ref ARM_DRIVER_VERSION
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*/
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/**
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\fn ARM_MCI_CAPABILITIES ARM_MCI_GetCapabilities (void)
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\brief Get driver capabilities.
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\return \ref ARM_MCI_CAPABILITIES
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*/
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/**
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\fn int32_t ARM_MCI_Initialize (ARM_MCI_SignalEvent_t cb_event)
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\brief Initialize the Memory Card Interface
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\param[in] cb_event Pointer to \ref ARM_MCI_SignalEvent
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\return \ref execution_status
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*/
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/**
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\fn int32_t ARM_MCI_Uninitialize (void)
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\brief De-initialize Memory Card Interface.
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\return \ref execution_status
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*/
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/**
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\fn int32_t ARM_MCI_PowerControl (ARM_POWER_STATE state)
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\brief Control Memory Card Interface Power.
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\param[in] state Power state \ref ARM_POWER_STATE
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\return \ref execution_status
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*/
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/**
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\fn int32_t ARM_MCI_CardPower (uint32_t voltage)
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\brief Set Memory Card Power supply voltage.
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\param[in] voltage Memory Card Power supply voltage
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\return \ref execution_status
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*/
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/**
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\fn int32_t ARM_MCI_ReadCD (void)
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\brief Read Card Detect (CD) state.
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\return 1:card detected, 0:card not detected, or error
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*/
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/**
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\fn int32_t ARM_MCI_ReadWP (void)
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\brief Read Write Protect (WP) state.
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\return 1:write protected, 0:not write protected, or error
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*/
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/**
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\fn int32_t ARM_MCI_SendCommand (uint32_t cmd,
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uint32_t arg,
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uint32_t flags,
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uint32_t *response)
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\brief Send Command to card and get the response.
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\param[in] cmd Memory Card command
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\param[in] arg Command argument
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\param[in] flags Command flags
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\param[out] response Pointer to buffer for response
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\return \ref execution_status
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*/
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/**
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\fn int32_t ARM_MCI_SetupTransfer (uint8_t *data,
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uint32_t block_count,
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uint32_t block_size,
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uint32_t mode)
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\brief Setup read or write transfer operation.
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\param[in,out] data Pointer to data block(s) to be written or read
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\param[in] block_count Number of blocks
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\param[in] block_size Size of a block in bytes
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\param[in] mode Transfer mode
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\return \ref execution_status
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*/
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/**
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\fn int32_t ARM_MCI_AbortTransfer (void)
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\brief Abort current read/write data transfer.
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\return \ref execution_status
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*/
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/**
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\fn int32_t ARM_MCI_Control (uint32_t control, uint32_t arg)
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\brief Control MCI Interface.
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\param[in] control Operation
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\param[in] arg Argument of operation (optional)
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\return \ref execution_status
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*/
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/**
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\fn ARM_MCI_STATUS ARM_MCI_GetStatus (void)
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\brief Get MCI status.
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\return MCI status \ref ARM_MCI_STATUS
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*/
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/**
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\fn void ARM_MCI_SignalEvent (uint32_t event)
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\brief Callback function that signals a MCI Card Event.
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\param[in] event \ref mci_event_gr
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\return none
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*/
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typedef void (*ARM_MCI_SignalEvent_t) (uint32_t event); ///< Pointer to \ref ARM_MCI_SignalEvent : Signal MCI Card Event.
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/**
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\brief MCI Driver Capabilities.
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*/
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typedef struct _ARM_MCI_CAPABILITIES {
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uint32_t cd_state : 1; ///< Card Detect State available
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uint32_t cd_event : 1; ///< Signal Card Detect change event
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uint32_t wp_state : 1; ///< Write Protect State available
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uint32_t vdd : 1; ///< Supports VDD Card Power Supply Control
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uint32_t vdd_1v8 : 1; ///< Supports 1.8 VDD Card Power Supply
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uint32_t vccq : 1; ///< Supports VCCQ Card Power Supply Control (eMMC)
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uint32_t vccq_1v8 : 1; ///< Supports 1.8 VCCQ Card Power Supply (eMMC)
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uint32_t vccq_1v2 : 1; ///< Supports 1.2 VCCQ Card Power Supply (eMMC)
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uint32_t data_width_4 : 1; ///< Supports 4-bit data
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uint32_t data_width_8 : 1; ///< Supports 8-bit data
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uint32_t data_width_4_ddr : 1; ///< Supports 4-bit data, DDR (Dual Data Rate) - MMC only
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uint32_t data_width_8_ddr : 1; ///< Supports 8-bit data, DDR (Dual Data Rate) - MMC only
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uint32_t high_speed : 1; ///< Supports SD/MMC High Speed Mode
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uint32_t uhs_signaling : 1; ///< Supports SD UHS-I (Ultra High Speed) 1.8V signaling
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uint32_t uhs_tuning : 1; ///< Supports SD UHS-I tuning
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uint32_t uhs_sdr50 : 1; ///< Supports SD UHS-I SDR50 (Single Data Rate) up to 50MB/s
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uint32_t uhs_sdr104 : 1; ///< Supports SD UHS-I SDR104 (Single Data Rate) up to 104MB/s
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uint32_t uhs_ddr50 : 1; ///< Supports SD UHS-I DDR50 (Dual Data Rate) up to 50MB/s
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uint32_t uhs_driver_type_a : 1; ///< Supports SD UHS-I Driver Type A
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uint32_t uhs_driver_type_c : 1; ///< Supports SD UHS-I Driver Type C
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uint32_t uhs_driver_type_d : 1; ///< Supports SD UHS-I Driver Type D
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uint32_t sdio_interrupt : 1; ///< Supports SD I/O Interrupt
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uint32_t read_wait : 1; ///< Supports Read Wait (SD I/O)
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uint32_t suspend_resume : 1; ///< Supports Suspend/Resume (SD I/O)
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uint32_t mmc_interrupt : 1; ///< Supports MMC Interrupt
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uint32_t mmc_boot : 1; ///< Supports MMC Boot
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uint32_t rst_n : 1; ///< Supports RST_n Pin Control (eMMC)
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uint32_t ccs : 1; ///< Supports Command Completion Signal (CCS) for CE-ATA
|
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uint32_t ccs_timeout : 1; ///< Supports Command Completion Signal (CCS) timeout for CE-ATA
|
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|
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uint32_t reserved : 3; ///< Reserved (must be zero)
|
||
|
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} ARM_MCI_CAPABILITIES;
|
||
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|
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|
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|
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/**
|
||
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\brief Access structure of the MCI Driver.
|
||
|
|
*/
|
||
|
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typedef struct _ARM_DRIVER_MCI {
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ARM_DRIVER_VERSION (*GetVersion) (void); ///< Pointer to \ref ARM_MCI_GetVersion : Get driver version.
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ARM_MCI_CAPABILITIES (*GetCapabilities)(void); ///< Pointer to \ref ARM_MCI_GetCapabilities : Get driver capabilities.
|
||
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|
int32_t (*Initialize) (ARM_MCI_SignalEvent_t cb_event); ///< Pointer to \ref ARM_MCI_Initialize : Initialize MCI Interface.
|
||
|
|
int32_t (*Uninitialize) (void); ///< Pointer to \ref ARM_MCI_Uninitialize : De-initialize MCI Interface.
|
||
|
|
int32_t (*PowerControl) (ARM_POWER_STATE state); ///< Pointer to \ref ARM_MCI_PowerControl : Control MCI Interface Power.
|
||
|
|
int32_t (*CardPower) (uint32_t voltage); ///< Pointer to \ref ARM_MCI_CardPower : Set card power supply voltage.
|
||
|
|
int32_t (*ReadCD) (void); ///< Pointer to \ref ARM_MCI_ReadCD : Read Card Detect (CD) state.
|
||
|
|
int32_t (*ReadWP) (void); ///< Pointer to \ref ARM_MCI_ReadWP : Read Write Protect (WP) state.
|
||
|
|
int32_t (*SendCommand) (uint32_t cmd,
|
||
|
|
uint32_t arg,
|
||
|
|
uint32_t flags,
|
||
|
|
uint32_t *response); ///< Pointer to \ref ARM_MCI_SendCommand : Send Command to card and get the response.
|
||
|
|
int32_t (*SetupTransfer) (uint8_t *data,
|
||
|
|
uint32_t block_count,
|
||
|
|
uint32_t block_size,
|
||
|
|
uint32_t mode); ///< Pointer to \ref ARM_MCI_SetupTransfer : Setup data transfer operation.
|
||
|
|
int32_t (*AbortTransfer) (void); ///< Pointer to \ref ARM_MCI_AbortTransfer : Abort current data transfer.
|
||
|
|
int32_t (*Control) (uint32_t control, uint32_t arg); ///< Pointer to \ref ARM_MCI_Control : Control MCI Interface.
|
||
|
|
ARM_MCI_STATUS (*GetStatus) (void); ///< Pointer to \ref ARM_MCI_GetStatus : Get MCI status.
|
||
|
|
} const ARM_DRIVER_MCI;
|
||
|
|
|
||
|
|
#ifdef __cplusplus
|
||
|
|
}
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#endif /* DRIVER_MCI_H_ */
|