501 lines
13 KiB
C
501 lines
13 KiB
C
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/**************************************************************************//**
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* @file gpio.c
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* @version V1.00
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* @brief N9H30 GPIO driver source file
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*
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* SPDX-License-Identifier: Apache-2.0
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* @copyright (C) 2018 Nuvoton Technology Corp. All rights reserved.
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*****************************************************************************/
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#include "N9H30.h"
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#include "nu_sys.h"
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#include "nu_gpio.h"
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/** @addtogroup N9H30_Device_Driver N9H30 Device Driver
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@{
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*/
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/** @addtogroup N9H30_GPIO_Driver GPIO Driver
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@{
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*/
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/** @addtogroup N9H30_GPIO_EXPORTED_FUNCTIONS GPIO Exported Functions
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@{
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*/
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/**
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* @brief Set GPIO Port
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*
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* @param[in] port GPIO port. It could be \ref GPIOA, \ref GPIOB, ... or \ref GPIOJ
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* @param[in] bitMap GPIO port. It could be \ref BIT0 \ref BIT1, ... or \ref BIT31
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*
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* @retval <0 Fail
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* @retval 0 Success
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*
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* @details This function is used to set GPIO port output data.
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*/
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INT32 GPIO_Set(GPIO_PORT port, UINT32 bitMap)
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{
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INT32 offset;
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INT32 reg;
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offset = (INT32)port;
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reg = inpw(REG_GPIOA_DATAOUT + offset);
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reg = reg | bitMap;
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outpw(REG_GPIOA_DATAOUT + offset, reg);
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return SUCCESSFUL;
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}
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/**
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* @brief Clear GPIO port OUT Data
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*
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* @param[in] port GPIO port. It could be \ref GPIOA, \ref GPIOB, ... or \ref GPIOJ
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* @param[in] bitMap GPIO port data. It could be 0x00 ~ 0xFF.
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*
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* @retval <0 Fail
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* @retval 0 Success
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*
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* @details Clear GPIO port output data to 0.
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*/
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INT32 GPIO_Clr(GPIO_PORT port, UINT32 bitMap)
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{
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INT32 offset;
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INT32 reg;
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offset = (INT32)port;
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reg = inpw(REG_GPIOA_DATAOUT + offset);
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reg = reg & (~bitMap);
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outpw(REG_GPIOA_DATAOUT + offset, reg);
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return SUCCESSFUL;
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}
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/**
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* @brief Open GPIO bit
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*
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* @param[in] port GPIO port. It could be \ref GPIOA, \ref GPIOB, ... or \ref GPIOJ
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* @param[in] bit GPIO pin. It could be \ref BIT0 \ref BIT1, ... or \ref BIT31
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* @param[in] direction GPIO direction. It could be \ref DIR_INPUT or \ref DIR_OUTPUT
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* @param[in] pull GPIO pull-up. It could be \ref NO_PULL_UP or \ref PULL_UP
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*
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* @retval <0 Fail
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* @retval 0 Success
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*
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* @details This function is used to open gpio pin.
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*/
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INT32 GPIO_OpenBit(GPIO_PORT port, UINT32 bit, GPIO_DIR direction, GPIO_PULL pull)
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{
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UINT32 reg;
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UINT32 mask;
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INT32 offset;
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offset = (INT32)port;
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mask = (UINT32)bit;
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reg = inpw(REG_GPIOA_DIR + offset);
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reg = reg & (~mask);
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if (direction == DIR_OUTPUT)
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{
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reg = reg | mask;
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}
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outpw(REG_GPIOA_DIR + offset, reg);
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reg = inpw(REG_GPIOA_PUEN + offset);
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reg = reg & (~mask);
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if (pull == PULL_UP)
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{
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reg = reg | mask;
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outpw(REG_GPIOA_PUEN + offset, reg);
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}
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else if (pull == PULL_DOWN)
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{
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reg = reg | mask;
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outpw(REG_GPIOA_PDEN + offset, reg);
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}
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else
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{
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outpw(REG_GPIOA_PUEN + offset, reg);
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outpw(REG_GPIOA_PDEN + offset, reg);
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}
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return SUCCESSFUL;
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}
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/**
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* @brief Set GPIO pin OUT Data
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*
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* @param[in] port GPIO port. It could be \ref GPIOA, \ref GPIOB, ... or \ref GPIOJ
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* @param[in] bit GPIO pin. It could be \ref BIT0 \ref BIT1, ... or \ref BIT31
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*
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* @retval <0 Fail
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* @retval 0 Success
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*
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* @details Set the Data into specified GPIO pin.
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*/
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INT32 GPIO_CloseBit(GPIO_PORT port, UINT32 bit)
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{
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UINT32 reg;
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UINT32 mask;
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INT32 offset;
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offset = (INT32)port;
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mask = (UINT32)bit;
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reg = inpw(REG_GPIOA_DIR + offset);
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reg = reg & (~mask);
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outpw(REG_GPIOA_DIR + offset, reg);
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reg = inpw(REG_GPIOA_PUEN + offset);
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reg = reg & (~mask);
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outpw(REG_GPIOA_PUEN + offset, reg);
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return SUCCESSFUL;
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}
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/**
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* @brief Set GPIO pin OUT Data
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*
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* @param[in] port GPIO port. It could be \ref GPIOA, \ref GPIOB, ... or \ref GPIOJ
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* @param[in] bit GPIO pin. It could be \ref BIT0 \ref BIT1, ... or \ref BIT31
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*
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* @retval <0 Fail
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* @retval 0 Success
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*
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* @details Set the Data into specified GPIO pin.
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*/
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INT32 GPIO_SetBit(GPIO_PORT port, UINT32 bit)
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{
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UINT32 bitMap;
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INT32 offset;
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INT32 reg;
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offset = (INT32)port;
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bitMap = (UINT32)bit;
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reg = inpw(REG_GPIOA_DATAOUT + offset);
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reg = reg | bitMap;
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outpw(REG_GPIOA_DATAOUT + offset, reg);
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return SUCCESSFUL;
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}
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/**
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* @brief Clear GPIO port Interrupt Flag
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*
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* @param[in] port GPIO port. It could be \ref GPIOA, \ref GPIOB, ... or \ref GPIOJ
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* @param[in] bitMap GPIO port data. It could be 0x00 ~ 0xFF.
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*
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* @retval <0 Fail
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* @retval 0 Success
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*
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* @details Clear the interrupt status of specified GPIO port.
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*/
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INT32 GPIO_ClrISR(GPIO_PORT port, UINT32 bitMap)
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{
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INT32 offset;
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offset = (INT32)port;
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outpw(REG_GPIOA_ISR + offset, bitMap);
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return SUCCESSFUL;
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}
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/**
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* @brief Clear GPIO Pin Interrupt Flag
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*
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* @param[in] port GPIO port. It could be \ref GPIOA, \ref GPIOB, ... or \ref GPIOJ
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* @param[in] bit GPIO pin. It could be \ref BIT0 \ref BIT1, ... or \ref BIT31
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*
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* @retval <0 Fail
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* @retval 0 Success
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*
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* @details Clear the interrupt status of specified GPIO pin.
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*/
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INT32 GPIO_ClrISRBit(GPIO_PORT port, UINT32 bit)
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{
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UINT32 bitMap;
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INT32 offset;
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offset = (INT32)port;
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bitMap = (UINT32)bit;
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outpw(REG_GPIOA_ISR + offset, bitMap);
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return SUCCESSFUL;
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}
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/**
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* @brief Clear GPIO pin OUT Data
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*
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* @param[in] port GPIO port. It could be \ref GPIOA, \ref GPIOB, ... or \ref GPIOJ
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* @param[in] bit GPIO pin. It could be \ref BIT0 \ref BIT1, ... or \ref BIT31
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*
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* @retval <0 Fail
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* @retval 0 Success
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*
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* @details Set the Data into specified GPIO pin.
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*/
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INT32 GPIO_ClrBit(GPIO_PORT port, UINT32 bit)
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{
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UINT32 bitMap;
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INT32 offset;
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INT32 reg;
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offset = (INT32)port;
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bitMap = (UINT32)bit;
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reg = inpw(REG_GPIOA_DATAOUT + offset);
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reg = reg & (~bitMap);
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outpw(REG_GPIOA_DATAOUT + offset, reg);
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return SUCCESSFUL;
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}
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/**
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* @brief Read GPIO pin In Data
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*
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* @param[in] port GPIO port. It could be \ref GPIOA, \ref GPIOB, ... or \ref GPIOJ
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* @param[in] bit GPIO pin. It could be \ref BIT0 \ref BIT1, ... or \ref BIT31
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*
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* @retval 1/0 GPIO pin input data.
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*
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* @details Read the In Data from GPIO pin.
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*/
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INT32 GPIO_ReadBit(GPIO_PORT port, UINT32 bit)
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{
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UINT32 reg;
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UINT32 bitMap;
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INT32 offset;
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offset = (INT32)port;
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bitMap = (UINT32)bit;
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reg = inpw(REG_GPIOA_DATAIN + offset);
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return ((reg & bitMap) ? 1 : 0);
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}
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/**
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* @brief Set GPIO pin direction
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*
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* @param[in] port GPIO port. It could be \ref GPIOA, \ref GPIOB, ... or \ref GPIOJ
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* @param[in] bit GPIO pin. It could be \ref BIT0 \ref BIT1, ... or \ref BIT31
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* @param[in] direction GPIO direction. It could be \ref DIR_INPUT, \ref DIR_OUTPUT.
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*
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* @retval <0 Fail
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* @retval 0 Success
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*
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* @details Set the GPIO direction into specified GPIO pin.
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*/
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INT32 GPIO_SetBitDir(GPIO_PORT port, UINT32 bit, GPIO_DIR direction)
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{
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UINT32 reg;
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UINT32 bitMap;
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INT32 offset;
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offset = (INT32)port;
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bitMap = (UINT32)bit;
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reg = inpw(REG_GPIOA_DIR + offset);
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reg = reg & (~bitMap);
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if (direction == DIR_OUTPUT)
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{
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reg = reg | bitMap;
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}
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outpw(REG_GPIOA_DIR + offset, reg);
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return SUCCESSFUL;
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}
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/**
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* @brief Enable GPIO trigger type.
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*
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* @param[in] port GPIO port. It could be \ref GPIOA, \ref GPIOB, ... or \ref GPIOJ
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* @param[in] bitMap GPIO port. It could be \ref BIT0 \ref BIT1, ... or \ref BIT31
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* @param[in] triggerType The triggerType of specified GPIO pin. It could be \n
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* \ref RISING, \ref FALLING, \ref BOTH_EDGE, \ref HIGH, \ref LOW.
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*
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* @retval <0 Fail
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* @retval 0 Success
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*
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* @details This function is used to enable trigger type.
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*/
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INT32 GPIO_EnableTriggerType(GPIO_PORT port, UINT32 bitMap, GPIO_TRIGGER_TYPE triggerType)
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{
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UINT32 reg;
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INT32 offset;
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offset = (INT32)port;
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switch (triggerType)
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{
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case LOW:
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reg = inpw(REG_GPIOA_IMD + offset);
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outpw(REG_GPIOA_IMD + offset, reg | bitMap);
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reg = inpw(REG_GPIOA_IREN + offset);
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outpw(REG_GPIOA_IREN + offset, reg & ~bitMap);
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reg = inpw(REG_GPIOA_IFEN + offset);
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outpw(REG_GPIOA_IFEN + offset, reg | bitMap);
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break;
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case HIGH:
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reg = inpw(REG_GPIOA_IMD + offset);
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outpw(REG_GPIOA_IMD + offset, reg | bitMap);
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reg = inpw(REG_GPIOA_IREN + offset);
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outpw(REG_GPIOA_IREN + offset, reg | bitMap);
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reg = inpw(REG_GPIOA_IFEN + offset);
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outpw(REG_GPIOA_IFEN + offset, reg & ~bitMap);
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break;
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case FALLING:
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reg = inpw(REG_GPIOA_IMD + offset);
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outpw(REG_GPIOA_IMD + offset, reg & ~bitMap);
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reg = inpw(REG_GPIOA_IREN + offset);
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outpw(REG_GPIOA_IREN + offset, reg & ~bitMap);
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reg = inpw(REG_GPIOA_IFEN + offset);
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outpw(REG_GPIOA_IFEN + offset, reg | bitMap);
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break;
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case RISING:
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reg = inpw(REG_GPIOA_IMD + offset);
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outpw(REG_GPIOA_IMD + offset, reg & ~bitMap);
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reg = inpw(REG_GPIOA_IREN + offset);
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outpw(REG_GPIOA_IREN + offset, reg | bitMap);
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reg = inpw(REG_GPIOA_IFEN + offset);
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outpw(REG_GPIOA_IFEN + offset, reg & ~bitMap);
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break;
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case BOTH_EDGE:
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reg = inpw(REG_GPIOA_IMD + offset);
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outpw(REG_GPIOA_IMD + offset, reg & ~bitMap);
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reg = inpw(REG_GPIOA_IREN + offset);
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||
|
|
outpw(REG_GPIOA_IREN + offset, reg | bitMap);
|
||
|
|
|
||
|
|
reg = inpw(REG_GPIOA_IFEN + offset);
|
||
|
|
outpw(REG_GPIOA_IFEN + offset, reg | bitMap);
|
||
|
|
break;
|
||
|
|
}
|
||
|
|
return SUCCESSFUL;
|
||
|
|
}
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief Disable GPIO trigger type.
|
||
|
|
*
|
||
|
|
* @param[in] port GPIO port. It could be \ref GPIOA, \ref GPIOB, ... or \ref GPIOJ
|
||
|
|
* @param[in] bitMap GPIO port. It could be \ref BIT0 \ref BIT1, ... or \ref BIT31
|
||
|
|
*
|
||
|
|
* @retval <0 Fail
|
||
|
|
* @retval 0 Success
|
||
|
|
*
|
||
|
|
* @details This function is used to disable trigger type.
|
||
|
|
*/
|
||
|
|
INT32 GPIO_DisableTriggerType(GPIO_PORT port, UINT32 bitMap)
|
||
|
|
{
|
||
|
|
UINT32 reg;
|
||
|
|
INT32 offset;
|
||
|
|
|
||
|
|
offset = (INT32)port;
|
||
|
|
|
||
|
|
reg = inpw(REG_GPIOA_IMD + offset);
|
||
|
|
outpw(REG_GPIOA_IMD + offset, reg & ~bitMap);
|
||
|
|
|
||
|
|
reg = inpw(REG_GPIOA_IREN + offset);
|
||
|
|
outpw(REG_GPIOA_IREN + offset, reg & ~bitMap);
|
||
|
|
|
||
|
|
reg = inpw(REG_GPIOA_IFEN + offset);
|
||
|
|
outpw(REG_GPIOA_IFEN + offset, reg & ~bitMap);
|
||
|
|
|
||
|
|
return SUCCESSFUL;
|
||
|
|
}
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief Enable GPIO De-bounce Function
|
||
|
|
*
|
||
|
|
* @param[in] debounceClkSel The de-bounce sampling cycle selection. It could be 0~0xF. \n
|
||
|
|
* 0 = Sample interrupt input once per 1 clocks. \n
|
||
|
|
* 1 = Sample interrupt input once per 2 clocks. \n
|
||
|
|
* 2 = Sample interrupt input once per 4 clocks. \n
|
||
|
|
* 3 = Sample interrupt input once per 8 clocks. \n
|
||
|
|
* 4 = Sample interrupt input once per 16 clocks. \n
|
||
|
|
* 5 = Sample interrupt input once per 32 clocks. \n
|
||
|
|
* 6 = Sample interrupt input once per 64 clocks. \n
|
||
|
|
* 7 = Sample interrupt input once per 128 clocks. \n
|
||
|
|
* 8 = Sample interrupt input once per 256 clocks. \n
|
||
|
|
* 9 = Sample interrupt input once per 2*256 clocks. \n
|
||
|
|
* 10 = Sample interrupt input once per 4*256 clocks. \n
|
||
|
|
* 11 = Sample interrupt input once per 8*256 clocks. \n
|
||
|
|
* 12 = Sample interrupt input once per 16*256 clocks. \n
|
||
|
|
* 13 = Sample interrupt input once per 32*256 clocks. \n
|
||
|
|
* 14 = Sample interrupt input once per 64*256 clocks. \n
|
||
|
|
* 15 = Sample interrupt input once per 128*256 clocks
|
||
|
|
*
|
||
|
|
* @retval <0 Fail
|
||
|
|
* @retval 0 Success
|
||
|
|
*
|
||
|
|
* @details Enable the interrupt de-bounce function of specified GPIO.
|
||
|
|
*/
|
||
|
|
INT32 GPIO_EnableDebounce(INT32 debounceClkSel)
|
||
|
|
{
|
||
|
|
UINT32 reg;
|
||
|
|
|
||
|
|
reg = inpw(REG_GPIO_DBNCECON);
|
||
|
|
|
||
|
|
/* Setting the debounce timing */
|
||
|
|
reg = ((reg & ~0xf) | debounceClkSel);
|
||
|
|
|
||
|
|
/* Enable the debounce function */
|
||
|
|
reg = reg | 0x20;
|
||
|
|
outpw(REG_GPIO_DBNCECON, reg);
|
||
|
|
|
||
|
|
return SUCCESSFUL;
|
||
|
|
}
|
||
|
|
|
||
|
|
/**
|
||
|
|
* @brief Disable GPIO De-bounce Function.
|
||
|
|
*
|
||
|
|
* @retval <0 Fail
|
||
|
|
* @retval 0 Success
|
||
|
|
*
|
||
|
|
* @details Disable the interrupt de-bounce function of specified GPIO.
|
||
|
|
*/
|
||
|
|
INT32 GPIO_DisableDebounce(void)
|
||
|
|
{
|
||
|
|
UINT32 reg;
|
||
|
|
|
||
|
|
reg = inpw(REG_GPIO_DBNCECON);
|
||
|
|
|
||
|
|
/* Setting the debounce timing */
|
||
|
|
reg = ((reg & ~0xf));
|
||
|
|
|
||
|
|
/* Enable the debounce function */
|
||
|
|
reg = reg | 0x20;
|
||
|
|
outpw(REG_GPIO_DBNCECON, reg);
|
||
|
|
|
||
|
|
return SUCCESSFUL;
|
||
|
|
}
|
||
|
|
|
||
|
|
/*@}*/ /* end of group N9H30_GPIO_EXPORTED_FUNCTIONS */
|
||
|
|
|
||
|
|
/*@}*/ /* end of group N9H30_GPIO_Driver */
|
||
|
|
|
||
|
|
/*@}*/ /* end of group N9H30_Device_Driver */
|
||
|
|
|