2022-05-06 09:28:21 +08:00
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/*
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2022-05-31 11:53:56 +08:00
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* Copyright (c) 2006-2022, RT-Thread Development Team
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* Copyright (c) 2022, Xiaohua Semiconductor Co., Ltd.
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2022-05-06 09:28:21 +08:00
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2022-04-28 CDT first version
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*/
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#ifndef __BOARD_CONFIG_H__
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#define __BOARD_CONFIG_H__
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#include <rtconfig.h>
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#include "hc32_ll.h"
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#include "drv_config.h"
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/************************ USART port **********************/
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#if defined(BSP_USING_UART1)
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#define USART1_RX_PORT (GPIO_PORT_H)
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#define USART1_RX_PIN (GPIO_PIN_13)
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#define USART1_TX_PORT (GPIO_PORT_H)
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#define USART1_TX_PIN (GPIO_PIN_15)
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#endif
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#if defined(BSP_USING_UART6)
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#define USART6_RX_PORT (GPIO_PORT_H)
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#define USART6_RX_PIN (GPIO_PIN_06)
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#define USART6_TX_PORT (GPIO_PORT_E)
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#define USART6_TX_PIN (GPIO_PIN_06)
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#endif
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/*********** ADC configure *********/
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#if defined(BSP_USING_ADC1)
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#define ADC1_CH_PORT (GPIO_PORT_C)
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#define ADC1_CH_PIN (GPIO_PIN_00)
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#endif
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#if defined(BSP_USING_ADC2)
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#define ADC2_CH_PORT (GPIO_PORT_C)
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#define ADC2_CH_PIN (GPIO_PIN_01)
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#endif
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#if defined(BSP_USING_ADC3)
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#define ADC3_CH_PORT (GPIO_PORT_C)
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#define ADC3_CH_PIN (GPIO_PIN_02)
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#endif
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/*********** CAN configure *********/
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#if defined(BSP_USING_CAN1)
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#define CAN1_TX_PORT (GPIO_PORT_D)
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#define CAN1_TX_PIN (GPIO_PIN_05)
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#define CAN1_TX_PIN_FUNC (GPIO_FUNC_60)
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#define CAN1_RX_PORT (GPIO_PORT_D)
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#define CAN1_RX_PIN (GPIO_PIN_04)
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#define CAN1_RX_PIN_FUNC (GPIO_FUNC_61)
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#endif
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#if defined(BSP_USING_CAN2)
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#define CAN2_TX_PORT (GPIO_PORT_D)
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#define CAN2_TX_PIN (GPIO_PIN_07)
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#define CAN2_TX_PIN_FUNC (GPIO_FUNC_62)
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#define CAN2_RX_PORT (GPIO_PORT_D)
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#define CAN2_RX_PIN (GPIO_PIN_06)
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#define CAN2_RX_PIN_FUNC (GPIO_FUNC_63)
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#endif
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#endif
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