108 lines
6.0 KiB
Markdown
108 lines
6.0 KiB
Markdown
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# STM32G491-Nucleo BSP Introduction
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[中文](README_zh.md)
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## MCU: STM32G491RE @170MHz, 128KB FLASH, 32KB RAM
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The STM32G491x6/x8/xB devices are based on the high-performance Arm® Cortex®-M4 32-bit RISC core. They operate at a frequency of up to 170 MHz.
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The Cortex-M4 core features a single-precision floating-point unit (FPU), which supports all the Arm single-precision data-processing instructions and all the data types. It also implements a full set of DSP (digital signal processing) instructions and a memory protection unit (MPU) which enhances the application’s security.
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These devices embed high-speed memories (128 Kbytes of Flash memory, and 32 Kbytes of SRAM), an extensive range of enhanced I/Os and peripherals connected to two APB buses, two AHB buses and a 32-bit multi-AHB bus matrix.
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The devices also embed several protection mechanisms for embedded Flash memory and SRAM: readout protection, write protection, securable memory area and proprietary code readout protection.
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The devices embed peripherals allowing mathematical/arithmetic function acceleration (CORDIC for trigonometric functions and FMAC unit for filter functions).
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They offer two fast 12-bit ADCs (5 Msps), four comparators, three operational amplifiers, four DAC channels (2 external and 2 internal), an internal voltage reference buffer, a low-power RTC, one general-purpose 32-bit timers, two 16-bit PWM timers dedicated to motor control, seven general-purpose 16-bit timers, and one 16-bit low-power timer.
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They also feature standard and advanced communication interfaces such as:
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\- Three I2Cs
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\- Three SPIs multiplexed with two half duplex I2Ss
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\- Three USARTs, one UART and one low-power UART.
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\- One FDCAN
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\- One SAI
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\- USB device
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\- UCPD
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The devices operate in the -40 to +85 °C (+105 °C junction) and -40 to +125 °C (+130 °C junction) temperature ranges from a 1.71 to 3.6 V power supply. A comprehensive set of power-saving modes allows the design of low-power applications.
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Some independent power supplies are supported including an analog independent supply input for ADC, DAC, OPAMPs and comparators. A VBAT input allows backup of the RTC and the registers.
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The STM32G491x6/x8/xB family offers 9 packages from 32-pin to 100-pin.
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#### KEY FEATURES
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- Core: Arm® 32-bit Cortex®-M4 CPU with FPU, Adaptive real-time accelerator (ART Accelerator) allowing 0-wait-state execution from Flash memory, frequency up to 170 MHz with 213 DMIPS, MPU, DSP instructions
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- Operating conditions:
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- VDD, VDDA voltage range: 1.71 V to 3.6 V
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- Mathematical hardware accelerators
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- CORDIC for trigonometric functions acceleration
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- FMAC: filter mathematical accelerator
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- Memories
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- 128 Kbytes of Flash memory with ECC support, proprietary code readout protection (PCROP), securable memory area, 1 Kbyte OTP
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- 22 Kbytes of SRAM, with hardware parity check implemented on the first 16 Kbytes
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- Routine booster: 10 Kbytes of SRAM on instruction and data bus, with hardware parity check (CCM SRAM)
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- Reset and supply management
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- Power-on/power-down reset (POR/PDR/BOR)
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- Programmable voltage detector (PVD)
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- Low-power modes: sleep, stop, standby and shutdown
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- VBAT supply for RTC and backup registers
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- Clock management
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- 4 to 48 MHz crystal oscillator
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- 32 kHz oscillator with calibration
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- Internal 16 MHz RC with PLL option (± 1%)
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- Internal 32 kHz RC oscillator (± 5%)
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- Up to 86 fast I/Os
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- All mappable on external interrupt vectors
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- Several I/Os with 5 V tolerant capability
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- Interconnect matrix
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- 12-channel DMA controller
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- 2 x ADCs 0.25 µs (up to 23 channels). Resolution up to 16-bit with hardware oversampling, 0 to 3.6 V conversion range
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- 4 x 12-bit DAC channels
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- 2 x buffered external channels 1 MSPS
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- 2 x unbuffered internal channels 15 MSPS
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- 4 x ultra-fast rail-to-rail analog comparators
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- 3 x operational amplifiers that can be used in PGA mode, all terminals accessible
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- Internal voltage reference buffer (VREFBUF) supporting three output voltages (2.048 V, 2.5 V, 2.9 V)
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- 14 timers:
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- 1 x 32-bit timer and 2 x 16-bit timers with up to four IC/OC/PWM or pulse counter and quadrature (incremental) encoder input
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- 2 x 16-bit 8-channel advanced motor control timers, with up to 8 x PWM channels, dead time generation and emergency stop
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- 1 x 16-bit timer with 2 x IC/OCs, one OCN/PWM, dead time generation and emergency stop
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- 2 x 16-bit timers with IC/OC/OCN/PWM, dead time generation and emergency stop
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- 2 x watchdog timers (independent, window)
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- 1 x SysTick timer: 24-bit downcounter
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- 2 x 16-bit basic timers
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- 1 x low-power timer
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- Calendar RTC with alarm, periodic wakeup from stop/standby
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- Communication interfaces
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- 1 x FDCAN controller supporting flexible data rate
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- 3 x I2C Fast mode plus (1 Mbit/s) with 20 mA current sink, SMBus/PMBus, wakeup from stop
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- 4 x USART/UARTs (ISO 7816 interface, LIN, IrDA, modem control)
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- 1 x LPUART
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- 3 x SPIs, 4 to 16 programmable bit frames, 2 x with multiplexed half duplex I2S interface
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- 1 x SAI (serial audio interface)
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- USB 2.0 full-speed interface with LPM and BCD support
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- IRTIM (infrared interface)
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- USB Type-C™ /USB power delivery controller (UCPD)
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- True random number generator (RNG)
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- CRC calculation unit, 96-bit unique ID
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- Development support: serial wire debug (SWD), JTAG, Embedded Trace Macrocell™
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## Read more
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| Documents | Description |
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| :----------------------------------------------------------: | :----------------------------------------------------------: |
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| [STM32_Nucleo-64_BSP_Introduction](../docs/STM32_Nucleo-64_BSP_Introduction.md) | How to run RT-Thread on STM32 Nucleo-64 boards (**Must-Read**) |
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| [STM32G491RE ST Official Website](https://www.st.com/en/microcontrollers-microprocessors/stm32G491RE.html#documentation) | STM32G491RE datasheet and other resources |
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## Maintained By
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[supperthomas](https://github.com/supperthomas), <78900636@qq.com>
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## Translated By
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Meco Man @ RT-Thread Community
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> jiantingman@foxmail.com
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>
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> https://github.com/mysterywolf
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