2011-12-17 12:14:22 +08:00
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/*
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* File : serial.c
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2006, RT-Thread Development Team
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://openlab.rt-thread.com/license/LICENSE
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*
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* Change Logs:
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* Date Author Notes
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* 2006-08-23 Bernard first version
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* 2009-05-14 Bernard add RT-THread device interface
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*
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2021-03-27 17:51:56 +08:00
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* 2011-12-17 nl1031 MicroBlaze
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2011-12-17 12:14:22 +08:00
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*/
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#include <rthw.h>
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#include <rtthread.h>
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#include "serial.h"
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typedef volatile rt_uint32_t REG32;
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struct rt_mb_uart_lite_hw
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{
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2021-03-27 17:51:56 +08:00
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REG32 Rx_FIFO; // Receiver Holding Register
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REG32 Tx_FIFO; // Transmitter Holding Register
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REG32 STAT_REG; // Channel Status Register
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REG32 CTRL_REG; // Control Register
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2011-12-17 12:14:22 +08:00
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};
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struct rt_mb_uart_lite
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{
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2021-03-27 17:51:56 +08:00
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struct rt_device parent;
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2011-12-17 12:14:22 +08:00
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2021-03-27 17:51:56 +08:00
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struct rt_mb_uart_lite_hw* hw_base;
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rt_uint16_t peripheral_id;
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rt_uint32_t baudrate;
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2011-12-17 12:14:22 +08:00
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2021-03-27 17:51:56 +08:00
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/* reception field */
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rt_uint16_t save_index, read_index;
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rt_uint8_t rx_buffer[RT_UART_RX_BUFFER_SIZE];
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2011-12-17 12:14:22 +08:00
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};
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#ifdef RT_USING_UART1
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struct rt_mb_uart_lite serial1;
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#endif
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static void rt_hw_serial_isr(void)
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{
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2021-03-27 17:51:56 +08:00
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unsigned int status;
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rt_base_t level;
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struct rt_device* device;
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struct rt_mb_uart_lite* serial = RT_NULL;
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2011-12-17 12:14:22 +08:00
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#ifdef RT_USING_UART1
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2021-03-27 17:51:56 +08:00
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/* serial 1 */
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serial = &serial1;
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2011-12-17 12:14:22 +08:00
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#endif
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2021-03-27 17:51:56 +08:00
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RT_ASSERT(serial != RT_NULL);
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/* get generic device object */
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device = (rt_device_t)serial;
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/* disable interrupt */
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level = rt_hw_interrupt_disable();
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/* get uart status register */
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status = serial->hw_base->STAT_REG;
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while (status & XUL_SR_RX_FIFO_VALID_DATA)
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{
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/* get received character */
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serial->rx_buffer[serial->save_index] = serial->hw_base->Rx_FIFO;
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/* move to next position */
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serial->save_index ++;
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if (serial->save_index >= RT_UART_RX_BUFFER_SIZE)
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serial->save_index = 0;
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/* if the next position is read index, discard this 'read char' */
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if (serial->save_index == serial->read_index)
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{
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serial->read_index ++;
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if (serial->read_index >= RT_UART_RX_BUFFER_SIZE)
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serial->read_index = 0;
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}
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status = serial->hw_base->STAT_REG;
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}
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/* enable interrupt */
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rt_hw_interrupt_enable(level);
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/* indicate to upper layer application */
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if (device->rx_indicate != RT_NULL)
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device->rx_indicate(device, 1);
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2011-12-17 12:14:22 +08:00
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}
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2012-10-26 11:36:13 +08:00
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static rt_err_t rt_serial_init (rt_device_t dev)
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2011-12-17 12:14:22 +08:00
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{
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2021-03-27 17:51:56 +08:00
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struct rt_mb_uart_lite* serial = (struct rt_mb_uart_lite*) dev;
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2011-12-17 12:14:22 +08:00
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2021-03-27 17:51:56 +08:00
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RT_ASSERT(serial != RT_NULL);
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2011-12-17 12:14:22 +08:00
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2021-03-27 17:51:56 +08:00
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RT_ASSERT(serial->peripheral_id != XPAR_UARTLITE_1_DEVICE_ID);
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2011-12-17 12:14:22 +08:00
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2021-03-27 17:51:56 +08:00
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/* reset rx index */
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serial->save_index = 0;
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serial->read_index = 0;
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2011-12-17 12:14:22 +08:00
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2021-03-27 17:51:56 +08:00
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/* reset rx buffer */
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rt_memset(serial->rx_buffer, 0, RT_UART_RX_BUFFER_SIZE);
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2012-10-26 11:36:13 +08:00
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2021-03-27 17:51:56 +08:00
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return RT_EOK;
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2011-12-17 12:14:22 +08:00
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}
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static rt_err_t rt_serial_open(rt_device_t dev, rt_uint16_t oflag)
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{
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2021-03-27 17:51:56 +08:00
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struct rt_mb_uart_lite *serial = (struct rt_mb_uart_lite*)dev;
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RT_ASSERT(serial != RT_NULL);
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2011-12-17 12:14:22 +08:00
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2021-03-27 17:51:56 +08:00
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if (dev->flag & RT_DEVICE_FLAG_INT_RX)
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{
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/* enable UART rx interrupt */
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serial->hw_base->CTRL_REG = XUL_CR_ENABLE_INTR; /* enable interrupt */
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2011-12-17 12:14:22 +08:00
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2021-03-27 17:51:56 +08:00
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/* install UART handler */
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rt_hw_interrupt_install(serial->peripheral_id, (rt_isr_handler_t)rt_hw_serial_isr, RT_NULL);
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rt_hw_interrupt_umask(serial->peripheral_id);
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}
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2011-12-17 12:14:22 +08:00
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2021-03-27 17:51:56 +08:00
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return RT_EOK;
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2011-12-17 12:14:22 +08:00
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}
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static rt_err_t rt_serial_close(rt_device_t dev)
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{
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2021-03-27 17:51:56 +08:00
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struct rt_mb_uart_lite *serial = (struct rt_mb_uart_lite*)dev;
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RT_ASSERT(serial != RT_NULL);
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2011-12-17 12:14:22 +08:00
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2021-03-27 17:51:56 +08:00
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if (dev->flag & RT_DEVICE_FLAG_INT_RX)
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{
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/* disable interrupt */
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serial->hw_base->CTRL_REG = 0; /* RxReady interrupt */
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}
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2011-12-17 12:14:22 +08:00
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2021-03-27 17:51:56 +08:00
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return RT_EOK;
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2011-12-17 12:14:22 +08:00
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}
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2023-02-06 07:35:33 +08:00
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static rt_ssize_t rt_serial_read (rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
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2011-12-17 12:14:22 +08:00
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{
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2021-03-27 17:51:56 +08:00
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rt_uint8_t* ptr;
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struct rt_mb_uart_lite *serial = (struct rt_mb_uart_lite*)dev;
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RT_ASSERT(serial != RT_NULL);
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/* point to buffer */
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ptr = (rt_uint8_t*) buffer;
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if (dev->flag & RT_DEVICE_FLAG_INT_RX)
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{
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while (size)
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{
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/* interrupt receive */
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rt_base_t level;
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/* disable interrupt */
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level = rt_hw_interrupt_disable();
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if (serial->read_index != serial->save_index)
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{
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*ptr = serial->rx_buffer[serial->read_index];
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serial->read_index ++;
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if (serial->read_index >= RT_UART_RX_BUFFER_SIZE)
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serial->read_index = 0;
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}
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else
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{
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/* no data in rx buffer */
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/* enable interrupt */
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rt_hw_interrupt_enable(level);
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break;
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}
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/* enable interrupt */
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rt_hw_interrupt_enable(level);
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ptr ++; size --;
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}
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return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
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}
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else if (dev->flag & RT_DEVICE_FLAG_DMA_RX)
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{
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/* not support right now */
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RT_ASSERT(0);
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}
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else
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{
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/* poll mode */
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while (size)
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{
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/* Wait for Full Rx Buffer */
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while (!(serial->hw_base->STAT_REG & XUL_SR_RX_FIFO_VALID_DATA));
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/* Read Character */
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*ptr = serial->hw_base->Rx_FIFO;
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ptr ++;
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size --;
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}
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return (rt_size_t)ptr - (rt_size_t)buffer;
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}
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return 0;
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2011-12-17 12:14:22 +08:00
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}
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2023-02-06 07:35:33 +08:00
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static rt_ssize_t rt_serial_write (rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
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2011-12-17 12:14:22 +08:00
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{
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2021-03-27 17:51:56 +08:00
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rt_uint8_t* ptr;
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struct rt_mb_uart_lite *serial = (struct rt_mb_uart_lite*)dev;
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RT_ASSERT(serial != RT_NULL);
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ptr = (rt_uint8_t*) buffer;
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if (dev->open_flag & RT_DEVICE_OFLAG_WRONLY)
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{
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if (dev->flag & RT_DEVICE_FLAG_STREAM)
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{
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/* it's a stream mode device */
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while (size)
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{
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/* stream mode */
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if (*ptr == '\n')
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{
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while (!(serial->hw_base->STAT_REG & XUL_SR_TX_FIFO_EMPTY));
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serial->hw_base->Tx_FIFO = '\r';
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}
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/* Wait for Empty Tx Buffer */
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while (!(serial->hw_base->STAT_REG & XUL_SR_TX_FIFO_EMPTY));
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/* Transmit Character */
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serial->hw_base->Tx_FIFO = *ptr;
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if (*ptr & 1)
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rt_hw_board_led_on(2);
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else
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rt_hw_board_led_off(2);
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ptr ++; size --;
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}
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}
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else
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{
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while (size)
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{
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/* Wait for Empty Tx Buffer */
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while (!(serial->hw_base->STAT_REG & XUL_SR_TX_FIFO_EMPTY));
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/* Transmit Character */
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serial->hw_base->Tx_FIFO = *ptr;
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if (*ptr & 1)
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rt_hw_board_led_on(2);
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else
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rt_hw_board_led_off(2);
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ptr ++; size --;
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}
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}
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}
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return (rt_size_t)ptr - (rt_size_t)buffer;
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2011-12-17 12:14:22 +08:00
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}
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2017-10-16 13:23:03 +08:00
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static rt_err_t rt_serial_control (rt_device_t dev, int cmd, void *args)
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2011-12-17 12:14:22 +08:00
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{
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2021-03-27 17:51:56 +08:00
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return RT_EOK;
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2011-12-17 12:14:22 +08:00
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}
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rt_err_t rt_hw_serial_init()
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{
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2021-03-27 17:51:56 +08:00
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rt_device_t device;
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2011-12-17 12:14:22 +08:00
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#ifndef RT_USING_CONSOLE
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2021-03-27 17:51:56 +08:00
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int Status;
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2011-12-17 12:14:22 +08:00
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2021-03-27 17:51:56 +08:00
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/*
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* Initialize the UartLite driver so that it is ready to use.
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*/
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Status = XUartLite_Initialize(&uart_lite, RS232_DEVICE_ID);
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if (Status != XST_SUCCESS)
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{
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return;
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}
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2011-12-17 12:14:22 +08:00
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#endif
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#ifdef RT_USING_UART1
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2021-03-27 17:51:56 +08:00
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device = (rt_device_t) &serial1;
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/* init serial device private data */
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serial1.hw_base = (struct rt_mb_uart_lite_hw*)XPAR_USB_UART_BASEADDR;
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serial1.peripheral_id = XPAR_UARTLITE_1_DEVICE_ID;
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serial1.baudrate = 115200;
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/* set device virtual interface */
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device->init = rt_serial_init;
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device->open = rt_serial_open;
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device->close = rt_serial_close;
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device->read = rt_serial_read;
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device->write = rt_serial_write;
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device->control = rt_serial_control;
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/* register uart1 on device subsystem */
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rt_device_register(device, "uart1", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX);
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2011-12-17 12:14:22 +08:00
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#endif
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2012-10-26 11:36:13 +08:00
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2021-03-27 17:51:56 +08:00
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return RT_EOK;
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2011-12-17 12:14:22 +08:00
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}
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2012-10-26 11:36:13 +08:00
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