392 lines
20 KiB
C
392 lines
20 KiB
C
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//###########################################################################
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//
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// FILE: hw_eqep.h
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//
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// TITLE: Definitions for the C28x EQEP registers.
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//
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//###########################################################################
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// $TI Release: F2837xD Support Library v3.05.00.00 $
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// $Release Date: Tue Jun 26 03:15:23 CDT 2018 $
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// $Copyright:
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// Copyright (C) 2013-2018 Texas Instruments Incorporated - http://www.ti.com/
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions
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// are met:
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//
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// Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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//
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// Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the
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// distribution.
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//
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// Neither the name of Texas Instruments Incorporated nor the names of
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// its contributors may be used to endorse or promote products derived
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// from this software without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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// $
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//###########################################################################
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#ifndef __HW_EQEP_H__
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#define __HW_EQEP_H__
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//*****************************************************************************
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//
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// The following are defines for the EQEP register offsets
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//
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//*****************************************************************************
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#define EQEP_O_QPOSCNT 0x0 // Position Counter
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#define EQEP_O_QPOSINIT 0x2 // Position Counter Init
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#define EQEP_O_QPOSMAX 0x4 // Maximum Position Count
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#define EQEP_O_QPOSCMP 0x6 // Position Compare
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#define EQEP_O_QPOSILAT 0x8 // Index Position Latch
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#define EQEP_O_QPOSSLAT 0xA // Strobe Position Latch
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#define EQEP_O_QPOSLAT 0xC // Position Latch
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#define EQEP_O_QUTMR 0xE // QEP Unit Timer
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#define EQEP_O_QUPRD 0x10 // QEP Unit Period
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#define EQEP_O_QWDTMR 0x12 // QEP Watchdog Timer
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#define EQEP_O_QWDPRD 0x13 // QEP Watchdog Period
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#define EQEP_O_QDECCTL 0x14 // Quadrature Decoder Control
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#define EQEP_O_QEPCTL 0x15 // QEP Control
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#define EQEP_O_QCAPCTL 0x16 // Qaudrature Capture Control
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#define EQEP_O_QPOSCTL 0x17 // Position Compare Control
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#define EQEP_O_QEINT 0x18 // QEP Interrupt Control
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#define EQEP_O_QFLG 0x19 // QEP Interrupt Flag
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#define EQEP_O_QCLR 0x1A // QEP Interrupt Clear
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#define EQEP_O_QFRC 0x1B // QEP Interrupt Force
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#define EQEP_O_QEPSTS 0x1C // QEP Status
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#define EQEP_O_QCTMR 0x1D // QEP Capture Timer
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#define EQEP_O_QCPRD 0x1E // QEP Capture Period
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#define EQEP_O_QCTMRLAT 0x1F // QEP Capture Latch
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#define EQEP_O_QCPRDLAT 0x20 // QEP Capture Period Latch
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//*****************************************************************************
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//
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// The following are defines for the bit fields in the QPOSCNT register
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//
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//*****************************************************************************
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#define EQEP_QPOSCNT_QPOSCNT_S 0
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#define EQEP_QPOSCNT_QPOSCNT_M 0xFFFFFFFF // Position Counter
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//*****************************************************************************
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//
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// The following are defines for the bit fields in the QPOSINIT register
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//
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//*****************************************************************************
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#define EQEP_QPOSINIT_QPOSINIT_S 0
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#define EQEP_QPOSINIT_QPOSINIT_M 0xFFFFFFFF // Position Counter Init
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//*****************************************************************************
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//
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// The following are defines for the bit fields in the QPOSMAX register
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//
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//*****************************************************************************
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#define EQEP_QPOSMAX_QPOSMAX_S 0
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#define EQEP_QPOSMAX_QPOSMAX_M 0xFFFFFFFF // Maximum Position Count
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//*****************************************************************************
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//
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// The following are defines for the bit fields in the QPOSCMP register
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//
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//*****************************************************************************
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#define EQEP_QPOSCMP_QPOSCMP_S 0
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#define EQEP_QPOSCMP_QPOSCMP_M 0xFFFFFFFF // Position Compare
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//*****************************************************************************
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//
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// The following are defines for the bit fields in the QPOSILAT register
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//
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//*****************************************************************************
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#define EQEP_QPOSILAT_QPOSILAT_S 0
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#define EQEP_QPOSILAT_QPOSILAT_M 0xFFFFFFFF // Index Position Latch
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//*****************************************************************************
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//
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// The following are defines for the bit fields in the QPOSSLAT register
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//
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//*****************************************************************************
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#define EQEP_QPOSSLAT_QPOSSLAT_S 0
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#define EQEP_QPOSSLAT_QPOSSLAT_M 0xFFFFFFFF // Strobe Position Latch
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//*****************************************************************************
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//
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// The following are defines for the bit fields in the QPOSLAT register
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//
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//*****************************************************************************
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#define EQEP_QPOSLAT_QPOSLAT_S 0
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#define EQEP_QPOSLAT_QPOSLAT_M 0xFFFFFFFF // Position Latch
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//*****************************************************************************
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//
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// The following are defines for the bit fields in the QUTMR register
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//
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//*****************************************************************************
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#define EQEP_QUTMR_QUTMR_S 0
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#define EQEP_QUTMR_QUTMR_M 0xFFFFFFFF // QEP Unit Timer
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//*****************************************************************************
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//
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// The following are defines for the bit fields in the QUPRD register
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//
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//*****************************************************************************
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#define EQEP_QUPRD_QUPRD_S 0
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#define EQEP_QUPRD_QUPRD_M 0xFFFFFFFF // QEP Unit Period
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//*****************************************************************************
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//
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// The following are defines for the bit fields in the QWDTMR register
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//
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//*****************************************************************************
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#define EQEP_QWDTMR_QWDTMR_S 0
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#define EQEP_QWDTMR_QWDTMR_M 0xFFFF // QEP Watchdog Timer
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//*****************************************************************************
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//
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// The following are defines for the bit fields in the QWDPRD register
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//
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//*****************************************************************************
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#define EQEP_QWDPRD_QWDPRD_S 0
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#define EQEP_QWDPRD_QWDPRD_M 0xFFFF // QEP Watchdog Period
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//*****************************************************************************
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//
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// The following are defines for the bit fields in the QDECCTL register
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//
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//*****************************************************************************
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#define EQEP_QDECCTL_QSP 0x20 // QEPS input polarity
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#define EQEP_QDECCTL_QIP 0x40 // QEPI input polarity
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#define EQEP_QDECCTL_QBP 0x80 // QEPB input polarity
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#define EQEP_QDECCTL_QAP 0x100 // QEPA input polarity
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#define EQEP_QDECCTL_IGATE 0x200 // Index pulse gating option
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#define EQEP_QDECCTL_SWAP 0x400 // CLK/DIR Signal Source for
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// Position Counter
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#define EQEP_QDECCTL_XCR 0x800 // External Clock Rate
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#define EQEP_QDECCTL_SPSEL 0x1000 // Sync output pin selection
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#define EQEP_QDECCTL_SOEN 0x2000 // Sync output-enable
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#define EQEP_QDECCTL_QSRC_S 14
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#define EQEP_QDECCTL_QSRC_M 0xC000 // Position-counter source
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// selection
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//*****************************************************************************
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//
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// The following are defines for the bit fields in the QEPCTL register
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//
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//*****************************************************************************
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#define EQEP_QEPCTL_WDE 0x1 // QEP watchdog enable
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#define EQEP_QEPCTL_UTE 0x2 // QEP unit timer enable
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#define EQEP_QEPCTL_QCLM 0x4 // QEP capture latch mode
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#define EQEP_QEPCTL_QPEN 0x8 // Quadrature postotion counter
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// enable
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#define EQEP_QEPCTL_IEL_S 4
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#define EQEP_QEPCTL_IEL_M 0x30 // Index event latch
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#define EQEP_QEPCTL_SEL 0x40 // Strobe event latch
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#define EQEP_QEPCTL_SWI 0x80 // Software init position counter
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#define EQEP_QEPCTL_IEI_S 8
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#define EQEP_QEPCTL_IEI_M 0x300 // Index event init of position
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// count
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#define EQEP_QEPCTL_SEI_S 10
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#define EQEP_QEPCTL_SEI_M 0xC00 // Strobe event init
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#define EQEP_QEPCTL_PCRM_S 12
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#define EQEP_QEPCTL_PCRM_M 0x3000 // Postion counter reset
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#define EQEP_QEPCTL_FREE_SOFT_S 14
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#define EQEP_QEPCTL_FREE_SOFT_M 0xC000 // Emulation mode
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//*****************************************************************************
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//
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// The following are defines for the bit fields in the QCAPCTL register
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//
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//*****************************************************************************
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#define EQEP_QCAPCTL_UPPS_S 0
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#define EQEP_QCAPCTL_UPPS_M 0xF // Unit position event prescaler
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#define EQEP_QCAPCTL_CCPS_S 4
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#define EQEP_QCAPCTL_CCPS_M 0x70 // eQEP capture timer clock
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// prescaler
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#define EQEP_QCAPCTL_CEN 0x8000 // Enable eQEP capture
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//*****************************************************************************
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//
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// The following are defines for the bit fields in the QPOSCTL register
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//
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//*****************************************************************************
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#define EQEP_QPOSCTL_PCSPW_S 0
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#define EQEP_QPOSCTL_PCSPW_M 0xFFF // Position compare sync pulse
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// width
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#define EQEP_QPOSCTL_PCE 0x1000 // Position compare enable/disable
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#define EQEP_QPOSCTL_PCPOL 0x2000 // Polarity of sync output
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#define EQEP_QPOSCTL_PCLOAD 0x4000 // Position compare of shadow load
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#define EQEP_QPOSCTL_PCSHDW 0x8000 // Position compare of shadow
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// enable
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//*****************************************************************************
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//
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// The following are defines for the bit fields in the QEINT register
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//
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//*****************************************************************************
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#define EQEP_QEINT_PCE 0x2 // Position counter error
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// interrupt enable
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#define EQEP_QEINT_QPE 0x4 // Quadrature phase error
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// interrupt enable
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#define EQEP_QEINT_QDC 0x8 // Quadrature direction change
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// interrupt enable
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#define EQEP_QEINT_WTO 0x10 // Watchdog time out interrupt
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// enable
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#define EQEP_QEINT_PCU 0x20 // Position counter underflow
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// interrupt enable
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#define EQEP_QEINT_PCO 0x40 // Position counter overflow
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// interrupt enable
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#define EQEP_QEINT_PCR 0x80 // Position-compare ready
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// interrupt enable
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#define EQEP_QEINT_PCM 0x100 // Position-compare match
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// interrupt enable
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#define EQEP_QEINT_SEL 0x200 // Strobe event latch interrupt
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// enable
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#define EQEP_QEINT_IEL 0x400 // Index event latch interrupt
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// enable
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#define EQEP_QEINT_UTO 0x800 // Unit time out interrupt enable
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//*****************************************************************************
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//
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// The following are defines for the bit fields in the QFLG register
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//
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//*****************************************************************************
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#define EQEP_QFLG_INT 0x1 // Global interrupt status flag
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#define EQEP_QFLG_PCE 0x2 // Position counter error
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// interrupt flag
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#define EQEP_QFLG_PHE 0x4 // Quadrature phase error
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// interrupt flag
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#define EQEP_QFLG_QDC 0x8 // Quadrature direction change
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// interrupt flag
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#define EQEP_QFLG_WTO 0x10 // Watchdog timeout interrupt flag
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#define EQEP_QFLG_PCU 0x20 // Position counter underflow
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// interrupt flag
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#define EQEP_QFLG_PCO 0x40 // Position counter overflow
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// interrupt flag
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#define EQEP_QFLG_PCR 0x80 // Position-compare ready
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// interrupt flag
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#define EQEP_QFLG_PCM 0x100 // eQEP compare match event
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// interrupt flag
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#define EQEP_QFLG_SEL 0x200 // Strobe event latch interrupt
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// flag
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#define EQEP_QFLG_IEL 0x400 // Index event latch interrupt
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// flag
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#define EQEP_QFLG_UTO 0x800 // Unit time out interrupt flag
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//*****************************************************************************
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//
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// The following are defines for the bit fields in the QCLR register
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//
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//*****************************************************************************
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#define EQEP_QCLR_INT 0x1 // Global interrupt clear flag
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#define EQEP_QCLR_PCE 0x2 // Clear position counter error
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// interrupt flag
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#define EQEP_QCLR_PHE 0x4 // Clear quadrature phase error
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// interrupt flag
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#define EQEP_QCLR_QDC 0x8 // Clear quadrature direction
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// change interrupt flag
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#define EQEP_QCLR_WTO 0x10 // Clear watchdog timeout
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// interrupt flag
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#define EQEP_QCLR_PCU 0x20 // Clear position counter
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// underflow interrupt flag
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#define EQEP_QCLR_PCO 0x40 // Clear position counter overflow
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// interrupt flag
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#define EQEP_QCLR_PCR 0x80 // Clear position-compare ready
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// interrupt flag
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#define EQEP_QCLR_PCM 0x100 // Clear eQEP compare match event
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// interrupt flag
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#define EQEP_QCLR_SEL 0x200 // Clear strobe event latch
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// interrupt flag
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#define EQEP_QCLR_IEL 0x400 // Clear index event latch
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// interrupt flag
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#define EQEP_QCLR_UTO 0x800 // Clear unit time out interrupt
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// flag
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//*****************************************************************************
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//
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// The following are defines for the bit fields in the QFRC register
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//
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//*****************************************************************************
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#define EQEP_QFRC_PCE 0x2 // Force position counter error
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// interrupt
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#define EQEP_QFRC_PHE 0x4 // Force quadrature phase error
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// interrupt
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#define EQEP_QFRC_QDC 0x8 // Force quadrature direction
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// change interrupt
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#define EQEP_QFRC_WTO 0x10 // Force watchdog time out
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// interrupt
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#define EQEP_QFRC_PCU 0x20 // Force position counter
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// underflow interrupt
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#define EQEP_QFRC_PCO 0x40 // Force position counter overflow
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// interrupt
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#define EQEP_QFRC_PCR 0x80 // Force position-compare ready
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// interrupt
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#define EQEP_QFRC_PCM 0x100 // Force position-compare match
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// interrupt
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#define EQEP_QFRC_SEL 0x200 // Force strobe event latch
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// interrupt
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#define EQEP_QFRC_IEL 0x400 // Force index event latch
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// interrupt
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||
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#define EQEP_QFRC_UTO 0x800 // Force unit time out interrupt
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||
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||
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//*****************************************************************************
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||
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//
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||
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// The following are defines for the bit fields in the QEPSTS register
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||
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//
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||
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//*****************************************************************************
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||
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#define EQEP_QEPSTS_PCEF 0x1 // Position counter error flag.
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||
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#define EQEP_QEPSTS_FIMF 0x2 // First index marker flag
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||
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#define EQEP_QEPSTS_CDEF 0x4 // Capture direction error flag
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||
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#define EQEP_QEPSTS_COEF 0x8 // Capture overflow error flag
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||
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#define EQEP_QEPSTS_QDLF 0x10 // eQEP direction latch flag
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||
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#define EQEP_QEPSTS_QDF 0x20 // Quadrature direction flag
|
||
|
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#define EQEP_QEPSTS_FIDF 0x40 // The first index marker
|
||
|
|
#define EQEP_QEPSTS_UPEVNT 0x80 // Unit position event flag
|
||
|
|
|
||
|
|
//*****************************************************************************
|
||
|
|
//
|
||
|
|
// The following are defines for the bit fields in the QCTMR register
|
||
|
|
//
|
||
|
|
//*****************************************************************************
|
||
|
|
#define EQEP_QCTMR_QCTMR_S 0
|
||
|
|
#define EQEP_QCTMR_QCTMR_M 0xFFFF // This register provides time
|
||
|
|
// base for edge capture unit.
|
||
|
|
|
||
|
|
//*****************************************************************************
|
||
|
|
//
|
||
|
|
// The following are defines for the bit fields in the QCPRD register
|
||
|
|
//
|
||
|
|
//*****************************************************************************
|
||
|
|
#define EQEP_QCPRD_QCPRD_S 0
|
||
|
|
#define EQEP_QCPRD_QCPRD_M 0xFFFF // Period count value between
|
||
|
|
// eQEP position events
|
||
|
|
|
||
|
|
//*****************************************************************************
|
||
|
|
//
|
||
|
|
// The following are defines for the bit fields in the QCTMRLAT register
|
||
|
|
//
|
||
|
|
//*****************************************************************************
|
||
|
|
#define EQEP_QCTMRLAT_QCTMRLAT_S 0
|
||
|
|
#define EQEP_QCTMRLAT_QCTMRLAT_M 0xFFFF // The eQEP capture timer latch
|
||
|
|
// value
|
||
|
|
|
||
|
|
//*****************************************************************************
|
||
|
|
//
|
||
|
|
// The following are defines for the bit fields in the QCPRDLAT register
|
||
|
|
//
|
||
|
|
//*****************************************************************************
|
||
|
|
#define EQEP_QCPRDLAT_QCPRDLAT_S 0
|
||
|
|
#define EQEP_QCPRDLAT_QCPRDLAT_M 0xFFFF // eQEP capture period latch value
|
||
|
|
#endif
|