212 lines
5.1 KiB
C
212 lines
5.1 KiB
C
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/* ------------------------------------------
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* Copyright (c) 2016, Synopsys, Inc. All rights reserved.
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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* 1) Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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* 2) Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation and/or
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* other materials provided with the distribution.
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* 3) Neither the name of the Synopsys, Inc., nor the names of its contributors may
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* be used to endorse or promote products derived from this software without
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* specific prior written permission.
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* \version 2016.05
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* \date 2014-07-15
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* \author Wayne Ren(Wei.Ren@synopsys.com)
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--------------------------------------------- */
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/**
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* \file
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* \ingroup ARC_HAL_MISC_TIMER
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* \brief implementation of internal timer related functions
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* \todo RTC support should be improved if RTC is enabled
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*/
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#include "inc/arc/arc_timer.h"
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#include "inc/arc/arc.h"
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#include "inc/arc/arc_builtin.h"
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/**
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* \brief check whether the specific timer present
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* \param[in] no timer number
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* \retval 1 present
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* \retval 0 not present
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*/
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int32_t arc_timer_present(const uint32_t no)
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{
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uint32_t bcr = _arc_aux_read(AUX_BCR_TIMERS);
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switch (no) {
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case TIMER_0:
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bcr = (bcr >> 8) & 1;
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break;
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case TIMER_1:
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bcr = (bcr >> 9) & 1;
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break;
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case TIMER_RTC:
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bcr = (bcr >> 10) & 1;
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break;
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default:
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bcr = 0;
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/* illegal argument so return false */
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break;
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}
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return (int)bcr;
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}
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/**
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* \brief start the specific timer
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* \param[in] no timer number
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* \param[in] mode timer mode
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* \param[in] val timer limit value (not for RTC)
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* \return 0 success, -1 failure
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*/
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int32_t arc_timer_start(const uint32_t no, const uint32_t mode, const uint32_t val)
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{
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if (arc_timer_present(no) == 0) {
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return -1;
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}
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switch (no) {
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case TIMER_0:
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_arc_aux_write(AUX_TIMER0_CTRL, 0);
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_arc_aux_write(AUX_TIMER0_LIMIT, val);
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_arc_aux_write(AUX_TIMER0_CTRL, mode);
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_arc_aux_write(AUX_TIMER0_CNT, 0);
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break;
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case TIMER_1:
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_arc_aux_write(AUX_TIMER1_CTRL, 0);
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_arc_aux_write(AUX_TIMER1_LIMIT, val);
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_arc_aux_write(AUX_TIMER1_CTRL, mode);
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_arc_aux_write(AUX_TIMER1_CNT, 0);
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break;
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case TIMER_RTC:
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_arc_aux_write(AUX_RTC_CTRL, mode);
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break;
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default:
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return -1;
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}
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return 0;
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}
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/**
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* \brief stop and clear the specific timer
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*
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* \param[in] no timer number
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* \return 0 success, -1 failure
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*/
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int32_t arc_timer_stop(const uint32_t no)
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{
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if (arc_timer_present(no) == 0) {
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return -1;
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}
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switch (no) {
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case TIMER_0 :
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_arc_aux_write(AUX_TIMER0_CTRL, 0);
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_arc_aux_write(AUX_TIMER0_LIMIT,0);
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_arc_aux_write(AUX_TIMER0_CNT, 0);
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break;
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case TIMER_1:
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_arc_aux_write(AUX_TIMER1_CTRL, 0);
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_arc_aux_write(AUX_TIMER1_LIMIT,0);
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_arc_aux_write(AUX_TIMER1_CNT, 0);
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break;
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case TIMER_RTC:
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_arc_aux_write(AUX_RTC_CTRL, TIMER_RTC_CLEAR);
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break;
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default:
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return -1;
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}
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return 0;
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}
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/**
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* \brief get timer current tick
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*
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* \param[in] no timer number
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* \param[out] val, timer value
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* \return 0 success, -1 failure
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*/
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int32_t arc_timer_current(const uint32_t no, void *val)
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{
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if (arc_timer_present(no) == 0) {
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return -1;
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}
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switch (no) {
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case TIMER_0 :
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*((uint32_t *)val) = _arc_aux_read(AUX_TIMER0_CNT);
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break;
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case TIMER_1 :
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*((uint32_t *)val) = _arc_aux_read(AUX_TIMER1_CNT);
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break;
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case TIMER_RTC:
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*((uint64_t *)val) = _arc_aux_read(AUX_RTC_LOW);
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break;
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default :
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return -1;
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}
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return 0;
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}
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/**
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* \brief clear the interrupt pending bit of timer
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*
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* \param[in] no timer number
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* \return 0 success, -1 failure
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*/
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int32_t arc_timer_int_clear(const uint32_t no)
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{
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uint32_t val;
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if (arc_timer_present(no) == 0) {
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return -1;
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}
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switch (no) {
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case TIMER_0 :
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val = _arc_aux_read(AUX_TIMER0_CTRL);
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val &= ~TIMER_CTRL_IP;
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_arc_aux_write(AUX_TIMER0_CTRL, val);
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break;
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case TIMER_1 :
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val = _arc_aux_read(AUX_TIMER1_CTRL);
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val &= ~TIMER_CTRL_IP;
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_arc_aux_write(AUX_TIMER1_CTRL, val);
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break;
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default :
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return -1;
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}
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return 0;
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}
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/**
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* \brief init internal timer
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*/
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void arc_timer_init(void)
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{
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arc_timer_stop(TIMER_0);
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arc_timer_stop(TIMER_1);
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arc_timer_stop(TIMER_RTC);
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}
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