2017-12-04 18:52:02 +08:00
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/*
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* File : adc.c
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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*
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* Change Logs:
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* Date Author Notes
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2018-09-21 16:10:44 +08:00
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* 2017-09-18 Haley the first version
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2017-12-04 18:52:02 +08:00
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*/
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2018-09-21 16:10:44 +08:00
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#include <rtthread.h>
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2017-12-04 18:52:02 +08:00
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#include <rtdevice.h>
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#include "am_mcu_apollo.h"
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#ifdef RT_USING_ADC
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2018-09-21 16:10:44 +08:00
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/* messagequeue define */
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struct rt_messagequeue adcbat_mq;
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2017-12-04 18:52:02 +08:00
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2018-09-21 16:10:44 +08:00
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#define BATTERY_GPIO 35 /* Battery */
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#define BATTERY_ADC_PIN AM_HAL_PIN_35_ADCSE7
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#define BATTERY_ADC_CHANNEL AM_HAL_ADC_SLOT_CHSEL_SE7 /* BATTERY ADC<44>ɼ<EFBFBD>ͨ<EFBFBD><CDA8> */
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#define BATTERY_ADC_CHANNELNUM 7 /* BATTERY ADC<44>ɼ<EFBFBD>ͨ<EFBFBD><CDA8><EFBFBD><EFBFBD> */
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#define ADC_CTIMER_NUM 3 /* ADCʹ<43>ö<EFBFBD>ʱ<EFBFBD><CAB1> */
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#define ADC_CTIMER_COUNT (2048/512 - 1)
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#define ADC_CHANNEL_NUM 1 /* ADC<44>ɼ<EFBFBD>ͨ<EFBFBD><CDA8><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
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#define ADC_SAMPLE_NUM 8 /* ADC<44><43><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
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rt_uint8_t bat_adc_cnt = 0;
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static rt_uint8_t am_adcbat_buffer_pool[256];
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static rt_int16_t am_adcbat_buffertemp[32];
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2018-09-21 16:10:44 +08:00
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rt_uint8_t am_adc_data_get(rt_uint8_t channel, rt_int16_t *buff, rt_uint16_t size)
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{
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rt_uint8_t adc_bufftemp[32];
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if (channel == BATTERY_ADC_CHANNELNUM)
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{
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/* wait adc message forever */
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rt_mq_recv(&adcbat_mq, adc_bufftemp, 32, RT_WAITING_FOREVER);
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}
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/* copy the data */
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rt_memcpy(buff, adc_bufftemp, size*sizeof(rt_int16_t));
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return 0;
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}
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void am_adc_start(rt_uint8_t channel)
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{
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/* messagequeue init */
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rt_mq_init(&adcbat_mq, "mq_adcbat",
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&am_adcbat_buffer_pool[0],
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32 - sizeof(void*),
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sizeof(am_adcbat_buffer_pool),
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RT_IPC_FLAG_FIFO);
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/* Start the ctimer */
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am_hal_ctimer_start(ADC_CTIMER_NUM, AM_HAL_CTIMER_TIMERA);
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/* Trigger the ADC once */
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am_hal_adc_trigger();
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}
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2018-09-21 16:10:44 +08:00
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void am_adc_stop(rt_uint8_t channel)
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{
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/* Stop the ctimer */
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am_hal_ctimer_stop(ADC_CTIMER_NUM, AM_HAL_CTIMER_TIMERA);
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2018-09-21 16:10:44 +08:00
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/* messagequeue delete */
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rt_mq_delete(&adceeg_mq);
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/* messagequeue delete */
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rt_mq_delete(&adcbat_mq);
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}
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/**
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* @brief Interrupt handler for the ADC
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*
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* This function is Interrupt handler for the ADC
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*
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* @return None.
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*/
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void am_adc_isr(void)
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{
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uint32_t ui32Status, ui32FifoData;
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/* enter interrupt */
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rt_interrupt_enter();
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/* Read the interrupt status */
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ui32Status = am_hal_adc_int_status_get(true);
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/* Clear the ADC interrupt */
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am_hal_adc_int_clear(ui32Status);
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/* If we got a FIFO 75% full (which should be our only ADC interrupt), go ahead and read the data */
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if (ui32Status & AM_HAL_ADC_INT_FIFOOVR1)
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{
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do
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{
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/* Read the value from the FIFO into the circular buffer */
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ui32FifoData = am_hal_adc_fifo_pop();
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if (AM_HAL_ADC_FIFO_SLOT(ui32FifoData) == BATTERY_ADC_CHANNELNUM)
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{
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am_adcbat_buffertemp[bat_adc_cnt++] = AM_HAL_ADC_FIFO_SAMPLE(ui32FifoData);
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}
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if ((bat_adc_cnt > ADC_SAMPLE_NUM + 2 - 1))
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{
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bat_adc_cnt = 0;
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/* send the message */
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rt_mq_send(&adcbat_mq, am_adcbat_buffertemp, ADC_SAMPLE_NUM*sizeof(rt_int16_t));
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}
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} while (AM_HAL_ADC_FIFO_COUNT(ui32FifoData) > 0);
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}
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/* leave interrupt */
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rt_interrupt_leave();
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}
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static void timerA3_for_adc_init(void)
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{
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/* Start a timer to trigger the ADC periodically (1 second) */
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am_hal_ctimer_config_single(ADC_CTIMER_NUM, AM_HAL_CTIMER_TIMERA,
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AM_HAL_CTIMER_XT_2_048KHZ |
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AM_HAL_CTIMER_FN_REPEAT |
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AM_HAL_CTIMER_INT_ENABLE |
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AM_HAL_CTIMER_PIN_ENABLE);
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am_hal_ctimer_int_enable(AM_HAL_CTIMER_INT_TIMERA3);
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/* Set 512 sample rate */
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am_hal_ctimer_period_set(ADC_CTIMER_NUM, AM_HAL_CTIMER_TIMERA, ADC_CTIMER_COUNT, 1);
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/* Enable the timer A3 to trigger the ADC directly */
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am_hal_ctimer_adc_trigger_enable();
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/* Start the timer */
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//am_hal_ctimer_start(ADC_CTIMER_NUM, AM_HAL_CTIMER_TIMERA);
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}
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/**
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* @brief Initialize the ADC
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*
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* This function initialize the ADC
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*
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* @return None.
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*/
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int rt_hw_adc_init(void)
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{
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am_hal_adc_config_t sADCConfig;
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/* timer for adc init*/
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timerA3_for_adc_init();
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/* Set a pin to act as our ADC input */
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am_hal_gpio_pin_config(BATTERY_GPIO, BATTERY_ADC_PIN);
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/* Enable interrupts */
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am_hal_interrupt_enable(AM_HAL_INTERRUPT_ADC);
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/* Enable the ADC power domain */
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am_hal_pwrctrl_periph_enable(AM_HAL_PWRCTRL_ADC);
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/* Set up the ADC configuration parameters. These settings are reasonable
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for accurate measurements at a low sample rate */
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sADCConfig.ui32Clock = AM_HAL_ADC_CLOCK_HFRC;
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sADCConfig.ui32TriggerConfig = AM_HAL_ADC_TRIGGER_SOFT;
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sADCConfig.ui32Reference = AM_HAL_ADC_REF_INT_2P0;
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sADCConfig.ui32ClockMode = AM_HAL_ADC_CK_LOW_POWER;
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sADCConfig.ui32PowerMode = AM_HAL_ADC_LPMODE_0;
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sADCConfig.ui32Repeat = AM_HAL_ADC_REPEAT;
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am_hal_adc_config(&sADCConfig);
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/* For this example, the samples will be coming in slowly. This means we
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can afford to wake up for every conversion */
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am_hal_adc_int_enable(AM_HAL_ADC_INT_FIFOOVR1);
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/* Set up an ADC slot */
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am_hal_adc_slot_config(BATTERY_ADC_CHANNELNUM, AM_HAL_ADC_SLOT_AVG_1 |
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AM_HAL_ADC_SLOT_14BIT |
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BATTERY_ADC_CHANNEL |
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AM_HAL_ADC_SLOT_ENABLE);
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/* Enable the ADC */
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am_hal_adc_enable();
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2018-09-21 16:10:44 +08:00
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/* Trigger the ADC once */
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//am_hal_adc_trigger();
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//rt_kprintf("adc_init!\n");
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return 0;
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}
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#ifdef RT_USING_COMPONENTS_INIT
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INIT_BOARD_EXPORT(rt_hw_adc_init);
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#endif
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#endif
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/*@}*/
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